ar71xx: add support for 3.7
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.7 / 144-MIPS-pci-ar71xx-convert-to-a-platform-driver.patch
1 From d1a22e73f991145a4abd7d0c37bcf318703c89ed Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Mon, 11 Jun 2012 13:24:55 +0200
4 Subject: [PATCH 05/34] MIPS: pci-ar71xx: convert to a platform driver
5
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7 ---
8 arch/mips/pci/pci-ar71xx.c | 60 +++++++++++++++++++++++++++++++++++++++++---
9 1 files changed, 56 insertions(+), 4 deletions(-)
10
11 --- a/arch/mips/pci/pci-ar71xx.c
12 +++ b/arch/mips/pci/pci-ar71xx.c
13 @@ -18,6 +18,8 @@
14 #include <linux/pci.h>
15 #include <linux/pci_regs.h>
16 #include <linux/interrupt.h>
17 +#include <linux/module.h>
18 +#include <linux/platform_device.h>
19
20 #include <asm/mach-ath79/ar71xx_regs.h>
21 #include <asm/mach-ath79/ath79.h>
22 @@ -309,7 +311,7 @@ static struct irq_chip ar71xx_pci_irq_ch
23 .irq_mask_ack = ar71xx_pci_irq_mask,
24 };
25
26 -static __init void ar71xx_pci_irq_init(void)
27 +static __devinit void ar71xx_pci_irq_init(int irq)
28 {
29 void __iomem *base = ath79_reset_base;
30 int i;
31 @@ -324,10 +326,10 @@ static __init void ar71xx_pci_irq_init(v
32 irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
33 handle_level_irq);
34
35 - irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
36 + irq_set_chained_handler(irq, ar71xx_pci_irq_handler);
37 }
38
39 -static __init void ar71xx_pci_reset(void)
40 +static __devinit void ar71xx_pci_reset(void)
41 {
42 void __iomem *ddr_base = ath79_ddr_base;
43
44 @@ -367,9 +369,59 @@ __init int ar71xx_pcibios_init(void)
45 /* clear bus errors */
46 ar71xx_pci_check_error(1);
47
48 - ar71xx_pci_irq_init();
49 + ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
50
51 register_pci_controller(&ar71xx_pci_controller);
52
53 return 0;
54 }
55 +
56 +static int __devinit ar71xx_pci_probe(struct platform_device *pdev)
57 +{
58 + struct resource *res;
59 + int irq;
60 + u32 t;
61 +
62 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
63 + if (!res)
64 + return -EINVAL;
65 +
66 + ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res);
67 + if (!ar71xx_pcicfg_base)
68 + return -ENOMEM;
69 +
70 + irq = platform_get_irq(pdev, 0);
71 + if (irq < 0)
72 + return -EINVAL;
73 +
74 + ar71xx_pci_reset();
75 +
76 + /* setup COMMAND register */
77 + t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
78 + | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
79 + ar71xx_pci_local_write(PCI_COMMAND, 4, t);
80 +
81 + /* clear bus errors */
82 + ar71xx_pci_check_error(1);
83 +
84 + ar71xx_pci_irq_init(irq);
85 +
86 + register_pci_controller(&ar71xx_pci_controller);
87 +
88 + return 0;
89 +}
90 +
91 +static struct platform_driver ar71xx_pci_driver = {
92 + .probe = ar71xx_pci_probe,
93 + .driver = {
94 + .name = "ar71xx-pci",
95 + .owner = THIS_MODULE,
96 + },
97 +};
98 +
99 +static int __init ar71xx_pci_init(void)
100 +{
101 + return platform_driver_register(&ar71xx_pci_driver);
102 +}
103 +
104 +postcore_initcall(ar71xx_pci_init);