ar71xx: use backported QCA955x patches
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.8 / 035-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
1 From cf40fbb509eaa53ff787dce41911b2545bd001ea Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Fri, 15 Feb 2013 18:54:33 +0000
4 Subject: [PATCH] MIPS: ath79: add WMAC registration code for the QCA955X SoCs
5
6 commit e9c0d0aaa3a7a6e66135e8b44f3323143a635098 upstream.
7
8 The SoC has a built-in wireless MAC. Register a platform
9 device for that to make it usable with the ath9k driver.
10
11 Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
12 Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
13 Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
14 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
15 Patchwork: http://patchwork.linux-mips.org/patch/4956/
16 Signed-off-by: John Crispin <blogic@openwrt.org>
17 ---
18 arch/mips/ath79/Kconfig | 2 +-
19 arch/mips/ath79/dev-wmac.c | 20 ++++++++++++++++++++
20 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 +++
21 3 files changed, 24 insertions(+), 1 deletion(-)
22
23 --- a/arch/mips/ath79/Kconfig
24 +++ b/arch/mips/ath79/Kconfig
25 @@ -108,7 +108,7 @@ config ATH79_DEV_USB
26 def_bool n
27
28 config ATH79_DEV_WMAC
29 - depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
30 + depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
31 def_bool n
32
33 endif
34 --- a/arch/mips/ath79/dev-wmac.c
35 +++ b/arch/mips/ath79/dev-wmac.c
36 @@ -116,6 +116,24 @@ static void ar934x_wmac_setup(void)
37 ath79_wmac_data.is_clk_25mhz = true;
38 }
39
40 +static void qca955x_wmac_setup(void)
41 +{
42 + u32 t;
43 +
44 + ath79_wmac_device.name = "qca955x_wmac";
45 +
46 + ath79_wmac_resources[0].start = QCA955X_WMAC_BASE;
47 + ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1;
48 + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
49 + ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
50 +
51 + t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP);
52 + if (t & QCA955X_BOOTSTRAP_REF_CLK_40)
53 + ath79_wmac_data.is_clk_25mhz = false;
54 + else
55 + ath79_wmac_data.is_clk_25mhz = true;
56 +}
57 +
58 void __init ath79_register_wmac(u8 *cal_data)
59 {
60 if (soc_is_ar913x())
61 @@ -124,6 +142,8 @@ void __init ath79_register_wmac(u8 *cal_
62 ar933x_wmac_setup();
63 else if (soc_is_ar934x())
64 ar934x_wmac_setup();
65 + else if (soc_is_qca955x())
66 + qca955x_wmac_setup();
67 else
68 BUG();
69
70 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
71 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
72 @@ -94,6 +94,9 @@
73 #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000)
74 #define AR934X_SRIF_SIZE 0x1000
75
76 +#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
77 +#define QCA955X_WMAC_SIZE 0x20000
78 +
79 /*
80 * DDR_CTRL block
81 */