convert aruba to the new structure
[openwrt/svn-archive/archive.git] / target / linux / aruba-2.6 / files / include / asm-mips / idt-boards / rc32434 / rc32434_dma_v.h
1 /**************************************************************************
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Definitions for DMA controller.
5 *
6 * Copyright 2004 IDT Inc. (rischelp@idt.com)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 *
29 **************************************************************************
30 * May 2004 rkt, neb.
31 *
32 * Initial Release
33 *
34 *
35 *
36 **************************************************************************
37 */
38
39 #ifndef __IDT_DMA_V_H__
40 #define __IDT_DMA_V_H__
41
42 #include <asm/idt-boards/rc32434/rc32434_dma.h>
43 #include <asm/idt-boards/rc32434/rc32434.h>
44
45 #define DMA_CHAN_OFFSET 0x14
46 #define IS_DMA_USED(X) (((X) & (DMAD_f_m | DMAD_d_m | DMAD_t_m)) != 0)
47 #define DMA_COUNT(count) \
48 ((count) & DMAD_count_m)
49
50 #define DMA_HALT_TIMEOUT 500
51
52
53 static inline int rc32434_halt_dma(DMA_Chan_t ch)
54 {
55 int timeout=1;
56 if (rc32434_readl(&ch->dmac) & DMAC_run_m) {
57 rc32434_writel(0, &ch->dmac);
58
59 for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) {
60 if (rc32434_readl(&ch->dmas) & DMAS_h_m) {
61 rc32434_writel(0, &ch->dmas);
62 break;
63 }
64 }
65
66 }
67
68 return timeout ? 0 : 1;
69 }
70
71 static inline void rc32434_start_dma(DMA_Chan_t ch, u32 dma_addr)
72 {
73 rc32434_writel(0, &ch->dmandptr);
74 rc32434_writel(dma_addr, &ch->dmadptr);
75 }
76
77 static inline void rc32434_chain_dma(DMA_Chan_t ch, u32 dma_addr)
78 {
79 rc32434_writel(dma_addr, &ch->dmandptr);
80 }
81
82 #endif // __IDT_DMA_V_H__
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