add new dfboot loader - a complete revison of romboot code.
[openwrt/svn-archive/archive.git] / target / linux / at91-2.6 / image / dfboot / src / include / AT91C_MCI_Device.h
1 //*---------------------------------------------------------------------------
2 //* ATMEL Microcontroller Software Support - ROUSSET -
3 //*---------------------------------------------------------------------------
4 //* The software is delivered "AS IS" without warranty or condition of any
5 //* kind, either express, implied or statutory. This includes without
6 //* limitation any warranty or condition with respect to merchantability or
7 //* fitness for any particular purpose, or against the infringements of
8 //* intellectual property rights of others.
9 //*---------------------------------------------------------------------------
10 //* File Name : AT91C_MCI_Device.h
11 //* Object : Data Flash Atmel Description File
12 //* Translator :
13 //*
14 //* 1.0 26/11/02 FB : Creation
15 //*---------------------------------------------------------------------------
16
17 #ifndef AT91C_MCI_Device_h
18 #define AT91C_MCI_Device_h
19
20 #include "AT91RM9200.h"
21 #include "lib_AT91RM9200.h"
22
23 typedef unsigned int AT91S_MCIDeviceStatus;
24
25 /////////////////////////////////////////////////////////////////////////////////////////////////////
26
27 #define AT91C_CARD_REMOVED 0
28 #define AT91C_MMC_CARD_INSERTED 1
29 #define AT91C_SD_CARD_INSERTED 2
30
31 #define AT91C_NO_ARGUMENT 0x0
32
33 #define AT91C_FIRST_RCA 0xCAFE
34 #define AT91C_MAX_MCI_CARDS 10
35
36 #define AT91C_BUS_WIDTH_1BIT 0x00
37 #define AT91C_BUS_WIDTH_4BITS 0x02
38
39 /* Driver State */
40 #define AT91C_MCI_IDLE 0x0
41 #define AT91C_MCI_TIMEOUT_ERROR 0x1
42 #define AT91C_MCI_RX_SINGLE_BLOCK 0x2
43 #define AT91C_MCI_RX_MULTIPLE_BLOCK 0x3
44 #define AT91C_MCI_RX_STREAM 0x4
45 #define AT91C_MCI_TX_SINGLE_BLOCK 0x5
46 #define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6
47 #define AT91C_MCI_TX_STREAM 0x7
48
49 /* TimeOut */
50 #define AT91C_TIMEOUT_CMDRDY 30
51
52 /////////////////////////////////////////////////////////////////////////////////////////////////////
53 // MMC & SDCard Structures
54 /////////////////////////////////////////////////////////////////////////////////////////////////////
55
56 /*-----------------------------------------------*/
57 /* SDCard Device Descriptor Structure Definition */
58 /*-----------------------------------------------*/
59 typedef struct _AT91S_MciDeviceDesc
60 {
61 volatile unsigned char state;
62 unsigned char SDCard_bus_width;
63
64 } AT91S_MciDeviceDesc, *AT91PS_MciDeviceDesc;
65
66 /*---------------------------------------------*/
67 /* MMC & SDCard Structure Device Features */
68 /*---------------------------------------------*/
69 typedef struct _AT91S_MciDeviceFeatures
70 {
71 unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED)
72 unsigned int Relative_Card_Address; // RCA
73 unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD
74 unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD
75 unsigned char Read_Partial; // READ_BL_PARTIAL
76 unsigned char Write_Partial; // WRITE_BL_PARTIAL
77 unsigned char Erase_Block_Enable; // ERASE_BLK_EN
78 unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN
79 unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN
80 unsigned char Sector_Size; // SECTOR_SIZE
81 unsigned int Memory_Capacity; // Size in bits of the device
82
83 } AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ;
84
85 /*---------------------------------------------*/
86 /* MCI Device Structure Definition */
87 /*---------------------------------------------*/
88 typedef struct _AT91S_MciDevice
89 {
90 AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor
91 AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array
92 }AT91S_MciDevice, *AT91PS_MciDevice;
93
94 /////////////////////////////////////////////////////////////////////////////////////////////////////
95 // MCI_CMD Register Value
96 /////////////////////////////////////////////////////////////////////////////////////////////////////
97 #define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD)
98
99 /////////////////////////////////////////////////////////////////
100 // Class 0 & 1 commands: Basic commands and Read Stream commands
101 /////////////////////////////////////////////////////////////////
102
103 #define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE )
104 #define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD)
105 #define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD)
106 #define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 )
107 #define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD)
108 #define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
109 #define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD)
110
111 #define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested
112
113 #define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
114 #define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
115 #define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
116 #define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT )
117
118 #define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
119 #define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
120 #define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
121 #define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO )
122
123 //*------------------------------------------------
124 //* Class 2 commands: Block oriented Read commands
125 //*------------------------------------------------
126
127 #define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
128 #define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
129 #define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
130
131 //*--------------------------------------------
132 //* Class 3 commands: Sequential write commands
133 //*--------------------------------------------
134
135 #define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC
136
137 //*------------------------------------------------
138 //* Class 4 commands: Block oriented write commands
139 //*------------------------------------------------
140
141 #define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
142 #define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
143 #define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 )
144
145
146 //*----------------------------------------
147 //* Class 6 commands: Group Write protect
148 //*----------------------------------------
149
150 #define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 )
151 #define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 )
152 #define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 )
153
154
155 //*----------------------------------------
156 //* Class 5 commands: Erase commands
157 //*----------------------------------------
158
159 #define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
160 #define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
161 #define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 )
162 #define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 )
163 #define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 )
164 #define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 )
165 #define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT )
166
167 //*----------------------------------------
168 //* Class 7 commands: Lock commands
169 //*----------------------------------------
170
171 #define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
172
173 //*-----------------------------------------------
174 // Class 8 commands: Application specific commands
175 //*-----------------------------------------------
176
177 #define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
178 #define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
179
180 #define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
181 #define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
182 #define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
183 #define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
184 #define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO )
185 #define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
186 #define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
187
188 #define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\
189 AT91C_SDCARD_STATUS_CMD +\
190 AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\
191 AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\
192 AT91C_SDCARD_APP_OP_COND_CMD +\
193 AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\
194 AT91C_SDCARD_SEND_SCR_CMD)
195
196 //*----------------------------------------
197 //* Class 9 commands: IO Mode commands
198 //*----------------------------------------
199
200 #define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT)
201 #define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
202
203 /////////////////////////////////////////////////////////////////////////////////////////////////////
204 // Functions returnals
205 /////////////////////////////////////////////////////////////////////////////////////////////////////
206 #define AT91C_CMD_SEND_OK 0 // Command ok
207 #define AT91C_CMD_SEND_ERROR -1 // Command failed
208 #define AT91C_INIT_OK 2 // Init Successfull
209 #define AT91C_INIT_ERROR 3 // Init Failed
210 #define AT91C_READ_OK 4 // Read Successfull
211 #define AT91C_READ_ERROR 5 // Read Failed
212 #define AT91C_WRITE_OK 6 // Write Successfull
213 #define AT91C_WRITE_ERROR 7 // Write Failed
214 #define AT91C_ERASE_OK 8 // Erase Successfull
215 #define AT91C_ERASE_ERROR 9 // Erase Failed
216 #define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull
217 #define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed
218
219 /////////////////////////////////////////////////////////////////////////////////////////////////////
220 // MCI_SR Errors
221 /////////////////////////////////////////////////////////////////////////////////////////////////////
222 #define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\
223 AT91C_MCI_OVRE |\
224 AT91C_MCI_DTOE |\
225 AT91C_MCI_DCRCE |\
226 AT91C_MCI_RTOE |\
227 AT91C_MCI_RENDE |\
228 AT91C_MCI_RCRCE |\
229 AT91C_MCI_RDIRE |\
230 AT91C_MCI_RINDE)
231
232 ////////////////////////////////////////////////////////////////////////////////////////////////////
233 // OCR Register
234 ////////////////////////////////////////////////////////////////////////////////////////////////////
235 #define AT91C_VDD_16_17 (1 << 4)
236 #define AT91C_VDD_17_18 (1 << 5)
237 #define AT91C_VDD_18_19 (1 << 6)
238 #define AT91C_VDD_19_20 (1 << 7)
239 #define AT91C_VDD_20_21 (1 << 8)
240 #define AT91C_VDD_21_22 (1 << 9)
241 #define AT91C_VDD_22_23 (1 << 10)
242 #define AT91C_VDD_23_24 (1 << 11)
243 #define AT91C_VDD_24_25 (1 << 12)
244 #define AT91C_VDD_25_26 (1 << 13)
245 #define AT91C_VDD_26_27 (1 << 14)
246 #define AT91C_VDD_27_28 (1 << 15)
247 #define AT91C_VDD_28_29 (1 << 16)
248 #define AT91C_VDD_29_30 (1 << 17)
249 #define AT91C_VDD_30_31 (1 << 18)
250 #define AT91C_VDD_31_32 (1 << 19)
251 #define AT91C_VDD_32_33 (1 << 20)
252 #define AT91C_VDD_33_34 (1 << 21)
253 #define AT91C_VDD_34_35 (1 << 22)
254 #define AT91C_VDD_35_36 (1 << 23)
255 #define AT91C_CARD_POWER_UP_BUSY (1 << 31)
256
257 #define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\
258 AT91C_VDD_28_29 +\
259 AT91C_VDD_29_30 +\
260 AT91C_VDD_30_31 +\
261 AT91C_VDD_31_32 +\
262 AT91C_VDD_32_33)
263
264 ////////////////////////////////////////////////////////////////////////////////////////////////////
265 // CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1)
266 ////////////////////////////////////////////////////////////////////////////////////////////////////
267 #define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus
268 #define AT91C_SR_IDLE (0 << 9)
269 #define AT91C_SR_READY (1 << 9)
270 #define AT91C_SR_IDENT (2 << 9)
271 #define AT91C_SR_STBY (3 << 9)
272 #define AT91C_SR_TRAN (4 << 9)
273 #define AT91C_SR_DATA (5 << 9)
274 #define AT91C_SR_RCV (6 << 9)
275 #define AT91C_SR_PRG (7 << 9)
276 #define AT91C_SR_DIS (8 << 9)
277
278 #define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN)
279
280 /////////////////////////////////////////////////////////////////////////////////////////////////////
281 // MMC CSD register header File
282 // AT91C_CSD_xxx_S for shift value
283 // AT91C_CSD_xxx_M for mask value
284 /////////////////////////////////////////////////////////////////////////////////////////////////////
285
286 // First Response INT <=> CSD[3] : bits 0 to 31
287 #define AT91C_CSD_BIT0_S 0 // [0:0]
288 #define AT91C_CSD_BIT0_M 0x01
289 #define AT91C_CSD_CRC_S 1 // [7:1]
290 #define AT91C_CSD_CRC_M 0x7F
291 #define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility
292 #define AT91C_CSD_MMC_ECC_M 0x03
293 #define AT91C_CSD_FILE_FMT_S 10 // [11:10]
294 #define AT91C_CSD_FILE_FMT_M 0x03
295 #define AT91C_CSD_TMP_WP_S 12 // [12:12]
296 #define AT91C_CSD_TMP_WP_M 0x01
297 #define AT91C_CSD_PERM_WP_S 13 // [13:13]
298 #define AT91C_CSD_PERM_WP_M 0x01
299 #define AT91C_CSD_COPY_S 14 // [14:14]
300 #define AT91C_CSD_COPY_M 0x01
301 #define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15]
302 #define AT91C_CSD_FILE_FMT_GRP_M 0x01
303 // reserved 16 // [20:16]
304 // reserved 0x1F
305 #define AT91C_CSD_WBLOCK_P_S 21 // [21:21]
306 #define AT91C_CSD_WBLOCK_P_M 0x01
307 #define AT91C_CSD_WBLEN_S 22 // [25:22]
308 #define AT91C_CSD_WBLEN_M 0x0F
309 #define AT91C_CSD_R2W_F_S 26 // [28:26]
310 #define AT91C_CSD_R2W_F_M 0x07
311 #define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility
312 #define AT91C_CSD_MMC_DEF_ECC_M 0x03
313 #define AT91C_CSD_WP_GRP_EN_S 31 // [31:31]
314 #define AT91C_CSD_WP_GRP_EN_M 0x01
315
316 // Seconde Response INT <=> CSD[2] : bits 32 to 63
317 #define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32]
318 #define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F
319 #define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39]
320 #define AT91C_CSD_v21_SECT_SIZE_M 0x7F
321 #define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46]
322 #define AT91C_CSD_v21_ER_BLEN_EN_M 0x01
323
324 #define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32]
325 #define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F
326 #define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37]
327 #define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F
328 #define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42]
329 #define AT91C_CSD_v22_SECT_SIZE_M 0x1F
330
331 #define AT91C_CSD_C_SIZE_M_S 15 // [49:47]
332 #define AT91C_CSD_C_SIZE_M_M 0x07
333 #define AT91C_CSD_VDD_WMAX_S 18 // [52:50]
334 #define AT91C_CSD_VDD_WMAX_M 0x07
335 #define AT91C_CSD_VDD_WMIN_S 21 // [55:53]
336 #define AT91C_CSD_VDD_WMIN_M 0x07
337 #define AT91C_CSD_RCUR_MAX_S 24 // [58:56]
338 #define AT91C_CSD_RCUR_MAX_M 0x07
339 #define AT91C_CSD_RCUR_MIN_S 27 // [61:59]
340 #define AT91C_CSD_RCUR_MIN_M 0x07
341 #define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE
342 #define AT91C_CSD_CSIZE_L_M 0x03
343
344 // Third Response INT <=> CSD[1] : bits 64 to 95
345 #define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE
346 #define AT91C_CSD_CSIZE_H_M 0x03FF
347 // reserved 10 // [75:74]
348 // reserved 0x03
349 #define AT91C_CSD_DSR_I_S 12 // [76:76]
350 #define AT91C_CSD_DSR_I_M 0x01
351 #define AT91C_CSD_RD_B_MIS_S 13 // [77:77]
352 #define AT91C_CSD_RD_B_MIS_M 0x01
353 #define AT91C_CSD_WR_B_MIS_S 14 // [78:78]
354 #define AT91C_CSD_WR_B_MIS_M 0x01
355 #define AT91C_CSD_RD_B_PAR_S 15 // [79:79]
356 #define AT91C_CSD_RD_B_PAR_M 0x01
357 #define AT91C_CSD_RD_B_LEN_S 16 // [83:80]
358 #define AT91C_CSD_RD_B_LEN_M 0x0F
359 #define AT91C_CSD_CCC_S 20 // [95:84]
360 #define AT91C_CSD_CCC_M 0x0FFF
361
362 // Fourth Response INT <=> CSD[0] : bits 96 to 127
363 #define AT91C_CSD_TRANS_SPEED_S 0 // [103:96]
364 #define AT91C_CSD_TRANS_SPEED_M 0xFF
365 #define AT91C_CSD_NSAC_S 8 // [111:104]
366 #define AT91C_CSD_NSAC_M 0xFF
367 #define AT91C_CSD_TAAC_S 16 // [119:112]
368 #define AT91C_CSD_TAAC_M 0xFF
369 // reserved 24 // [121:120]
370 // reserved 0x03
371 #define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility
372 #define AT91C_CSD_MMC_SPEC_VERS_M 0x0F
373 #define AT91C_CSD_STRUCT_S 30 // [127:126]
374 #define AT91C_CSD_STRUCT_M 0x03
375
376 /////////////////////////////////////////////////////////////////////////////////////////////////////
377
378 #endif
379