93fa2cf03c365c0a556c807c1f0c74ae237479a0
[openwrt/svn-archive/archive.git] / target / linux / at91 / patches-2.6.21 / 000-at91patches.patch
1 diff -urN -x CVS linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S
2 --- linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S Thu Apr 26 05:08:32 2007
3 +++ linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S Tue May 8 12:13:30 2007
4 @@ -67,6 +67,12 @@
5 cmp r7, r3
6 beq 99f
7
8 + @ Promwad Chub : 1181
9 + mov r3, #(MACH_TYPE_CHUB & 0xff)
10 + orr r3, r3, #(MACH_TYPE_CHUB & 0xff00)
11 + cmp r7, r3
12 + beq 99f
13 +
14 @ Unknown board, use the AT91RM9200DK board
15 @ mov r7, #MACH_TYPE_AT91RM9200
16 mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff)
17 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Kconfig linux-2.6-stable/arch/arm/mach-at91/Kconfig
18 --- linux-2.6.21/arch/arm/mach-at91/Kconfig Thu Apr 26 05:08:32 2007
19 +++ linux-2.6-stable/arch/arm/mach-at91/Kconfig Wed May 9 10:20:54 2007
20 @@ -17,6 +17,9 @@
21 config ARCH_AT91SAM9263
22 bool "AT91SAM9263"
23
24 +config ARCH_AT91SAM9RL
25 + bool "AT91SAM9RL"
26 +
27 endchoice
28
29 # ----------------------------------------------------------
30 @@ -87,6 +90,12 @@
31 help
32 Select this if you are using Sperry-Sun's KAFA board.
33
34 +config MACH_CHUB
35 + bool "Promwad Chub board"
36 + depends on ARCH_AT91RM9200
37 + help
38 + Select this if you are using Promwad's Chub board.
39 +
40 endif
41
42 # ----------------------------------------------------------
43 @@ -111,6 +120,13 @@
44 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
45 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
46
47 +config MACH_CAM60
48 + bool "KwikByte CAM60 board"
49 + depends on ARCH_AT91SAM9260
50 + help
51 + Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260.
52 + <http://www.kwikbyte.com>
53 +
54 endif
55
56 # ----------------------------------------------------------
57 @@ -145,6 +161,20 @@
58
59 # ----------------------------------------------------------
60
61 +if ARCH_AT91SAM9RL
62 +
63 +comment "AT91SAM9RL Board Type"
64 +
65 +config MACH_AT91SAM9RLEK
66 + bool "Atmel AT91SAM9RL-EK Evaluation Kit"
67 + depends on ARCH_AT91SAM9RL
68 + help
69 + Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
70 +
71 +endif
72 +
73 +# ----------------------------------------------------------
74 +
75 comment "AT91 Board Options"
76
77 config MTD_AT91_DATAFLASH_CARD
78 @@ -160,6 +190,20 @@
79 On AT91SAM926x boards both types of NAND flash can be present
80 (8 and 16 bit data bus width).
81
82 +config CSB300_WAKE_SW0
83 + bool "CSB300 SW0 irq0 wakeup"
84 + depends on MACH_CSB337 && PM
85 + help
86 + If you have a CSB300 connected to your CSB337, this lets
87 + SW0 serve as a wakeup button. It uses IRQ0.
88 +
89 +config CSB300_WAKE_SW1
90 + bool "CSB300 SW1 gpio wakeup"
91 + depends on MACH_CSB337 && PM
92 + help
93 + If you have a CSB300 connected to your CSB337, this lets
94 + SW1 serve as a wakeup button. It uses GPIO.
95 +
96 # ----------------------------------------------------------
97
98 comment "AT91 Feature Selections"
99 @@ -170,6 +214,20 @@
100 Select this if you need to program one or more of the PCK0..PCK3
101 programmable clock outputs.
102
103 +config ATMEL_TCLIB
104 + bool "Timer/Counter Library"
105 + help
106 + Select this if you want a library to allocate the Timer/Counter
107 + blocks found on many Atmel processors. This facilitates using
108 + these modules despite processor differences.
109 +
110 +config AT91_SLOW_CLOCK
111 + bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)"
112 + depends on PM && EXPERIMENTAL
113 + help
114 + Select this if you wish to put the CPU into slow clock mode
115 + while in the "Suspend to RAM" state, to save more power.
116 +
117 endmenu
118
119 endif
120 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Makefile linux-2.6-stable/arch/arm/mach-at91/Makefile
121 --- linux-2.6.21/arch/arm/mach-at91/Makefile Thu Apr 26 05:08:32 2007
122 +++ linux-2.6-stable/arch/arm/mach-at91/Makefile Wed May 9 12:37:19 2007
123 @@ -8,12 +8,15 @@
124 obj- :=
125
126 obj-$(CONFIG_PM) += pm.o
127 +obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
128 +obj-$(CONFIG_ATMEL_TCLIB) += tclib.o
129
130 # CPU-specific support
131 obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
132 obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
133 obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
134 obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
135 +obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
136
137 # AT91RM9200 board-specific support
138 obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
139 @@ -25,9 +28,11 @@
140 obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
141 obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
142 obj-$(CONFIG_MACH_KAFA) += board-kafa.o
143 +obj-$(CONFIG_MACH_CHUB) += board-chub.o
144
145 # AT91SAM9260 board-specific support
146 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
147 +obj-$(CONFIG_MACH_CAM60) += board-cam60.o
148
149 # AT91SAM9261 board-specific support
150 obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
151 @@ -35,9 +40,13 @@
152 # AT91SAM9263 board-specific support
153 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
154
155 +# AT91SAM9RL board-specific support
156 +obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
157 +
158 # LEDs support
159 led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
160 led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
161 +led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
162 led-$(CONFIG_MACH_CSB337) += leds.o
163 led-$(CONFIG_MACH_CSB637) += leds.o
164 led-$(CONFIG_MACH_KB9200) += leds.o
165 @@ -45,7 +54,7 @@
166 obj-$(CONFIG_LEDS) += $(led-y)
167
168 # VGA support
169 -#obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
170 +obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
171
172
173 ifeq ($(CONFIG_PM_DEBUG),y)
174 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c
175 --- linux-2.6.21/arch/arm/mach-at91/at91rm9200.c Thu Apr 26 05:08:32 2007
176 +++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c Tue May 8 12:13:30 2007
177 @@ -117,6 +117,21 @@
178 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
179 .type = CLK_TYPE_PERIPHERAL,
180 };
181 +static struct clk ssc0_clk = {
182 + .name = "ssc0_clk",
183 + .pmc_mask = 1 << AT91RM9200_ID_SSC0,
184 + .type = CLK_TYPE_PERIPHERAL,
185 +};
186 +static struct clk ssc1_clk = {
187 + .name = "ssc1_clk",
188 + .pmc_mask = 1 << AT91RM9200_ID_SSC1,
189 + .type = CLK_TYPE_PERIPHERAL,
190 +};
191 +static struct clk ssc2_clk = {
192 + .name = "ssc2_clk",
193 + .pmc_mask = 1 << AT91RM9200_ID_SSC2,
194 + .type = CLK_TYPE_PERIPHERAL,
195 +};
196 static struct clk tc0_clk = {
197 .name = "tc0_clk",
198 .pmc_mask = 1 << AT91RM9200_ID_TC0,
199 @@ -161,7 +176,9 @@
200 &udc_clk,
201 &twi_clk,
202 &spi_clk,
203 - // ssc 0 .. ssc2
204 + &ssc0_clk,
205 + &ssc1_clk,
206 + &ssc2_clk,
207 &tc0_clk,
208 &tc1_clk,
209 &tc2_clk,
210 @@ -250,6 +267,33 @@
211
212
213 /* --------------------------------------------------------------------
214 + * Timer/Counter library initialization
215 + * -------------------------------------------------------------------- */
216 +#ifdef CONFIG_ATMEL_TCLIB
217 +
218 +#include "tclib.h"
219 +
220 +static struct atmel_tcblock at91rm9200_tcblocks[] = {
221 + [0] = {
222 + .physaddr = AT91RM9200_BASE_TCB0,
223 + .irq = { AT91RM9200_ID_TC0, AT91RM9200_ID_TC1, AT91RM9200_ID_TC2 },
224 + .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
225 + },
226 + [1] = {
227 + .physaddr = AT91RM9200_BASE_TCB1,
228 + .irq = { AT91RM9200_ID_TC3, AT91RM9200_ID_TC4, AT91RM9200_ID_TC5 },
229 + .clk = { &tc3_clk, &tc4_clk, &tc5_clk },
230 + },
231 +};
232 +
233 +#define at91rm9200_tc_init() atmel_tc_init(at91rm9200_tcblocks, ARRAY_SIZE(at91rm9200_tcblocks))
234 +
235 +#else
236 +#define at91rm9200_tc_init() do {} while(0)
237 +#endif
238 +
239 +
240 +/* --------------------------------------------------------------------
241 * AT91RM9200 processor initialization
242 * -------------------------------------------------------------------- */
243 void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
244 @@ -271,6 +315,9 @@
245
246 /* Initialize GPIO subsystem */
247 at91_gpio_init(at91rm9200_gpio, banks);
248 +
249 + /* Initialize the Timer/Counter blocks */
250 + at91rm9200_tc_init();
251 }
252
253
254 @@ -284,28 +331,28 @@
255 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
256 7, /* Advanced Interrupt Controller (FIQ) */
257 7, /* System Peripherals */
258 - 0, /* Parallel IO Controller A */
259 - 0, /* Parallel IO Controller B */
260 - 0, /* Parallel IO Controller C */
261 - 0, /* Parallel IO Controller D */
262 - 6, /* USART 0 */
263 - 6, /* USART 1 */
264 - 6, /* USART 2 */
265 - 6, /* USART 3 */
266 + 1, /* Parallel IO Controller A */
267 + 1, /* Parallel IO Controller B */
268 + 1, /* Parallel IO Controller C */
269 + 1, /* Parallel IO Controller D */
270 + 5, /* USART 0 */
271 + 5, /* USART 1 */
272 + 5, /* USART 2 */
273 + 5, /* USART 3 */
274 0, /* Multimedia Card Interface */
275 - 4, /* USB Device Port */
276 - 0, /* Two-Wire Interface */
277 - 6, /* Serial Peripheral Interface */
278 - 5, /* Serial Synchronous Controller 0 */
279 - 5, /* Serial Synchronous Controller 1 */
280 - 5, /* Serial Synchronous Controller 2 */
281 + 2, /* USB Device Port */
282 + 6, /* Two-Wire Interface */
283 + 5, /* Serial Peripheral Interface */
284 + 4, /* Serial Synchronous Controller 0 */
285 + 4, /* Serial Synchronous Controller 1 */
286 + 4, /* Serial Synchronous Controller 2 */
287 0, /* Timer Counter 0 */
288 0, /* Timer Counter 1 */
289 0, /* Timer Counter 2 */
290 0, /* Timer Counter 3 */
291 0, /* Timer Counter 4 */
292 0, /* Timer Counter 5 */
293 - 3, /* USB Host port */
294 + 2, /* USB Host port */
295 3, /* Ethernet MAC */
296 0, /* Advanced Interrupt Controller (IRQ0) */
297 0, /* Advanced Interrupt Controller (IRQ1) */
298 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c
299 --- linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c Thu Apr 26 05:08:32 2007
300 +++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c Tue May 8 12:13:30 2007
301 @@ -480,7 +480,18 @@
302 * SPI
303 * -------------------------------------------------------------------- */
304
305 -#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
306 +#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) /* legacy SPI driver */
307 +#define SPI_DEVNAME "at91_spi"
308 +
309 +#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) /* SPI bitbanging driver */
310 +#define SPI_DEVNAME "at91_spi"
311 +
312 +#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) /* new SPI driver */
313 +#define SPI_DEVNAME "atmel_spi"
314 +
315 +#endif
316 +
317 +#ifdef SPI_DEVNAME
318 static u64 spi_dmamask = 0xffffffffUL;
319
320 static struct resource spi_resources[] = {
321 @@ -497,7 +508,7 @@
322 };
323
324 static struct platform_device at91rm9200_spi_device = {
325 - .name = "at91_spi",
326 + .name = SPI_DEVNAME,
327 .id = 0,
328 .dev = {
329 .dma_mask = &spi_dmamask,
330 @@ -606,6 +617,32 @@
331 #endif
332
333
334 +#if defined(CONFIG_NEW_LEDS)
335 +
336 +static struct platform_device at91_leds = {
337 + .name = "at91_leds",
338 + .id = -1,
339 +};
340 +
341 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
342 +{
343 + if (!nr)
344 + return;
345 +
346 + at91_leds.dev.platform_data = leds;
347 +
348 + for ( ; nr; nr--, leds++) {
349 + leds->index = nr; /* first record stores number of leds */
350 + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
351 + }
352 +
353 + platform_device_register(&at91_leds);
354 +}
355 +#else
356 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
357 +#endif
358 +
359 +
360 /* --------------------------------------------------------------------
361 * UART
362 * -------------------------------------------------------------------- */
363 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c
364 --- linux-2.6.21/arch/arm/mach-at91/at91sam9260.c Thu Apr 26 05:08:32 2007
365 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c Tue May 8 12:13:30 2007
366 @@ -119,6 +119,11 @@
367 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
368 .type = CLK_TYPE_PERIPHERAL,
369 };
370 +static struct clk ssc_clk = {
371 + .name = "ssc_clk",
372 + .pmc_mask = 1 << AT91SAM9260_ID_SSC,
373 + .type = CLK_TYPE_PERIPHERAL,
374 +};
375 static struct clk tc0_clk = {
376 .name = "tc0_clk",
377 .pmc_mask = 1 << AT91SAM9260_ID_TC0,
378 @@ -193,7 +198,7 @@
379 &twi_clk,
380 &spi0_clk,
381 &spi1_clk,
382 - // ssc
383 + &ssc_clk,
384 &tc0_clk,
385 &tc1_clk,
386 &tc2_clk,
387 @@ -264,6 +269,33 @@
388
389
390 /* --------------------------------------------------------------------
391 + * Timer/Counter library initialization
392 + * -------------------------------------------------------------------- */
393 +#ifdef CONFIG_ATMEL_TCLIB
394 +
395 +#include "tclib.h"
396 +
397 +static struct atmel_tcblock at91sam9260_tcblocks[] = {
398 + [0] = {
399 + .physaddr = AT91SAM9260_BASE_TCB0,
400 + .irq = { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 },
401 + .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
402 + },
403 + [1] = {
404 + .physaddr = AT91SAM9260_BASE_TCB1,
405 + .irq = { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 },
406 + .clk = { &tc3_clk, &tc4_clk, &tc5_clk },
407 + },
408 +};
409 +
410 +#define at91sam9260_tc_init() atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks))
411 +
412 +#else
413 +#define at91sam9260_tc_init() do {} while(0)
414 +#endif
415 +
416 +
417 +/* --------------------------------------------------------------------
418 * AT91SAM9260 processor initialization
419 * -------------------------------------------------------------------- */
420
421 @@ -310,6 +342,9 @@
422
423 /* Register GPIO subsystem */
424 at91_gpio_init(at91sam9260_gpio, 3);
425 +
426 + /* Initialize the Timer/Counter blocks */
427 + at91sam9260_tc_init();
428 }
429
430 /* --------------------------------------------------------------------
431 @@ -322,30 +357,30 @@
432 static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
433 7, /* Advanced Interrupt Controller */
434 7, /* System Peripherals */
435 - 0, /* Parallel IO Controller A */
436 - 0, /* Parallel IO Controller B */
437 - 0, /* Parallel IO Controller C */
438 + 1, /* Parallel IO Controller A */
439 + 1, /* Parallel IO Controller B */
440 + 1, /* Parallel IO Controller C */
441 0, /* Analog-to-Digital Converter */
442 - 6, /* USART 0 */
443 - 6, /* USART 1 */
444 - 6, /* USART 2 */
445 + 5, /* USART 0 */
446 + 5, /* USART 1 */
447 + 5, /* USART 2 */
448 0, /* Multimedia Card Interface */
449 - 4, /* USB Device Port */
450 - 0, /* Two-Wire Interface */
451 - 6, /* Serial Peripheral Interface 0 */
452 - 6, /* Serial Peripheral Interface 1 */
453 + 2, /* USB Device Port */
454 + 6, /* Two-Wire Interface */
455 + 5, /* Serial Peripheral Interface 0 */
456 + 5, /* Serial Peripheral Interface 1 */
457 5, /* Serial Synchronous Controller */
458 0,
459 0,
460 0, /* Timer Counter 0 */
461 0, /* Timer Counter 1 */
462 0, /* Timer Counter 2 */
463 - 3, /* USB Host port */
464 + 2, /* USB Host port */
465 3, /* Ethernet */
466 0, /* Image Sensor Interface */
467 - 6, /* USART 3 */
468 - 6, /* USART 4 */
469 - 6, /* USART 5 */
470 + 5, /* USART 3 */
471 + 5, /* USART 4 */
472 + 5, /* USART 5 */
473 0, /* Timer Counter 3 */
474 0, /* Timer Counter 4 */
475 0, /* Timer Counter 5 */
476 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c
477 --- linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c Thu Apr 26 05:08:32 2007
478 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c Tue May 8 12:13:30 2007
479 @@ -527,6 +527,32 @@
480 #endif
481
482
483 +#if defined(CONFIG_NEW_LEDS)
484 +
485 +static struct platform_device at91_leds = {
486 + .name = "at91_leds",
487 + .id = -1,
488 +};
489 +
490 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
491 +{
492 + if (!nr)
493 + return;
494 +
495 + at91_leds.dev.platform_data = leds;
496 +
497 + for ( ; nr; nr--, leds++) {
498 + leds->index = nr; /* first record stores number of leds */
499 + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
500 + }
501 +
502 + platform_device_register(&at91_leds);
503 +}
504 +#else
505 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
506 +#endif
507 +
508 +
509 /* --------------------------------------------------------------------
510 * UART
511 * -------------------------------------------------------------------- */
512 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c
513 --- linux-2.6.21/arch/arm/mach-at91/at91sam9261.c Thu Apr 26 05:08:32 2007
514 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c Tue May 8 12:13:30 2007
515 @@ -97,6 +97,21 @@
516 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
517 .type = CLK_TYPE_PERIPHERAL,
518 };
519 +static struct clk ssc0_clk = {
520 + .name = "ssc0_clk",
521 + .pmc_mask = 1 << AT91SAM9261_ID_SSC0,
522 + .type = CLK_TYPE_PERIPHERAL,
523 +};
524 +static struct clk ssc1_clk = {
525 + .name = "ssc1_clk",
526 + .pmc_mask = 1 << AT91SAM9261_ID_SSC1,
527 + .type = CLK_TYPE_PERIPHERAL,
528 +};
529 +static struct clk ssc2_clk = {
530 + .name = "ssc2_clk",
531 + .pmc_mask = 1 << AT91SAM9261_ID_SSC2,
532 + .type = CLK_TYPE_PERIPHERAL,
533 +};
534 static struct clk tc0_clk = {
535 .name = "tc0_clk",
536 .pmc_mask = 1 << AT91SAM9261_ID_TC0,
537 @@ -135,7 +150,9 @@
538 &twi_clk,
539 &spi0_clk,
540 &spi1_clk,
541 - // ssc 0 .. ssc2
542 + &ssc0_clk,
543 + &ssc1_clk,
544 + &ssc2_clk,
545 &tc0_clk,
546 &tc1_clk,
547 &tc2_clk,
548 @@ -230,6 +247,28 @@
549
550
551 /* --------------------------------------------------------------------
552 + * Timer/Counter library initialization
553 + * -------------------------------------------------------------------- */
554 +#ifdef CONFIG_ATMEL_TCLIB
555 +
556 +#include "tclib.h"
557 +
558 +static struct atmel_tcblock at91sam9261_tcblocks[] = {
559 + [0] = {
560 + .physaddr = AT91SAM9261_BASE_TCB0,
561 + .irq = { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 },
562 + .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
563 + }
564 +};
565 +
566 +#define at91sam9261_tc_init() atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks))
567 +
568 +#else
569 +#define at91sam9261_tc_init() do {} while(0)
570 +#endif
571 +
572 +
573 +/* --------------------------------------------------------------------
574 * AT91SAM9261 processor initialization
575 * -------------------------------------------------------------------- */
576
577 @@ -250,6 +289,9 @@
578
579 /* Register GPIO subsystem */
580 at91_gpio_init(at91sam9261_gpio, 3);
581 +
582 + /* Initialize the Timer/Counter blocks */
583 + at91sam9261_tc_init();
584 }
585
586 /* --------------------------------------------------------------------
587 @@ -262,25 +304,25 @@
588 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
589 7, /* Advanced Interrupt Controller */
590 7, /* System Peripherals */
591 - 0, /* Parallel IO Controller A */
592 - 0, /* Parallel IO Controller B */
593 - 0, /* Parallel IO Controller C */
594 + 1, /* Parallel IO Controller A */
595 + 1, /* Parallel IO Controller B */
596 + 1, /* Parallel IO Controller C */
597 0,
598 - 6, /* USART 0 */
599 - 6, /* USART 1 */
600 - 6, /* USART 2 */
601 + 5, /* USART 0 */
602 + 5, /* USART 1 */
603 + 5, /* USART 2 */
604 0, /* Multimedia Card Interface */
605 - 4, /* USB Device Port */
606 - 0, /* Two-Wire Interface */
607 - 6, /* Serial Peripheral Interface 0 */
608 - 6, /* Serial Peripheral Interface 1 */
609 - 5, /* Serial Synchronous Controller 0 */
610 - 5, /* Serial Synchronous Controller 1 */
611 - 5, /* Serial Synchronous Controller 2 */
612 + 2, /* USB Device Port */
613 + 6, /* Two-Wire Interface */
614 + 5, /* Serial Peripheral Interface 0 */
615 + 5, /* Serial Peripheral Interface 1 */
616 + 4, /* Serial Synchronous Controller 0 */
617 + 4, /* Serial Synchronous Controller 1 */
618 + 4, /* Serial Synchronous Controller 2 */
619 0, /* Timer Counter 0 */
620 0, /* Timer Counter 1 */
621 0, /* Timer Counter 2 */
622 - 3, /* USB Host port */
623 + 2, /* USB Host port */
624 3, /* LCD Controller */
625 0,
626 0,
627 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c
628 --- linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c Thu Apr 26 05:08:32 2007
629 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c Tue May 8 12:56:33 2007
630 @@ -14,6 +14,9 @@
631 #include <asm/mach/map.h>
632
633 #include <linux/platform_device.h>
634 +#include <linux/fb.h>
635 +
636 +#include <video/atmel_lcdc.h>
637
638 #include <asm/arch/board.h>
639 #include <asm/arch/gpio.h>
640 @@ -430,9 +433,9 @@
641 * LCD Controller
642 * -------------------------------------------------------------------- */
643
644 -#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
645 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
646 static u64 lcdc_dmamask = 0xffffffffUL;
647 -static struct at91fb_info lcdc_data;
648 +static struct atmel_lcdfb_info lcdc_data;
649
650 static struct resource lcdc_resources[] = {
651 [0] = {
652 @@ -455,7 +458,7 @@
653 };
654
655 static struct platform_device at91_lcdc_device = {
656 - .name = "at91-fb",
657 + .name = "atmel_lcdfb",
658 .id = 0,
659 .dev = {
660 .dma_mask = &lcdc_dmamask,
661 @@ -466,7 +469,7 @@
662 .num_resources = ARRAY_SIZE(lcdc_resources),
663 };
664
665 -void __init at91_add_device_lcdc(struct at91fb_info *data)
666 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
667 {
668 if (!data) {
669 return;
670 @@ -499,7 +502,7 @@
671 platform_device_register(&at91_lcdc_device);
672 }
673 #else
674 -void __init at91_add_device_lcdc(struct at91fb_info *data) {}
675 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
676 #endif
677
678
679 @@ -525,6 +528,32 @@
680 #endif
681
682
683 +#if defined(CONFIG_NEW_LEDS)
684 +
685 +static struct platform_device at91_leds = {
686 + .name = "at91_leds",
687 + .id = -1,
688 +};
689 +
690 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
691 +{
692 + if (!nr)
693 + return;
694 +
695 + at91_leds.dev.platform_data = leds;
696 +
697 + for ( ; nr; nr--, leds++) {
698 + leds->index = nr; /* first record stores number of leds */
699 + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
700 + }
701 +
702 + platform_device_register(&at91_leds);
703 +}
704 +#else
705 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
706 +#endif
707 +
708 +
709 /* --------------------------------------------------------------------
710 * UART
711 * -------------------------------------------------------------------- */
712 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c
713 --- linux-2.6.21/arch/arm/mach-at91/at91sam9263.c Thu Apr 26 05:08:32 2007
714 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c Tue May 8 12:13:30 2007
715 @@ -87,6 +87,11 @@
716 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
717 .type = CLK_TYPE_PERIPHERAL,
718 };
719 +static struct clk can_clk = {
720 + .name = "can_clk",
721 + .pmc_mask = 1 << AT91SAM9263_ID_CAN,
722 + .type = CLK_TYPE_PERIPHERAL,
723 +};
724 static struct clk twi_clk = {
725 .name = "twi_clk",
726 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
727 @@ -102,16 +107,46 @@
728 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
729 .type = CLK_TYPE_PERIPHERAL,
730 };
731 +static struct clk ssc0_clk = {
732 + .name = "ssc0_clk",
733 + .pmc_mask = 1 << AT91SAM9263_ID_SSC0,
734 + .type = CLK_TYPE_PERIPHERAL,
735 +};
736 +static struct clk ssc1_clk = {
737 + .name = "ssc1_clk",
738 + .pmc_mask = 1 << AT91SAM9263_ID_SSC1,
739 + .type = CLK_TYPE_PERIPHERAL,
740 +};
741 +static struct clk ac97_clk = {
742 + .name = "ac97_clk",
743 + .pmc_mask = 1 << AT91SAM9263_ID_AC97C,
744 + .type = CLK_TYPE_PERIPHERAL,
745 +};
746 static struct clk tcb_clk = {
747 .name = "tcb_clk",
748 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
749 .type = CLK_TYPE_PERIPHERAL,
750 };
751 +static struct clk pwmc_clk = {
752 + .name = "pwmc_clk",
753 + .pmc_mask = 1 << AT91SAM9263_ID_PWMC,
754 + .type = CLK_TYPE_PERIPHERAL,
755 +};
756 static struct clk macb_clk = {
757 .name = "macb_clk",
758 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
759 .type = CLK_TYPE_PERIPHERAL,
760 };
761 +static struct clk dma_clk = {
762 + .name = "dma_clk",
763 + .pmc_mask = 1 << AT91SAM9263_ID_DMA,
764 + .type = CLK_TYPE_PERIPHERAL,
765 +};
766 +static struct clk twodge_clk = {
767 + .name = "2dge_clk",
768 + .pmc_mask = 1 << AT91SAM9263_ID_2DGE,
769 + .type = CLK_TYPE_PERIPHERAL,
770 +};
771 static struct clk udc_clk = {
772 .name = "udc_clk",
773 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
774 @@ -142,20 +177,21 @@
775 &usart2_clk,
776 &mmc0_clk,
777 &mmc1_clk,
778 - // can
779 + &can_clk,
780 &twi_clk,
781 &spi0_clk,
782 &spi1_clk,
783 - // ssc0 .. ssc1
784 - // ac97
785 + &ssc0_clk,
786 + &ssc1_clk,
787 + &ac97_clk,
788 &tcb_clk,
789 - // pwmc
790 + &pwmc_clk,
791 &macb_clk,
792 - // 2dge
793 + &twodge_clk,
794 &udc_clk,
795 &isi_clk,
796 &lcdc_clk,
797 - // dma
798 + &dma_clk,
799 &ohci_clk,
800 // irq0 .. irq1
801 };
802 @@ -237,6 +273,28 @@
803
804
805 /* --------------------------------------------------------------------
806 + * Timer/Counter library initialization
807 + * -------------------------------------------------------------------- */
808 +#ifdef CONFIG_ATMEL_TCLIB
809 +
810 +#include "tclib.h"
811 +
812 +static struct atmel_tcblock at91sam9263_tcblocks[] = {
813 + [0] = {
814 + .physaddr = AT91SAM9263_BASE_TCB0,
815 + .irq = { AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB },
816 + .clk = { &tcb_clk, &tcb_clk, &tcb_clk },
817 + }
818 +};
819 +
820 +#define at91sam9263_tc_init() atmel_tc_init(at91sam9263_tcblocks, ARRAY_SIZE(at91sam9263_tcblocks))
821 +
822 +#else
823 +#define at91sam9263_tc_init() do {} while(0)
824 +#endif
825 +
826 +
827 +/* --------------------------------------------------------------------
828 * AT91SAM9263 processor initialization
829 * -------------------------------------------------------------------- */
830
831 @@ -256,6 +314,9 @@
832
833 /* Register GPIO subsystem */
834 at91_gpio_init(at91sam9263_gpio, 5);
835 +
836 + /* Initialize the Timer/Counter blocks */
837 + at91sam9263_tc_init();
838 }
839
840 /* --------------------------------------------------------------------
841 @@ -268,34 +329,34 @@
842 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
843 7, /* Advanced Interrupt Controller (FIQ) */
844 7, /* System Peripherals */
845 - 0, /* Parallel IO Controller A */
846 - 0, /* Parallel IO Controller B */
847 - 0, /* Parallel IO Controller C, D and E */
848 + 1, /* Parallel IO Controller A */
849 + 1, /* Parallel IO Controller B */
850 + 1, /* Parallel IO Controller C, D and E */
851 0,
852 0,
853 - 6, /* USART 0 */
854 - 6, /* USART 1 */
855 - 6, /* USART 2 */
856 + 5, /* USART 0 */
857 + 5, /* USART 1 */
858 + 5, /* USART 2 */
859 0, /* Multimedia Card Interface 0 */
860 0, /* Multimedia Card Interface 1 */
861 - 4, /* CAN */
862 - 0, /* Two-Wire Interface */
863 - 6, /* Serial Peripheral Interface 0 */
864 - 6, /* Serial Peripheral Interface 1 */
865 - 5, /* Serial Synchronous Controller 0 */
866 - 5, /* Serial Synchronous Controller 1 */
867 - 6, /* AC97 Controller */
868 + 3, /* CAN */
869 + 6, /* Two-Wire Interface */
870 + 5, /* Serial Peripheral Interface 0 */
871 + 5, /* Serial Peripheral Interface 1 */
872 + 4, /* Serial Synchronous Controller 0 */
873 + 4, /* Serial Synchronous Controller 1 */
874 + 5, /* AC97 Controller */
875 0, /* Timer Counter 0, 1 and 2 */
876 0, /* Pulse Width Modulation Controller */
877 3, /* Ethernet */
878 0,
879 0, /* 2D Graphic Engine */
880 - 3, /* USB Device Port */
881 + 2, /* USB Device Port */
882 0, /* Image Sensor Interface */
883 3, /* LDC Controller */
884 0, /* DMA Controller */
885 0,
886 - 3, /* USB Host port */
887 + 2, /* USB Host port */
888 0, /* Advanced Interrupt Controller (IRQ0) */
889 0, /* Advanced Interrupt Controller (IRQ1) */
890 };
891 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c
892 --- linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c Thu Apr 26 05:08:32 2007
893 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c Thu May 10 12:23:46 2007
894 @@ -13,6 +13,9 @@
895 #include <asm/mach/map.h>
896
897 #include <linux/platform_device.h>
898 +#include <linux/fb.h>
899 +
900 +#include <video/atmel_lcdc.h>
901
902 #include <asm/arch/board.h>
903 #include <asm/arch/gpio.h>
904 @@ -573,6 +576,180 @@
905
906
907 /* --------------------------------------------------------------------
908 + * AC97
909 + * -------------------------------------------------------------------- */
910 +
911 +#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
912 +static u64 ac97_dmamask = 0xffffffffUL;
913 +static struct atmel_ac97_data ac97_data;
914 +
915 +static struct resource ac97_resources[] = {
916 + [0] = {
917 + .start = AT91SAM9263_BASE_AC97C,
918 + .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
919 + .flags = IORESOURCE_MEM,
920 + },
921 + [1] = {
922 + .start = AT91SAM9263_ID_AC97C,
923 + .end = AT91SAM9263_ID_AC97C,
924 + .flags = IORESOURCE_IRQ,
925 + },
926 +};
927 +
928 +static struct platform_device at91sam9263_ac97_device = {
929 + .name = "ac97c",
930 + .id = 1,
931 + .dev = {
932 + .dma_mask = &ac97_dmamask,
933 + .coherent_dma_mask = 0xffffffff,
934 + .platform_data = &ac97_data,
935 + },
936 + .resource = ac97_resources,
937 + .num_resources = ARRAY_SIZE(ac97_resources),
938 +};
939 +
940 +void __init at91_add_device_ac97(struct atmel_ac97_data *data)
941 +{
942 + if (!data)
943 + return;
944 +
945 + at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
946 + at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
947 + at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
948 + at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
949 +
950 + /* reset */
951 + if (data->reset_pin)
952 + at91_set_gpio_output(data->reset_pin, 0);
953 +
954 + ac97_data = *ek_data;
955 + platform_device_register(&at91sam9263_ac97_device);
956 +}
957 +#else
958 +void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
959 +#endif
960 +
961 +
962 +/* --------------------------------------------------------------------
963 + * Image Sensor Interface
964 + * -------------------------------------------------------------------- */
965 +
966 +#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
967 +
968 +struct resource isi_resources[] = {
969 + [0] = {
970 + .start = AT91SAM9263_BASE_ISI,
971 + .end = AT91SAM9263_BASE_ISI + SZ_16K - 1,
972 + .flags = IORESOURCE_MEM,
973 + },
974 + [1] = {
975 + .start = AT91SAM9263_ID_ISI,
976 + .end = AT91SAM9263_ID_ISI,
977 + .flags = IORESOURCE_IRQ,
978 + },
979 +};
980 +
981 +static struct platform_device at91sam9263_isi_device = {
982 + .name = "at91_isi",
983 + .id = -1,
984 + .resource = isi_resources,
985 + .num_resources = ARRAY_SIZE(isi_resources),
986 +};
987 +
988 +void __init at91_add_device_isi(void)
989 +{
990 + at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */
991 + at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */
992 + at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */
993 + at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */
994 + at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */
995 + at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */
996 + at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */
997 + at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */
998 + at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */
999 + at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */
1000 + at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */
1001 + at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */
1002 + at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */
1003 + at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */
1004 + at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */
1005 + at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */
1006 +}
1007 +#else
1008 +void __init at91_add_device_isi(void) {}
1009 +#endif
1010 +
1011 +
1012 +/* --------------------------------------------------------------------
1013 + * LCD Controller
1014 + * -------------------------------------------------------------------- */
1015 +
1016 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
1017 +static u64 lcdc_dmamask = 0xffffffffUL;
1018 +static struct atmel_lcdfb_info lcdc_data;
1019 +
1020 +static struct resource lcdc_resources[] = {
1021 + [0] = {
1022 + .start = AT91SAM9263_LCDC_BASE,
1023 + .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
1024 + .flags = IORESOURCE_MEM,
1025 + },
1026 + [1] = {
1027 + .start = AT91SAM9263_ID_LCDC,
1028 + .end = AT91SAM9263_ID_LCDC,
1029 + .flags = IORESOURCE_IRQ,
1030 + },
1031 +};
1032 +
1033 +static struct platform_device at91_lcdc_device = {
1034 + .name = "atmel_lcdfb",
1035 + .id = 0,
1036 + .dev = {
1037 + .dma_mask = &lcdc_dmamask,
1038 + .coherent_dma_mask = 0xffffffff,
1039 + .platform_data = &lcdc_data,
1040 + },
1041 + .resource = lcdc_resources,
1042 + .num_resources = ARRAY_SIZE(lcdc_resources),
1043 +};
1044 +
1045 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
1046 +{
1047 + if (!data)
1048 + return;
1049 +
1050 + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
1051 + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
1052 + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
1053 + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
1054 + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
1055 + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
1056 + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
1057 + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
1058 + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
1059 + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
1060 + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
1061 + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
1062 + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
1063 + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
1064 + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
1065 + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
1066 + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
1067 + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
1068 + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
1069 + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
1070 + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
1071 + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
1072 +
1073 + lcdc_data = *data;
1074 + platform_device_register(&at91_lcdc_device);
1075 +}
1076 +#else
1077 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
1078 +#endif
1079 +
1080 +
1081 +/* --------------------------------------------------------------------
1082 * LEDs
1083 * -------------------------------------------------------------------- */
1084
1085 @@ -594,6 +771,32 @@
1086 #endif
1087
1088
1089 +#if defined(CONFIG_NEW_LEDS)
1090 +
1091 +static struct platform_device at91_leds = {
1092 + .name = "at91_leds",
1093 + .id = -1,
1094 +};
1095 +
1096 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
1097 +{
1098 + if (!nr)
1099 + return;
1100 +
1101 + at91_leds.dev.platform_data = leds;
1102 +
1103 + for ( ; nr; nr--, leds++) {
1104 + leds->index = nr; /* first record stores number of leds */
1105 + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
1106 + }
1107 +
1108 + platform_device_register(&at91_leds);
1109 +}
1110 +#else
1111 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
1112 +#endif
1113 +
1114 +
1115 /* --------------------------------------------------------------------
1116 * UART
1117 * -------------------------------------------------------------------- */
1118 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c
1119 --- linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c Thu Jan 1 02:00:00 1970
1120 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c Fri May 11 15:48:14 2007
1121 @@ -0,0 +1,366 @@
1122 +/*
1123 + * arch/arm/mach-at91/at91sam9rl.c
1124 + *
1125 + * Copyright (C) 2005 SAN People
1126 + * Copyright (C) 2007 Atmel Corporation
1127 + *
1128 + * This file is subject to the terms and conditions of the GNU General Public
1129 + * License. See the file COPYING in the main directory of this archive for
1130 + * more details.
1131 + */
1132 +
1133 +#include <linux/module.h>
1134 +
1135 +#include <asm/mach/arch.h>
1136 +#include <asm/mach/map.h>
1137 +#include <asm/arch/cpu.h>
1138 +#include <asm/arch/at91sam9rl.h>
1139 +#include <asm/arch/at91_pmc.h>
1140 +#include <asm/arch/at91_rstc.h>
1141 +
1142 +#include "generic.h"
1143 +#include "clock.h"
1144 +
1145 +static struct map_desc at91sam9rl_io_desc[] __initdata = {
1146 + {
1147 + .virtual = AT91_VA_BASE_SYS,
1148 + .pfn = __phys_to_pfn(AT91_BASE_SYS),
1149 + .length = SZ_16K,
1150 + .type = MT_DEVICE,
1151 + },
1152 +};
1153 +
1154 +static struct map_desc at91sam9rl_sram_desc[] __initdata = {
1155 + {
1156 + .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
1157 + .type = MT_DEVICE,
1158 + }
1159 +};
1160 +
1161 +/* --------------------------------------------------------------------
1162 + * Clocks
1163 + * -------------------------------------------------------------------- */
1164 +
1165 +/*
1166 + * The peripheral clocks.
1167 + */
1168 +static struct clk pioA_clk = {
1169 + .name = "pioA_clk",
1170 + .pmc_mask = 1 << AT91SAM9RL_ID_PIOA,
1171 + .type = CLK_TYPE_PERIPHERAL,
1172 +};
1173 +static struct clk pioB_clk = {
1174 + .name = "pioB_clk",
1175 + .pmc_mask = 1 << AT91SAM9RL_ID_PIOB,
1176 + .type = CLK_TYPE_PERIPHERAL,
1177 +};
1178 +static struct clk pioC_clk = {
1179 + .name = "pioC_clk",
1180 + .pmc_mask = 1 << AT91SAM9RL_ID_PIOC,
1181 + .type = CLK_TYPE_PERIPHERAL,
1182 +};
1183 +static struct clk pioD_clk = {
1184 + .name = "pioD_clk",
1185 + .pmc_mask = 1 << AT91SAM9RL_ID_PIOD,
1186 + .type = CLK_TYPE_PERIPHERAL,
1187 +};
1188 +static struct clk usart0_clk = {
1189 + .name = "usart0_clk",
1190 + .pmc_mask = 1 << AT91SAM9RL_ID_US0,
1191 + .type = CLK_TYPE_PERIPHERAL,
1192 +};
1193 +static struct clk usart1_clk = {
1194 + .name = "usart1_clk",
1195 + .pmc_mask = 1 << AT91SAM9RL_ID_US1,
1196 + .type = CLK_TYPE_PERIPHERAL,
1197 +};
1198 +static struct clk usart2_clk = {
1199 + .name = "usart2_clk",
1200 + .pmc_mask = 1 << AT91SAM9RL_ID_US2,
1201 + .type = CLK_TYPE_PERIPHERAL,
1202 +};
1203 +static struct clk usart3_clk = {
1204 + .name = "usart3_clk",
1205 + .pmc_mask = 1 << AT91SAM9RL_ID_US3,
1206 + .type = CLK_TYPE_PERIPHERAL,
1207 +};
1208 +static struct clk mmc_clk = {
1209 + .name = "mci_clk",
1210 + .pmc_mask = 1 << AT91SAM9RL_ID_MCI,
1211 + .type = CLK_TYPE_PERIPHERAL,
1212 +};
1213 +static struct clk twi0_clk = {
1214 + .name = "twi0_clk",
1215 + .pmc_mask = 1 << AT91SAM9RL_ID_TWI0,
1216 + .type = CLK_TYPE_PERIPHERAL,
1217 +};
1218 +static struct clk twi1_clk = {
1219 + .name = "twi1_clk",
1220 + .pmc_mask = 1 << AT91SAM9RL_ID_TWI1,
1221 + .type = CLK_TYPE_PERIPHERAL,
1222 +};
1223 +static struct clk spi_clk = {
1224 + .name = "spi_clk",
1225 + .pmc_mask = 1 << AT91SAM9RL_ID_SPI,
1226 + .type = CLK_TYPE_PERIPHERAL,
1227 +};
1228 +static struct clk ssc0_clk = {
1229 + .name = "ssc0_clk",
1230 + .pmc_mask = 1 << AT91SAM9RL_ID_SSC0,
1231 + .type = CLK_TYPE_PERIPHERAL,
1232 +};
1233 +static struct clk ssc1_clk = {
1234 + .name = "ssc1_clk",
1235 + .pmc_mask = 1 << AT91SAM9RL_ID_SSC1,
1236 + .type = CLK_TYPE_PERIPHERAL,
1237 +};
1238 +static struct clk tc0_clk = {
1239 + .name = "tc0_clk",
1240 + .pmc_mask = 1 << AT91SAM9RL_ID_TC0,
1241 + .type = CLK_TYPE_PERIPHERAL,
1242 +};
1243 +static struct clk tc1_clk = {
1244 + .name = "tc1_clk",
1245 + .pmc_mask = 1 << AT91SAM9RL_ID_TC1,
1246 + .type = CLK_TYPE_PERIPHERAL,
1247 +};
1248 +static struct clk tc2_clk = {
1249 + .name = "tc2_clk",
1250 + .pmc_mask = 1 << AT91SAM9RL_ID_TC2,
1251 + .type = CLK_TYPE_PERIPHERAL,
1252 +};
1253 +static struct clk pwmc_clk = {
1254 + .name = "pwmc_clk",
1255 + .pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
1256 + .type = CLK_TYPE_PERIPHERAL,
1257 +};
1258 +static struct clk tsc_clk = {
1259 + .name = "tsc_clk",
1260 + .pmc_mask = 1 << AT91SAM9RL_ID_TSC,
1261 + .type = CLK_TYPE_PERIPHERAL,
1262 +};
1263 +static struct clk dma_clk = {
1264 + .name = "dma_clk",
1265 + .pmc_mask = 1 << AT91SAM9RL_ID_DMA,
1266 + .type = CLK_TYPE_PERIPHERAL,
1267 +};
1268 +static struct clk udphs_clk = {
1269 + .name = "udphs_clk",
1270 + .pmc_mask = 1 << AT91SAM9RL_ID_UDPHS,
1271 + .type = CLK_TYPE_PERIPHERAL,
1272 +};
1273 +static struct clk lcdc_clk = {
1274 + .name = "lcdc_clk",
1275 + .pmc_mask = 1 << AT91SAM9RL_ID_LCDC,
1276 + .type = CLK_TYPE_PERIPHERAL,
1277 +};
1278 +static struct clk ac97_clk = {
1279 + .name = "ac97_clk",
1280 + .pmc_mask = 1 << AT91SAM9RL_ID_AC97C,
1281 + .type = CLK_TYPE_PERIPHERAL,
1282 +};
1283 +
1284 +static struct clk *periph_clocks[] __initdata = {
1285 + &pioA_clk,
1286 + &pioB_clk,
1287 + &pioC_clk,
1288 + &pioD_clk,
1289 + &usart0_clk,
1290 + &usart1_clk,
1291 + &usart2_clk,
1292 + &usart3_clk,
1293 + &mmc_clk,
1294 + &twi0_clk,
1295 + &twi1_clk,
1296 + &spi_clk,
1297 + &ssc0_clk,
1298 + &ssc1_clk,
1299 + &tc0_clk,
1300 + &tc1_clk,
1301 + &tc2_clk,
1302 + &pwmc_clk,
1303 + &tsc_clk,
1304 + &dma_clk,
1305 + &udphs_clk,
1306 + &lcdc_clk,
1307 + &ac97_clk,
1308 + // irq0
1309 +};
1310 +
1311 +/*
1312 + * The two programmable clocks.
1313 + * You must configure pin multiplexing to bring these signals out.
1314 + */
1315 +static struct clk pck0 = {
1316 + .name = "pck0",
1317 + .pmc_mask = AT91_PMC_PCK0,
1318 + .type = CLK_TYPE_PROGRAMMABLE,
1319 + .id = 0,
1320 +};
1321 +static struct clk pck1 = {
1322 + .name = "pck1",
1323 + .pmc_mask = AT91_PMC_PCK1,
1324 + .type = CLK_TYPE_PROGRAMMABLE,
1325 + .id = 1,
1326 +};
1327 +
1328 +static void __init at91sam9rl_register_clocks(void)
1329 +{
1330 + int i;
1331 +
1332 + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
1333 + clk_register(periph_clocks[i]);
1334 +
1335 + clk_register(&pck0);
1336 + clk_register(&pck1);
1337 +}
1338 +
1339 +/* --------------------------------------------------------------------
1340 + * GPIO
1341 + * -------------------------------------------------------------------- */
1342 +
1343 +static struct at91_gpio_bank at91sam9rl_gpio[] = {
1344 + {
1345 + .id = AT91SAM9RL_ID_PIOA,
1346 + .offset = AT91_PIOA,
1347 + .clock = &pioA_clk,
1348 + }, {
1349 + .id = AT91SAM9RL_ID_PIOB,
1350 + .offset = AT91_PIOB,
1351 + .clock = &pioB_clk,
1352 + }, {
1353 + .id = AT91SAM9RL_ID_PIOC,
1354 + .offset = AT91_PIOC,
1355 + .clock = &pioC_clk,
1356 + }, {
1357 + .id = AT91SAM9RL_ID_PIOD,
1358 + .offset = AT91_PIOD,
1359 + .clock = &pioD_clk,
1360 + }
1361 +};
1362 +
1363 +static void at91sam9rl_reset(void)
1364 +{
1365 + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
1366 +}
1367 +
1368 +
1369 +/* --------------------------------------------------------------------
1370 + * Timer/Counter library initialization
1371 + * -------------------------------------------------------------------- */
1372 +#ifdef CONFIG_ATMEL_TCLIB
1373 +
1374 +#include "tclib.h"
1375 +
1376 +static struct atmel_tcblock at91sam9rl_tcblocks[] = {
1377 + [0] = {
1378 + .physaddr = AT91SAM9RL_BASE_TCB0,
1379 + .irq = { AT91SAM9RL_ID_TC0, AT91SAM9RL_ID_TC1, AT91SAM9RL_ID_TC2 },
1380 + .clk = { &tc0_clk, &tc1_clk, &tc2_clk },
1381 + }
1382 +};
1383 +
1384 +#define at91sam9rl_tc_init() atmel_tc_init(at91sam9rl_tcblocks, ARRAY_SIZE(at91sam9rl_tcblocks))
1385 +
1386 +#else
1387 +#define at91sam9rl_tc_init() do {} while(0)
1388 +#endif
1389 +
1390 +
1391 +/* --------------------------------------------------------------------
1392 + * AT91SAM9RL processor initialization
1393 + * -------------------------------------------------------------------- */
1394 +
1395 +void __init at91sam9rl_initialize(unsigned long main_clock)
1396 +{
1397 + unsigned long cidr, sram_size;
1398 +
1399 + /* Map peripherals */
1400 + iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
1401 +
1402 + cidr = at91_sys_read(AT91_DBGU_CIDR);
1403 +
1404 + switch (cidr & AT91_CIDR_SRAMSIZ) {
1405 + case AT91_CIDR_SRAMSIZ_32K:
1406 + sram_size = 2 * SZ_16K;
1407 + break;
1408 + case AT91_CIDR_SRAMSIZ_16K:
1409 + default:
1410 + sram_size = SZ_16K;
1411 + }
1412 +
1413 + at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
1414 + at91sam9rl_sram_desc->length = sram_size;
1415 +
1416 + /* Map SRAM */
1417 + iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
1418 +
1419 + at91_arch_reset = at91sam9rl_reset;
1420 + at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
1421 +
1422 + /* Init clock subsystem */
1423 + at91_clock_init(main_clock);
1424 +
1425 + /* Register the processor-specific clocks */
1426 + at91sam9rl_register_clocks();
1427 +
1428 + /* Register GPIO subsystem */
1429 + at91_gpio_init(at91sam9rl_gpio, 4);
1430 +
1431 + /* Initialize the Timer/Counter blocks */
1432 + at91sam9rl_tc_init();
1433 +}
1434 +
1435 +/* --------------------------------------------------------------------
1436 + * Interrupt initialization
1437 + * -------------------------------------------------------------------- */
1438 +
1439 +/*
1440 + * The default interrupt priority levels (0 = lowest, 7 = highest).
1441 + */
1442 +static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
1443 + 7, /* Advanced Interrupt Controller */
1444 + 7, /* System Peripherals */
1445 + 1, /* Parallel IO Controller A */
1446 + 1, /* Parallel IO Controller B */
1447 + 1, /* Parallel IO Controller C */
1448 + 1, /* Parallel IO Controller D */
1449 + 5, /* USART 0 */
1450 + 5, /* USART 1 */
1451 + 5, /* USART 2 */
1452 + 5, /* USART 3 */
1453 + 0, /* Multimedia Card Interface */
1454 + 6, /* Two-Wire Interface 0 */
1455 + 6, /* Two-Wire Interface 1 */
1456 + 5, /* Serial Peripheral Interface */
1457 + 4, /* Serial Synchronous Controller 0 */
1458 + 4, /* Serial Synchronous Controller 1 */
1459 + 0, /* Timer Counter 0 */
1460 + 0, /* Timer Counter 1 */
1461 + 0, /* Timer Counter 2 */
1462 + 0,
1463 + 0, /* Touch Screen Controller */
1464 + 0, /* DMA Controller */
1465 + 2, /* USB Device High speed port */
1466 + 2, /* LCD Controller */
1467 + 6, /* AC97 Controller */
1468 + 0,
1469 + 0,
1470 + 0,
1471 + 0,
1472 + 0,
1473 + 0,
1474 + 0, /* Advanced Interrupt Controller */
1475 +};
1476 +
1477 +void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
1478 +{
1479 + if (!priority)
1480 + priority = at91sam9rl_default_irq_priority;
1481 +
1482 + /* Initialize the AIC interrupt controller */
1483 + at91_aic_init(priority);
1484 +
1485 + /* Enable GPIO interrupts */
1486 + at91_gpio_irq_setup();
1487 +}
1488 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c
1489 --- linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c Thu Jan 1 02:00:00 1970
1490 +++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c Fri May 11 16:03:25 2007
1491 @@ -0,0 +1,660 @@
1492 +/*
1493 + * Copyright (C) 2007 Atmel Corporation
1494 + *
1495 + * This file is subject to the terms and conditions of the GNU General Public
1496 + * License. See the file COPYING in the main directory of this archive for
1497 + * more details.
1498 + */
1499 +
1500 +#include <asm/mach/arch.h>
1501 +#include <asm/mach/map.h>
1502 +
1503 +#include <linux/platform_device.h>
1504 +#include <linux/fb.h>
1505 +
1506 +#include <video/atmel_lcdc.h>
1507 +
1508 +#include <asm/arch/board.h>
1509 +#include <asm/arch/gpio.h>
1510 +#include <asm/arch/at91sam9rl.h>
1511 +#include <asm/arch/at91sam9rl_matrix.h>
1512 +#include <asm/arch/at91sam926x_mc.h>
1513 +
1514 +#include "generic.h"
1515 +
1516 +#define SZ_512 0x00000200
1517 +#define SZ_256 0x00000100
1518 +#define SZ_16 0x00000010
1519 +
1520 +
1521 +/* --------------------------------------------------------------------
1522 + * MMC / SD
1523 + * -------------------------------------------------------------------- */
1524 +
1525 +#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
1526 +static u64 mmc_dmamask = 0xffffffffUL;
1527 +static struct at91_mmc_data mmc_data;
1528 +
1529 +static struct resource mmc_resources[] = {
1530 + [0] = {
1531 + .start = AT91SAM9RL_BASE_MCI,
1532 + .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
1533 + .flags = IORESOURCE_MEM,
1534 + },
1535 + [1] = {
1536 + .start = AT91SAM9RL_ID_MCI,
1537 + .end = AT91SAM9RL_ID_MCI,
1538 + .flags = IORESOURCE_IRQ,
1539 + },
1540 +};
1541 +
1542 +static struct platform_device at91sam9rl_mmc_device = {
1543 + .name = "at91_mci",
1544 + .id = -1,
1545 + .dev = {
1546 + .dma_mask = &mmc_dmamask,
1547 + .coherent_dma_mask = 0xffffffff,
1548 + .platform_data = &mmc_data,
1549 + },
1550 + .resource = mmc_resources,
1551 + .num_resources = ARRAY_SIZE(mmc_resources),
1552 +};
1553 +
1554 +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
1555 +{
1556 + if (!data)
1557 + return;
1558 +
1559 + /* input/irq */
1560 + if (data->det_pin) {
1561 + at91_set_gpio_input(data->det_pin, 1);
1562 + at91_set_deglitch(data->det_pin, 1);
1563 + }
1564 + if (data->wp_pin)
1565 + at91_set_gpio_input(data->wp_pin, 1);
1566 + if (data->vcc_pin)
1567 + at91_set_gpio_output(data->vcc_pin, 0);
1568 +
1569 + /* CLK */
1570 + at91_set_A_periph(AT91_PIN_PA2, 0);
1571 +
1572 + /* CMD */
1573 + at91_set_A_periph(AT91_PIN_PA1, 1);
1574 +
1575 + /* DAT0, maybe DAT1..DAT3 */
1576 + at91_set_A_periph(AT91_PIN_PA0, 1);
1577 + if (data->wire4) {
1578 + at91_set_A_periph(AT91_PIN_PA3, 1);
1579 + at91_set_A_periph(AT91_PIN_PA4, 1);
1580 + at91_set_A_periph(AT91_PIN_PA5, 1);
1581 + }
1582 +
1583 + mmc_data = *data;
1584 + platform_device_register(&at91sam9rl_mmc_device);
1585 +}
1586 +#else
1587 +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
1588 +#endif
1589 +
1590 +
1591 +/* --------------------------------------------------------------------
1592 + * NAND / SmartMedia
1593 + * -------------------------------------------------------------------- */
1594 +
1595 +#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
1596 +static struct at91_nand_data nand_data;
1597 +
1598 +#define NAND_BASE AT91_CHIPSELECT_3
1599 +
1600 +static struct resource nand_resources[] = {
1601 + {
1602 + .start = NAND_BASE,
1603 + .end = NAND_BASE + SZ_256M - 1,
1604 + .flags = IORESOURCE_MEM,
1605 + }
1606 +};
1607 +
1608 +static struct platform_device at91_nand_device = {
1609 + .name = "at91_nand",
1610 + .id = -1,
1611 + .dev = {
1612 + .platform_data = &nand_data,
1613 + },
1614 + .resource = nand_resources,
1615 + .num_resources = ARRAY_SIZE(nand_resources),
1616 +};
1617 +
1618 +void __init at91_add_device_nand(struct at91_nand_data *data)
1619 +{
1620 + unsigned long csa;
1621 +
1622 + if (!data)
1623 + return;
1624 +
1625 + csa = at91_sys_read(AT91_MATRIX_EBICSA);
1626 + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
1627 +
1628 + /* set the bus interface characteristics */
1629 + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
1630 + | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
1631 +
1632 + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
1633 + | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
1634 +
1635 + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
1636 +
1637 + at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
1638 +
1639 + /* enable pin */
1640 + if (data->enable_pin)
1641 + at91_set_gpio_output(data->enable_pin, 1);
1642 +
1643 + /* ready/busy pin */
1644 + if (data->rdy_pin)
1645 + at91_set_gpio_input(data->rdy_pin, 1);
1646 +
1647 + /* card detect pin */
1648 + if (data->det_pin)
1649 + at91_set_gpio_input(data->det_pin, 1);
1650 +
1651 + at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
1652 + at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
1653 +
1654 + nand_data = *data;
1655 + platform_device_register(&at91_nand_device);
1656 +}
1657 +
1658 +#else
1659 +void __init at91_add_device_nand(struct at91_nand_data *data) {}
1660 +#endif
1661 +
1662 +
1663 +/* --------------------------------------------------------------------
1664 + * TWI (i2c)
1665 + * -------------------------------------------------------------------- */
1666 +
1667 +#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
1668 +
1669 +static struct resource twi_resources[] = {
1670 + [0] = {
1671 + .start = AT91SAM9RL_BASE_TWI0,
1672 + .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
1673 + .flags = IORESOURCE_MEM,
1674 + },
1675 + [1] = {
1676 + .start = AT91SAM9RL_ID_TWI0,
1677 + .end = AT91SAM9RL_ID_TWI0,
1678 + .flags = IORESOURCE_IRQ,
1679 + },
1680 +};
1681 +
1682 +static struct platform_device at91sam9rl_twi_device = {
1683 + .name = "at91_i2c",
1684 + .id = -1,
1685 + .resource = twi_resources,
1686 + .num_resources = ARRAY_SIZE(twi_resources),
1687 +};
1688 +
1689 +void __init at91_add_device_i2c(void)
1690 +{
1691 + /* pins used for TWI interface */
1692 + at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
1693 + at91_set_multi_drive(AT91_PIN_PA23, 1);
1694 +
1695 + at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
1696 + at91_set_multi_drive(AT91_PIN_PA24, 1);
1697 +
1698 + platform_device_register(&at91sam9rl_twi_device);
1699 +}
1700 +#else
1701 +void __init at91_add_device_i2c(void) {}
1702 +#endif
1703 +
1704 +
1705 +/* --------------------------------------------------------------------
1706 + * SPI
1707 + * -------------------------------------------------------------------- */
1708 +
1709 +#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
1710 +static u64 spi_dmamask = 0xffffffffUL;
1711 +
1712 +static struct resource spi_resources[] = {
1713 + [0] = {
1714 + .start = AT91SAM9RL_BASE_SPI,
1715 + .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
1716 + .flags = IORESOURCE_MEM,
1717 + },
1718 + [1] = {
1719 + .start = AT91SAM9RL_ID_SPI,
1720 + .end = AT91SAM9RL_ID_SPI,
1721 + .flags = IORESOURCE_IRQ,
1722 + },
1723 +};
1724 +
1725 +static struct platform_device at91sam9rl_spi_device = {
1726 + .name = "atmel_spi",
1727 + .id = 0,
1728 + .dev = {
1729 + .dma_mask = &spi_dmamask,
1730 + .coherent_dma_mask = 0xffffffff,
1731 + },
1732 + .resource = spi_resources,
1733 + .num_resources = ARRAY_SIZE(spi_resources),
1734 +};
1735 +
1736 +static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
1737 +
1738 +
1739 +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
1740 +{
1741 + int i;
1742 + unsigned long cs_pin;
1743 +
1744 + at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */
1745 + at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */
1746 + at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */
1747 +
1748 + /* Enable SPI chip-selects */
1749 + for (i = 0; i < nr_devices; i++) {
1750 + if (devices[i].controller_data)
1751 + cs_pin = (unsigned long) devices[i].controller_data;
1752 + else
1753 + cs_pin = spi_standard_cs[devices[i].chip_select];
1754 +
1755 + /* enable chip-select pin */
1756 + at91_set_gpio_output(cs_pin, 1);
1757 +
1758 + /* pass chip-select pin to driver */
1759 + devices[i].controller_data = (void *) cs_pin;
1760 + }
1761 +
1762 + spi_register_board_info(devices, nr_devices);
1763 + platform_device_register(&at91sam9rl_spi_device);
1764 +}
1765 +#else
1766 +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
1767 +#endif
1768 +
1769 +
1770 +/* --------------------------------------------------------------------
1771 + * LCD Controller
1772 + * -------------------------------------------------------------------- */
1773 +
1774 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
1775 +static u64 lcdc_dmamask = 0xffffffffUL;
1776 +static struct atmel_lcdfb_info lcdc_data;
1777 +
1778 +static struct resource lcdc_resources[] = {
1779 + [0] = {
1780 + .start = AT91SAM9RL_LCDC_BASE,
1781 + .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
1782 + .flags = IORESOURCE_MEM,
1783 + },
1784 + [1] = {
1785 + .start = AT91SAM9RL_ID_LCDC,
1786 + .end = AT91SAM9RL_ID_LCDC,
1787 + .flags = IORESOURCE_IRQ,
1788 + },
1789 +#if defined(CONFIG_FB_INTSRAM)
1790 + [2] = {
1791 + .start = AT91SAM9RL_SRAM_BASE,
1792 + .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
1793 + .flags = IORESOURCE_MEM,
1794 + },
1795 +#endif
1796 +};
1797 +
1798 +static struct platform_device at91_lcdc_device = {
1799 + .name = "atmel_lcdfb",
1800 + .id = 0,
1801 + .dev = {
1802 + .dma_mask = &lcdc_dmamask,
1803 + .coherent_dma_mask = 0xffffffff,
1804 + .platform_data = &lcdc_data,
1805 + },
1806 + .resource = lcdc_resources,
1807 + .num_resources = ARRAY_SIZE(lcdc_resources),
1808 +};
1809 +
1810 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
1811 +{
1812 + if (!data) {
1813 + return;
1814 + }
1815 +
1816 +#warning "Check this"
1817 + at91_set_B_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
1818 + at91_set_B_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
1819 + at91_set_B_periph(AT91_PIN_PC7, 0); /* LCDDEN */
1820 + at91_set_B_periph(AT91_PIN_PC3, 0); /* LCDCC */
1821 + at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
1822 + at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
1823 + at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
1824 + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
1825 + at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
1826 + at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
1827 + at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
1828 + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
1829 + at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
1830 + at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
1831 + at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
1832 + at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
1833 + at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
1834 + at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
1835 + at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
1836 + at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
1837 +
1838 + lcdc_data = *data;
1839 + platform_device_register(&at91_lcdc_device);
1840 +}
1841 +#else
1842 +void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
1843 +#endif
1844 +
1845 +
1846 +/* --------------------------------------------------------------------
1847 + * LEDs
1848 + * -------------------------------------------------------------------- */
1849 +
1850 +#if defined(CONFIG_LEDS)
1851 +u8 at91_leds_cpu;
1852 +u8 at91_leds_timer;
1853 +
1854 +void __init at91_init_leds(u8 cpu_led, u8 timer_led)
1855 +{
1856 + /* Enable GPIO to access the LEDs */
1857 + at91_set_gpio_output(cpu_led, 1);
1858 + at91_set_gpio_output(timer_led, 1);
1859 +
1860 + at91_leds_cpu = cpu_led;
1861 + at91_leds_timer = timer_led;
1862 +}
1863 +#else
1864 +void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
1865 +#endif
1866 +
1867 +
1868 +#if defined(CONFIG_NEW_LEDS)
1869 +
1870 +static struct platform_device at91_leds = {
1871 + .name = "at91_leds",
1872 + .id = -1,
1873 +};
1874 +
1875 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
1876 +{
1877 + if (!nr)
1878 + return;
1879 +
1880 + at91_leds.dev.platform_data = leds;
1881 +
1882 + for ( ; nr; nr--, leds++) {
1883 + leds->index = nr; /* first record stores number of leds */
1884 + at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
1885 + }
1886 +
1887 + platform_device_register(&at91_leds);
1888 +}
1889 +#else
1890 +void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
1891 +#endif
1892 +
1893 +
1894 +/* --------------------------------------------------------------------
1895 + * UART
1896 + * -------------------------------------------------------------------- */
1897 +
1898 +#if defined(CONFIG_SERIAL_ATMEL)
1899 +static struct resource dbgu_resources[] = {
1900 + [0] = {
1901 + .start = AT91_VA_BASE_SYS + AT91_DBGU,
1902 + .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1903 + .flags = IORESOURCE_MEM,
1904 + },
1905 + [1] = {
1906 + .start = AT91_ID_SYS,
1907 + .end = AT91_ID_SYS,
1908 + .flags = IORESOURCE_IRQ,
1909 + },
1910 +};
1911 +
1912 +static struct atmel_uart_data dbgu_data = {
1913 + .use_dma_tx = 0,
1914 + .use_dma_rx = 0, /* DBGU not capable of receive DMA */
1915 + .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1916 +};
1917 +
1918 +static struct platform_device at91sam9rl_dbgu_device = {
1919 + .name = "atmel_usart",
1920 + .id = 0,
1921 + .dev = {
1922 + .platform_data = &dbgu_data,
1923 + .coherent_dma_mask = 0xffffffff,
1924 + },
1925 + .resource = dbgu_resources,
1926 + .num_resources = ARRAY_SIZE(dbgu_resources),
1927 +};
1928 +
1929 +static inline void configure_dbgu_pins(void)
1930 +{
1931 + at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */
1932 + at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */
1933 +}
1934 +
1935 +static struct resource uart0_resources[] = {
1936 + [0] = {
1937 + .start = AT91SAM9RL_BASE_US0,
1938 + .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
1939 + .flags = IORESOURCE_MEM,
1940 + },
1941 + [1] = {
1942 + .start = AT91SAM9RL_ID_US0,
1943 + .end = AT91SAM9RL_ID_US0,
1944 + .flags = IORESOURCE_IRQ,
1945 + },
1946 +};
1947 +
1948 +static struct atmel_uart_data uart0_data = {
1949 + .use_dma_tx = 1,
1950 + .use_dma_rx = 1,
1951 +};
1952 +
1953 +static struct platform_device at91sam9rl_uart0_device = {
1954 + .name = "atmel_usart",
1955 + .id = 1,
1956 + .dev = {
1957 + .platform_data = &uart0_data,
1958 + .coherent_dma_mask = 0xffffffff,
1959 + },
1960 + .resource = uart0_resources,
1961 + .num_resources = ARRAY_SIZE(uart0_resources),
1962 +};
1963 +
1964 +static inline void configure_usart0_pins(void)
1965 +{
1966 + at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */
1967 + at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
1968 + at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */
1969 + at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */
1970 +}
1971 +
1972 +static struct resource uart1_resources[] = {
1973 + [0] = {
1974 + .start = AT91SAM9RL_BASE_US1,
1975 + .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1976 + .flags = IORESOURCE_MEM,
1977 + },
1978 + [1] = {
1979 + .start = AT91SAM9RL_ID_US1,
1980 + .end = AT91SAM9RL_ID_US1,
1981 + .flags = IORESOURCE_IRQ,
1982 + },
1983 +};
1984 +
1985 +static struct atmel_uart_data uart1_data = {
1986 + .use_dma_tx = 1,
1987 + .use_dma_rx = 1,
1988 +};
1989 +
1990 +static struct platform_device at91sam9rl_uart1_device = {
1991 + .name = "atmel_usart",
1992 + .id = 2,
1993 + .dev = {
1994 + .platform_data = &uart1_data,
1995 + .coherent_dma_mask = 0xffffffff,
1996 + },
1997 + .resource = uart1_resources,
1998 + .num_resources = ARRAY_SIZE(uart1_resources),
1999 +};
2000 +
2001 +static inline void configure_usart1_pins(void)
2002 +{
2003 + at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */
2004 + at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */
2005 +}
2006 +
2007 +static struct resource uart2_resources[] = {
2008 + [0] = {
2009 + .start = AT91SAM9RL_BASE_US2,
2010 + .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
2011 + .flags = IORESOURCE_MEM,
2012 + },
2013 + [1] = {
2014 + .start = AT91SAM9RL_ID_US2,
2015 + .end = AT91SAM9RL_ID_US2,
2016 + .flags = IORESOURCE_IRQ,
2017 + },
2018 +};
2019 +
2020 +static struct atmel_uart_data uart2_data = {
2021 + .use_dma_tx = 1,
2022 + .use_dma_rx = 1,
2023 +};
2024 +
2025 +static struct platform_device at91sam9rl_uart2_device = {
2026 + .name = "atmel_usart",
2027 + .id = 3,
2028 + .dev = {
2029 + .platform_data = &uart2_data,
2030 + .coherent_dma_mask = 0xffffffff,
2031 + },
2032 + .resource = uart2_resources,
2033 + .num_resources = ARRAY_SIZE(uart2_resources),
2034 +};
2035 +
2036 +static inline void configure_usart2_pins(void)
2037 +{
2038 + at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */
2039 + at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */
2040 +}
2041 +
2042 +static struct resource uart3_resources[] = {
2043 + [0] = {
2044 + .start = AT91SAM9RL_BASE_US3,
2045 + .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
2046 + .flags = IORESOURCE_MEM,
2047 + },
2048 + [1] = {
2049 + .start = AT91SAM9RL_ID_US3,
2050 + .end = AT91SAM9RL_ID_US3,
2051 + .flags = IORESOURCE_IRQ,
2052 + },
2053 +};
2054 +
2055 +static struct atmel_uart_data uart3_data = {
2056 + .use_dma_tx = 1,
2057 + .use_dma_rx = 1,
2058 +};
2059 +
2060 +static struct platform_device at91sam9rl_uart3_device = {
2061 + .name = "atmel_usart",
2062 + .id = 4,
2063 + .dev = {
2064 + .platform_data = &uart3_data,
2065 + .coherent_dma_mask = 0xffffffff,
2066 + },
2067 + .resource = uart3_resources,
2068 + .num_resources = ARRAY_SIZE(uart3_resources),
2069 +};
2070 +
2071 +static inline void configure_usart3_pins(void)
2072 +{
2073 + at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */
2074 + at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */
2075 +}
2076 +
2077 +struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
2078 +struct platform_device *atmel_default_console_device; /* the serial console device */
2079 +
2080 +void __init at91_init_serial(struct at91_uart_config *config)
2081 +{
2082 + int i;
2083 +
2084 + /* Fill in list of supported UARTs */
2085 + for (i = 0; i < config->nr_tty; i++) {
2086 + switch (config->tty_map[i]) {
2087 + case 0:
2088 + configure_usart0_pins();
2089 + at91_uarts[i] = &at91sam9rl_uart0_device;
2090 + at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
2091 + break;
2092 + case 1:
2093 + configure_usart1_pins();
2094 + at91_uarts[i] = &at91sam9rl_uart1_device;
2095 + at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
2096 + break;
2097 + case 2:
2098 + configure_usart2_pins();
2099 + at91_uarts[i] = &at91sam9rl_uart2_device;
2100 + at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
2101 + break;
2102 + case 3:
2103 + configure_usart3_pins();
2104 + at91_uarts[i] = &at91sam9rl_uart3_device;
2105 + at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
2106 + break;
2107 + case 4:
2108 + configure_dbgu_pins();
2109 + at91_uarts[i] = &at91sam9rl_dbgu_device;
2110 + at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
2111 + break;
2112 + default:
2113 + continue;
2114 + }
2115 + at91_uarts[i]->id = i; /* update ID number to mapped ID */
2116 + }
2117 +
2118 + /* Set serial console device */
2119 + if (config->console_tty < ATMEL_MAX_UART)
2120 + atmel_default_console_device = at91_uarts[config->console_tty];
2121 + if (!atmel_default_console_device)
2122 + printk(KERN_INFO "AT91: No default serial console defined.\n");
2123 +}
2124 +
2125 +void __init at91_add_device_serial(void)
2126 +{
2127 + int i;
2128 +
2129 + for (i = 0; i < ATMEL_MAX_UART; i++) {
2130 + if (at91_uarts[i])
2131 + platform_device_register(at91_uarts[i]);
2132 + }
2133 +}
2134 +#else
2135 +void __init at91_init_serial(struct at91_uart_config *config) {}
2136 +void __init at91_add_device_serial(void) {}
2137 +#endif
2138 +
2139 +
2140 +/* -------------------------------------------------------------------- */
2141 +
2142 +/*
2143 + * These devices are always present and don't need any board-specific
2144 + * setup.
2145 + */
2146 +static int __init at91_add_standard_devices(void)
2147 +{
2148 + return 0;
2149 +}
2150 +
2151 +arch_initcall(at91_add_standard_devices);
2152 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-cam60.c linux-2.6-stable/arch/arm/mach-at91/board-cam60.c
2153 --- linux-2.6.21/arch/arm/mach-at91/board-cam60.c Thu Jan 1 02:00:00 1970
2154 +++ linux-2.6-stable/arch/arm/mach-at91/board-cam60.c Tue May 8 12:13:30 2007
2155 @@ -0,0 +1,148 @@
2156 +/*
2157 + * KwikByte CAM60
2158 + *
2159 + * based on board-sam9260ek.c
2160 + * Copyright (C) 2005 SAN People
2161 + * Copyright (C) 2006 Atmel
2162 + *
2163 + * This program is free software; you can redistribute it and/or modify
2164 + * it under the terms of the GNU General Public License as published by
2165 + * the Free Software Foundation; either version 2 of the License, or
2166 + * (at your option) any later version.
2167 + *
2168 + * This program is distributed in the hope that it will be useful,
2169 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2170 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2171 + * GNU General Public License for more details.
2172 + *
2173 + * You should have received a copy of the GNU General Public License
2174 + * along with this program; if not, write to the Free Software
2175 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2176 + */
2177 +
2178 +#include <linux/types.h>
2179 +#include <linux/init.h>
2180 +#include <linux/mm.h>
2181 +#include <linux/module.h>
2182 +#include <linux/platform_device.h>
2183 +#include <linux/spi/spi.h>
2184 +#include <linux/spi/flash.h>
2185 +
2186 +#include <asm/hardware.h>
2187 +#include <asm/setup.h>
2188 +#include <asm/mach-types.h>
2189 +#include <asm/irq.h>
2190 +
2191 +#include <asm/mach/arch.h>
2192 +#include <asm/mach/map.h>
2193 +#include <asm/mach/irq.h>
2194 +
2195 +#include <asm/arch/board.h>
2196 +#include <asm/arch/gpio.h>
2197 +#include <asm/arch/at91sam926x_mc.h>
2198 +
2199 +#include "generic.h"
2200 +
2201 +
2202 +/*
2203 + * Serial port configuration.
2204 + * 0 .. 5 = USART0 .. USART5
2205 + * 6 = DBGU
2206 + */
2207 +static struct at91_uart_config __initdata cam60_uart_config = {
2208 + .console_tty = 0, /* ttyS0 */
2209 + .nr_tty = 1,
2210 + .tty_map = { 6, -1, -1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
2211 +};
2212 +
2213 +static void __init cam60_map_io(void)
2214 +{
2215 + /* Initialize processor: 10 MHz crystal */
2216 + at91sam9260_initialize(10000000);
2217 +
2218 + /* Setup the serial ports and console */
2219 + at91_init_serial(&cam60_uart_config);
2220 +}
2221 +
2222 +static void __init cam60_init_irq(void)
2223 +{
2224 + at91sam9260_init_interrupts(NULL);
2225 +}
2226 +
2227 +
2228 +/*
2229 + * SPI devices.
2230 + */
2231 +#if defined(CONFIG_MTD_DATAFLASH)
2232 +static struct mtd_partition __initdata cam60_spi_partitions[] = {
2233 + {
2234 + .name = "BOOT1",
2235 + .offset = 0,
2236 + .size = 4 * 1056,
2237 + },
2238 + {
2239 + .name = "BOOT2",
2240 + .offset = MTDPART_OFS_NXTBLK,
2241 + .size = 256 * 1056,
2242 + },
2243 + {
2244 + .name = "kernel",
2245 + .offset = MTDPART_OFS_NXTBLK,
2246 + .size = 2222 * 1056,
2247 + },
2248 + {
2249 + .name = "file system",
2250 + .offset = MTDPART_OFS_NXTBLK,
2251 + .size = MTDPART_SIZ_FULL,
2252 + },
2253 +};
2254 +
2255 +static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
2256 + .name = "spi_flash",
2257 + .parts = cam60_spi_partitions,
2258 + .nr_parts = ARRAY_SIZE(cam60_spi_partitions)
2259 +};
2260 +#endif
2261 +
2262 +static struct spi_board_info cam60_spi_devices[] = {
2263 +#if defined(CONFIG_MTD_DATAFLASH)
2264 + { /* DataFlash chip */
2265 + .modalias = "mtd_dataflash",
2266 + .chip_select = 0,
2267 + .max_speed_hz = 15 * 1000 * 1000,
2268 + .bus_num = 0,
2269 + .platform_data = &cam60_spi_flash_platform_data
2270 + },
2271 +#endif
2272 +};
2273 +
2274 +
2275 +/*
2276 + * MACB Ethernet device
2277 + */
2278 +static struct __initdata at91_eth_data cam60_macb_data = {
2279 + .phy_irq_pin = AT91_PIN_PB5,
2280 + .is_rmii = 0,
2281 +};
2282 +
2283 +
2284 +static void __init cam60_board_init(void)
2285 +{
2286 + /* Serial */
2287 + at91_add_device_serial();
2288 + /* SPI */
2289 + at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
2290 + /* Ethernet */
2291 + at91_add_device_eth(&cam60_macb_data);
2292 +}
2293 +
2294 +MACHINE_START(CAM60, "KwikByte CAM60")
2295 + /* Maintainer: KwikByte */
2296 + .phys_io = AT91_BASE_SYS,
2297 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2298 + .boot_params = AT91_SDRAM_BASE + 0x100,
2299 + .timer = &at91sam926x_timer,
2300 + .map_io = cam60_map_io,
2301 + .init_irq = cam60_init_irq,
2302 + .init_machine = cam60_board_init,
2303 +MACHINE_END
2304 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-chub.c linux-2.6-stable/arch/arm/mach-at91/board-chub.c
2305 --- linux-2.6.21/arch/arm/mach-at91/board-chub.c Thu Jan 1 02:00:00 1970
2306 +++ linux-2.6-stable/arch/arm/mach-at91/board-chub.c Tue May 8 12:13:30 2007
2307 @@ -0,0 +1,132 @@
2308 +/*
2309 + * linux/arch/arm/mach-at91/board-chub.c
2310 + *
2311 + * Copyright (C) 2005 SAN People, adapted for Promwad Chub board
2312 + * by Kuten Ivan
2313 + *
2314 + * This program is free software; you can redistribute it and/or modify
2315 + * it under the terms of the GNU General Public License as published by
2316 + * the Free Software Foundation; either version 2 of the License, or
2317 + * (at your option) any later version.
2318 + *
2319 + * This program is distributed in the hope that it will be useful,
2320 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2321 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2322 + * GNU General Public License for more details.
2323 + *
2324 + * You should have received a copy of the GNU General Public License
2325 + * along with this program; if not, write to the Free Software
2326 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2327 + */
2328 +
2329 +#include <linux/types.h>
2330 +#include <linux/init.h>
2331 +#include <linux/mm.h>
2332 +#include <linux/module.h>
2333 +#include <linux/platform_device.h>
2334 +
2335 +#include <asm/hardware.h>
2336 +#include <asm/setup.h>
2337 +#include <asm/mach-types.h>
2338 +#include <asm/irq.h>
2339 +
2340 +#include <asm/mach/arch.h>
2341 +#include <asm/mach/map.h>
2342 +#include <asm/mach/irq.h>
2343 +
2344 +#include <asm/arch/board.h>
2345 +#include <asm/arch/gpio.h>
2346 +
2347 +#include "generic.h"
2348 +
2349 +/*
2350 + * Serial port configuration.
2351 + * 0 .. 3 = USART0 .. USART3
2352 + * 4 = DBGU
2353 + */
2354 +static struct at91_uart_config __initdata chub_uart_config = {
2355 + .console_tty = 0, /* ttyS0 */
2356 + .nr_tty = 5,
2357 + .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
2358 +};
2359 +
2360 +static void __init chub_init_irq(void)
2361 +{
2362 + at91rm9200_init_interrupts(NULL);
2363 +}
2364 +
2365 +static void __init chub_map_io(void)
2366 +{
2367 + /* Initialize clocks: 18.432 MHz crystal */
2368 + at91rm9200_initialize(18432000, AT91RM9200_PQFP);
2369 +
2370 + /* Setup the serial ports and console */
2371 + at91_init_serial(&chub_uart_config);
2372 +}
2373 +
2374 +static struct at91_eth_data __initdata chub_eth_data = {
2375 + .phy_irq_pin = AT91_PIN_PB29,
2376 + .is_rmii = 0,
2377 +};
2378 +
2379 +static struct mtd_partition __initdata chub_nand_partition[] = {
2380 + {
2381 + .name = "NAND Partition 1",
2382 + .offset = 0,
2383 + .size = MTDPART_SIZ_FULL,
2384 + },
2385 +};
2386 +
2387 +static struct mtd_partition *nand_partitions(int size, int *num_partitions)
2388 +{
2389 + *num_partitions = ARRAY_SIZE(chub_nand_partition);
2390 + return chub_nand_partition;
2391 +}
2392 +
2393 +static struct at91_nand_data __initdata chub_nand_data = {
2394 + .ale = 22,
2395 + .cle = 21,
2396 + .enable_pin = AT91_PIN_PA27,
2397 + .partition_info = nand_partitions,
2398 +};
2399 +
2400 +static struct spi_board_info chub_spi_devices[] = {
2401 + { /* DataFlash chip */
2402 + .modalias = "mtd_dataflash",
2403 + .chip_select = 0,
2404 + .max_speed_hz = 15 * 1000 * 1000,
2405 + },
2406 +};
2407 +
2408 +static void __init chub_board_init(void)
2409 +{
2410 + /* Serial */
2411 + at91_add_device_serial();
2412 + /* I2C */
2413 + at91_add_device_i2c();
2414 + /* Ethernet */
2415 + at91_add_device_eth(&chub_eth_data);
2416 + /* SPI */
2417 + at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
2418 + /* NAND Flash */
2419 + at91_add_device_nand(&chub_nand_data);
2420 + /* Disable write protect for NAND */
2421 + at91_set_gpio_output(AT91_PIN_PB7, 1);
2422 + /* Power enable for 3x RS-232 and 1x RS-485 */
2423 + at91_set_gpio_output(AT91_PIN_PB9, 1);
2424 + /* Disable write protect for FRAM */
2425 + at91_set_gpio_output(AT91_PIN_PA21, 1);
2426 + /* Disable write protect for Dataflash */
2427 + at91_set_gpio_output(AT91_PIN_PA19, 1);
2428 +}
2429 +
2430 +MACHINE_START(CHUB, "Promwad Chub")
2431 + /* Maintainer: Ivan Kuten AT Promwad DOT com */
2432 + .phys_io = AT91_BASE_SYS,
2433 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2434 + .boot_params = AT91_SDRAM_BASE + 0x100,
2435 + .timer = &at91rm9200_timer,
2436 + .map_io = chub_map_io,
2437 + .init_irq = chub_init_irq,
2438 + .init_machine = chub_board_init,
2439 +MACHINE_END
2440 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-csb337.c linux-2.6-stable/arch/arm/mach-at91/board-csb337.c
2441 --- linux-2.6.21/arch/arm/mach-at91/board-csb337.c Thu Apr 26 05:08:32 2007
2442 +++ linux-2.6-stable/arch/arm/mach-at91/board-csb337.c Tue May 8 12:13:30 2007
2443 @@ -24,6 +24,7 @@
2444 #include <linux/module.h>
2445 #include <linux/platform_device.h>
2446 #include <linux/spi/spi.h>
2447 +#include <linux/interrupt.h>
2448 #include <linux/mtd/physmap.h>
2449
2450 #include <asm/hardware.h>
2451 @@ -59,6 +60,7 @@
2452
2453 /* Setup the LEDs */
2454 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
2455 + at91_set_gpio_output(AT91_PIN_PB2, 1); /* third (unused) LED */
2456
2457 /* Setup the serial ports and console */
2458 at91_init_serial(&csb337_uart_config);
2459 @@ -149,6 +151,55 @@
2460 .num_resources = ARRAY_SIZE(csb_flash_resources),
2461 };
2462
2463 +static struct at91_gpio_led csb337_leds[] = {
2464 + {
2465 + .name = "led0",
2466 + .gpio = AT91_PIN_PB0,
2467 + .trigger = "heartbeat",
2468 + },
2469 + {
2470 + .name = "led1",
2471 + .gpio = AT91_PIN_PB1,
2472 + .trigger = "timer",
2473 + },
2474 + {
2475 + .name = "led2",
2476 + .gpio = AT91_PIN_PB2,
2477 + }
2478 +};
2479 +
2480 +#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1)
2481 +static irqreturn_t switch_irq_handler(int irq, void *context)
2482 +{
2483 + return IRQ_HANDLED;
2484 +}
2485 +
2486 +static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode)
2487 +{
2488 + int res;
2489 +
2490 + res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL);
2491 + if (res == 0)
2492 + enable_irq_wake(irq);
2493 +}
2494 +
2495 +static void __init csb300_switches(void)
2496 +{
2497 +#ifdef CONFIG_CSB300_WAKE_SW0
2498 + at91_set_A_periph(AT91_PIN_PB29, 1); /* IRQ0 */
2499 + switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING);
2500 +#endif
2501 +#ifdef CONFIG_CSB300_WAKE_SW1
2502 + at91_set_gpio_input(AT91_PIN_PB28, 1);
2503 + at91_set_deglitch(AT91_PIN_PB28, 1);
2504 + switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING);
2505 +#endif
2506 + /* there's also SW2 at PA21, GPIO or TIOA2 */
2507 +}
2508 +#else
2509 +static void __init csb300_switches(void) {}
2510 +#endif
2511 +
2512 static void __init csb337_board_init(void)
2513 {
2514 /* Serial */
2515 @@ -168,8 +219,12 @@
2516 at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
2517 /* MMC */
2518 at91_add_device_mmc(0, &csb337_mmc_data);
2519 + /* LEDS */
2520 + at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds));
2521 /* NOR flash */
2522 platform_device_register(&csb_flash);
2523 + /* Switches on CSB300 */
2524 + csb300_switches();
2525 }
2526
2527 MACHINE_START(CSB337, "Cogent CSB337")
2528 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-dk.c linux-2.6-stable/arch/arm/mach-at91/board-dk.c
2529 --- linux-2.6.21/arch/arm/mach-at91/board-dk.c Thu Apr 26 05:08:32 2007
2530 +++ linux-2.6-stable/arch/arm/mach-at91/board-dk.c Tue May 8 14:29:12 2007
2531 @@ -73,6 +73,185 @@
2532 at91rm9200_init_interrupts(NULL);
2533 }
2534
2535 +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2536 +#include <video/s1d13xxxfb.h>
2537 +#include <asm/arch/ics1523.h>
2538 +
2539 +/* EPSON S1D13806 FB */
2540 +#define AT91_FB_REG_BASE 0x30000000L
2541 +#define AT91_FB_REG_SIZE 0x200
2542 +#define AT91_FB_VMEM_BASE 0x30200000L
2543 +#define AT91_FB_VMEM_SIZE 0x140000L
2544 +
2545 +static void __init dk_init_video(void)
2546 +{
2547 + /* NWAIT Signal */
2548 + at91_set_A_periph(AT91_PIN_PC6, 0);
2549 +
2550 + /* Initialization of the Static Memory Controller for Chip Select 2 */
2551 + at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
2552 + | AT91_SMC_WSEN | AT91_SMC_NWS_(4) /* wait states */
2553 + | AT91_SMC_TDF_(1) /* float time */
2554 + );
2555 +
2556 + at91_ics1523_init();
2557 +}
2558 +
2559 +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2560 + Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2561 +static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
2562 + {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2563 + {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2564 + {S1DREG_GPIO_CNF0, 0x00},
2565 + {S1DREG_GPIO_CNF1, 0x00},
2566 + {S1DREG_GPIO_CTL0, 0x08},
2567 + {S1DREG_GPIO_CTL1, 0x00},
2568 + {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2569 + {S1DREG_LCD_CLK_CNF, 0x00},
2570 + {S1DREG_CRT_CLK_CNF, 0x00},
2571 + {S1DREG_MPLUG_CLK_CNF, 0x00},
2572 + {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2573 + {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2574 + {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2575 + {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2576 + {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
2577 + {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
2578 + {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
2579 + {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
2580 + {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
2581 + {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
2582 + {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
2583 + {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
2584 + {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2585 + {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
2586 + {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
2587 + {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
2588 + {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
2589 + {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
2590 + {S1DREG_LCD_DISP_START0, 0x00},
2591 + {S1DREG_LCD_DISP_START1, 0xC8},
2592 + {S1DREG_LCD_DISP_START2, 0x00},
2593 + {S1DREG_LCD_MEM_OFF0, 0x80},
2594 + {S1DREG_LCD_MEM_OFF1, 0x02},
2595 + {S1DREG_LCD_PIX_PAN, 0x00},
2596 + {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
2597 + {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
2598 + {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
2599 + {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
2600 + {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
2601 + {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
2602 + {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
2603 + {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2604 + {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
2605 + {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
2606 + {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
2607 + {S1DREG_TV_OUT_CTL, 0x10},
2608 + {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
2609 + {S1DREG_CRT_DISP_START0, 0x00},
2610 + {S1DREG_CRT_DISP_START1, 0x00},
2611 + {S1DREG_CRT_DISP_START2, 0x00},
2612 + {S1DREG_CRT_MEM_OFF0, 0x80},
2613 + {S1DREG_CRT_MEM_OFF1, 0x02},
2614 + {S1DREG_CRT_PIX_PAN, 0x00},
2615 + {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
2616 + {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
2617 + {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
2618 + {S1DREG_LCD_CUR_START, 0x01},
2619 + {S1DREG_LCD_CUR_XPOS0, 0x00},
2620 + {S1DREG_LCD_CUR_XPOS1, 0x00},
2621 + {S1DREG_LCD_CUR_YPOS0, 0x00},
2622 + {S1DREG_LCD_CUR_YPOS1, 0x00},
2623 + {S1DREG_LCD_CUR_BCTL0, 0x00},
2624 + {S1DREG_LCD_CUR_GCTL0, 0x00},
2625 + {S1DREG_LCD_CUR_RCTL0, 0x00},
2626 + {S1DREG_LCD_CUR_BCTL1, 0x1F},
2627 + {S1DREG_LCD_CUR_GCTL1, 0x3F},
2628 + {S1DREG_LCD_CUR_RCTL1, 0x1F},
2629 + {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
2630 + {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
2631 + {S1DREG_CRT_CUR_START, 0x01},
2632 + {S1DREG_CRT_CUR_XPOS0, 0x00},
2633 + {S1DREG_CRT_CUR_XPOS1, 0x00},
2634 + {S1DREG_CRT_CUR_YPOS0, 0x00},
2635 + {S1DREG_CRT_CUR_YPOS1, 0x00},
2636 + {S1DREG_CRT_CUR_BCTL0, 0x00},
2637 + {S1DREG_CRT_CUR_GCTL0, 0x00},
2638 + {S1DREG_CRT_CUR_RCTL0, 0x00},
2639 + {S1DREG_CRT_CUR_BCTL1, 0x1F},
2640 + {S1DREG_CRT_CUR_GCTL1, 0x3F},
2641 + {S1DREG_CRT_CUR_RCTL1, 0x1F},
2642 + {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
2643 + {S1DREG_BBLT_CTL0, 0x00},
2644 + {S1DREG_BBLT_CTL0, 0x00},
2645 + {S1DREG_BBLT_CC_EXP, 0x00},
2646 + {S1DREG_BBLT_OP, 0x00},
2647 + {S1DREG_BBLT_SRC_START0, 0x00},
2648 + {S1DREG_BBLT_SRC_START1, 0x00},
2649 + {S1DREG_BBLT_SRC_START2, 0x00},
2650 + {S1DREG_BBLT_DST_START0, 0x00},
2651 + {S1DREG_BBLT_DST_START1, 0x00},
2652 + {S1DREG_BBLT_DST_START2, 0x00},
2653 + {S1DREG_BBLT_MEM_OFF0, 0x00},
2654 + {S1DREG_BBLT_MEM_OFF1, 0x00},
2655 + {S1DREG_BBLT_WIDTH0, 0x00},
2656 + {S1DREG_BBLT_WIDTH1, 0x00},
2657 + {S1DREG_BBLT_HEIGHT0, 0x00},
2658 + {S1DREG_BBLT_HEIGHT1, 0x00},
2659 + {S1DREG_BBLT_BGC0, 0x00},
2660 + {S1DREG_BBLT_BGC1, 0x00},
2661 + {S1DREG_BBLT_FGC0, 0x00},
2662 + {S1DREG_BBLT_FGC1, 0x00},
2663 + {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
2664 + {S1DREG_LKUP_ADDR, 0x00},
2665 + {S1DREG_PS_CNF, 0x00}, /* Power Save disable */
2666 + {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
2667 + {S1DREG_CPU2MEM_WDOGT, 0x00},
2668 + {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
2669 +};
2670 +
2671 +static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
2672 + .initregs = dk_s1dfb_initregs,
2673 + .initregssize = ARRAY_SIZE(dk_s1dfb_initregs),
2674 + .platform_init_video = dk_init_video,
2675 +};
2676 +
2677 +static u64 s1dfb_dmamask = 0xffffffffUL;
2678 +
2679 +static struct resource dk_s1dfb_resource[] = {
2680 + [0] = { /* video mem */
2681 + .name = "s1d13806 memory",
2682 + .start = AT91_FB_VMEM_BASE,
2683 + .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
2684 + .flags = IORESOURCE_MEM,
2685 + },
2686 + [1] = { /* video registers */
2687 + .name = "s1d13806 registers",
2688 + .start = AT91_FB_REG_BASE,
2689 + .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
2690 + .flags = IORESOURCE_MEM,
2691 + },
2692 +};
2693 +
2694 +static struct platform_device dk_s1dfb_device = {
2695 + .name = "s1d13806fb",
2696 + .id = -1,
2697 + .dev = {
2698 + .dma_mask = &s1dfb_dmamask,
2699 + .coherent_dma_mask = 0xffffffff,
2700 + .platform_data = &dk_s1dfb_pdata,
2701 + },
2702 + .resource = dk_s1dfb_resource,
2703 + .num_resources = ARRAY_SIZE(dk_s1dfb_resource),
2704 +};
2705 +
2706 +static void __init dk_add_device_video(void)
2707 +{
2708 + platform_device_register(&dk_s1dfb_device);
2709 +}
2710 +#else
2711 +static void __init dk_add_device_video(void) {}
2712 +#endif
2713 +
2714 static struct at91_eth_data __initdata dk_eth_data = {
2715 .phy_irq_pin = AT91_PIN_PC4,
2716 .is_rmii = 1,
2717 @@ -151,7 +330,7 @@
2718 #define DK_FLASH_SIZE 0x200000
2719
2720 static struct physmap_flash_data dk_flash_data = {
2721 - .width = 2,
2722 + .width = 2,
2723 };
2724
2725 static struct resource dk_flash_resource = {
2726 @@ -170,6 +349,13 @@
2727 .num_resources = 1,
2728 };
2729
2730 +static struct at91_gpio_led dk_leds[] = {
2731 + {
2732 + .name = "led0",
2733 + .gpio = AT91_PIN_PB2,
2734 + .trigger = "timer",
2735 + }
2736 +};
2737
2738 static void __init dk_board_init(void)
2739 {
2740 @@ -200,8 +386,10 @@
2741 at91_add_device_nand(&dk_nand_data);
2742 /* NOR Flash */
2743 platform_device_register(&dk_flash);
2744 + /* LEDs */
2745 + at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
2746 /* VGA */
2747 -// dk_add_device_video();
2748 + dk_add_device_video();
2749 }
2750
2751 MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
2752 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-ek.c linux-2.6-stable/arch/arm/mach-at91/board-ek.c
2753 --- linux-2.6.21/arch/arm/mach-at91/board-ek.c Thu Apr 26 05:08:32 2007
2754 +++ linux-2.6-stable/arch/arm/mach-at91/board-ek.c Tue May 8 14:29:22 2007
2755 @@ -73,6 +73,187 @@
2756 at91rm9200_init_interrupts(NULL);
2757 }
2758
2759 +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2760 +#include <video/s1d13xxxfb.h>
2761 +#include <asm/arch/ics1523.h>
2762 +
2763 +/* EPSON S1D13806 FB */
2764 +#define AT91_FB_REG_BASE 0x40000000L
2765 +#define AT91_FB_REG_SIZE 0x200
2766 +#define AT91_FB_VMEM_BASE 0x40200000L
2767 +#define AT91_FB_VMEM_SIZE 0x140000L
2768 +
2769 +static void __init ek_init_video(void)
2770 +{
2771 + /* NWAIT Signal */
2772 + at91_set_A_periph(AT91_PIN_PC6, 0);
2773 +
2774 + /* Initialization of the Static Memory Controller for Chip Select 3 */
2775 + at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16 /* 16 bit */
2776 + | AT91_SMC_WSEN | AT91_SMC_NWS_(5) /* wait states */
2777 + | AT91_SMC_TDF_(1) /* float time */
2778 + );
2779 +
2780 + at91_ics1523_init();
2781 +}
2782 +
2783 +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2784 + Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2785 +static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
2786 + {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2787 + {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2788 + {S1DREG_GPIO_CNF0, 0xFF}, // 0x00
2789 + {S1DREG_GPIO_CNF1, 0x1F}, // 0x08
2790 + {S1DREG_GPIO_CTL0, 0x00},
2791 + {S1DREG_GPIO_CTL1, 0x00},
2792 + {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2793 + {S1DREG_LCD_CLK_CNF, 0x00},
2794 + {S1DREG_CRT_CLK_CNF, 0x00},
2795 + {S1DREG_MPLUG_CLK_CNF, 0x00},
2796 + {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2797 + {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2798 + {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2799 + {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2800 + {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
2801 + {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
2802 + {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
2803 + {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
2804 + {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
2805 + {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
2806 + {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
2807 + {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
2808 + {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2809 + {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
2810 + {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
2811 + {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
2812 + {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
2813 + {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
2814 + {S1DREG_LCD_DISP_START0, 0x00},
2815 + {S1DREG_LCD_DISP_START1, 0xC8},
2816 + {S1DREG_LCD_DISP_START2, 0x00},
2817 + {S1DREG_LCD_MEM_OFF0, 0x80},
2818 + {S1DREG_LCD_MEM_OFF1, 0x02},
2819 + {S1DREG_LCD_PIX_PAN, 0x00},
2820 + {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
2821 + {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
2822 + {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
2823 + {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
2824 + {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
2825 + {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
2826 + {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
2827 + {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2828 + {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
2829 + {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
2830 + {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
2831 + {S1DREG_TV_OUT_CTL, 0x10},
2832 + {0x005E, 0x9F},
2833 + {0x005F, 0x00},
2834 + {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
2835 + {S1DREG_CRT_DISP_START0, 0x00},
2836 + {S1DREG_CRT_DISP_START1, 0x00},
2837 + {S1DREG_CRT_DISP_START2, 0x00},
2838 + {S1DREG_CRT_MEM_OFF0, 0x80},
2839 + {S1DREG_CRT_MEM_OFF1, 0x02},
2840 + {S1DREG_CRT_PIX_PAN, 0x00},
2841 + {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
2842 + {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
2843 + {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
2844 + {S1DREG_LCD_CUR_START, 0x01},
2845 + {S1DREG_LCD_CUR_XPOS0, 0x00},
2846 + {S1DREG_LCD_CUR_XPOS1, 0x00},
2847 + {S1DREG_LCD_CUR_YPOS0, 0x00},
2848 + {S1DREG_LCD_CUR_YPOS1, 0x00},
2849 + {S1DREG_LCD_CUR_BCTL0, 0x00},
2850 + {S1DREG_LCD_CUR_GCTL0, 0x00},
2851 + {S1DREG_LCD_CUR_RCTL0, 0x00},
2852 + {S1DREG_LCD_CUR_BCTL1, 0x1F},
2853 + {S1DREG_LCD_CUR_GCTL1, 0x3F},
2854 + {S1DREG_LCD_CUR_RCTL1, 0x1F},
2855 + {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
2856 + {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
2857 + {S1DREG_CRT_CUR_START, 0x01},
2858 + {S1DREG_CRT_CUR_XPOS0, 0x00},
2859 + {S1DREG_CRT_CUR_XPOS1, 0x00},
2860 + {S1DREG_CRT_CUR_YPOS0, 0x00},
2861 + {S1DREG_CRT_CUR_YPOS1, 0x00},
2862 + {S1DREG_CRT_CUR_BCTL0, 0x00},
2863 + {S1DREG_CRT_CUR_GCTL0, 0x00},
2864 + {S1DREG_CRT_CUR_RCTL0, 0x00},
2865 + {S1DREG_CRT_CUR_BCTL1, 0x1F},
2866 + {S1DREG_CRT_CUR_GCTL1, 0x3F},
2867 + {S1DREG_CRT_CUR_RCTL1, 0x1F},
2868 + {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
2869 + {S1DREG_BBLT_CTL0, 0x00},
2870 + {S1DREG_BBLT_CTL0, 0x00},
2871 + {S1DREG_BBLT_CC_EXP, 0x00},
2872 + {S1DREG_BBLT_OP, 0x00},
2873 + {S1DREG_BBLT_SRC_START0, 0x00},
2874 + {S1DREG_BBLT_SRC_START1, 0x00},
2875 + {S1DREG_BBLT_SRC_START2, 0x00},
2876 + {S1DREG_BBLT_DST_START0, 0x00},
2877 + {S1DREG_BBLT_DST_START1, 0x00},
2878 + {S1DREG_BBLT_DST_START2, 0x00},
2879 + {S1DREG_BBLT_MEM_OFF0, 0x00},
2880 + {S1DREG_BBLT_MEM_OFF1, 0x00},
2881 + {S1DREG_BBLT_WIDTH0, 0x00},
2882 + {S1DREG_BBLT_WIDTH1, 0x00},
2883 + {S1DREG_BBLT_HEIGHT0, 0x00},
2884 + {S1DREG_BBLT_HEIGHT1, 0x00},
2885 + {S1DREG_BBLT_BGC0, 0x00},
2886 + {S1DREG_BBLT_BGC1, 0x00},
2887 + {S1DREG_BBLT_FGC0, 0x00},
2888 + {S1DREG_BBLT_FGC1, 0x00},
2889 + {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
2890 + {S1DREG_LKUP_ADDR, 0x00},
2891 + {S1DREG_PS_CNF, 0x10}, /* Power Save disable */
2892 + {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
2893 + {S1DREG_CPU2MEM_WDOGT, 0x00},
2894 + {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
2895 +};
2896 +
2897 +static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
2898 + .initregs = ek_s1dfb_initregs,
2899 + .initregssize = ARRAY_SIZE(ek_s1dfb_initregs),
2900 + .platform_init_video = ek_init_video,
2901 +};
2902 +
2903 +static u64 s1dfb_dmamask = 0xffffffffUL;
2904 +
2905 +static struct resource ek_s1dfb_resource[] = {
2906 + [0] = { /* video mem */
2907 + .name = "s1d13806 memory",
2908 + .start = AT91_FB_VMEM_BASE,
2909 + .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
2910 + .flags = IORESOURCE_MEM,
2911 + },
2912 + [1] = { /* video registers */
2913 + .name = "s1d13806 registers",
2914 + .start = AT91_FB_REG_BASE,
2915 + .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
2916 + .flags = IORESOURCE_MEM,
2917 + },
2918 +};
2919 +
2920 +static struct platform_device ek_s1dfb_device = {
2921 + .name = "s1d13806fb",
2922 + .id = -1,
2923 + .dev = {
2924 + .dma_mask = &s1dfb_dmamask,
2925 + .coherent_dma_mask = 0xffffffff,
2926 + .platform_data = &ek_s1dfb_pdata,
2927 + },
2928 + .resource = ek_s1dfb_resource,
2929 + .num_resources = ARRAY_SIZE(ek_s1dfb_resource),
2930 +};
2931 +
2932 +static void __init ek_add_device_video(void)
2933 +{
2934 + platform_device_register(&ek_s1dfb_device);
2935 +}
2936 +#else
2937 +static void __init ek_add_device_video(void) {}
2938 +#endif
2939 +
2940 static struct at91_eth_data __initdata ek_eth_data = {
2941 .phy_irq_pin = AT91_PIN_PC4,
2942 .is_rmii = 1,
2943 @@ -113,7 +294,7 @@
2944 #define EK_FLASH_SIZE 0x200000
2945
2946 static struct physmap_flash_data ek_flash_data = {
2947 - .width = 2,
2948 + .width = 2,
2949 };
2950
2951 static struct resource ek_flash_resource = {
2952 @@ -132,6 +313,18 @@
2953 .num_resources = 1,
2954 };
2955
2956 +static struct at91_gpio_led ek_leds[] = {
2957 + {
2958 + .name = "led0",
2959 + .gpio = AT91_PIN_PB1,
2960 + .trigger = "heartbeat",
2961 + },
2962 + {
2963 + .name = "led1",
2964 + .gpio = AT91_PIN_PB2,
2965 + .trigger = "timer",
2966 + }
2967 +};
2968
2969 static void __init ek_board_init(void)
2970 {
2971 @@ -158,8 +351,10 @@
2972 #endif
2973 /* NOR Flash */
2974 platform_device_register(&ek_flash);
2975 + /* LEDs */
2976 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
2977 /* VGA */
2978 -// ek_add_device_video();
2979 + ek_add_device_video();
2980 }
2981
2982 MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
2983 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-kb9202.c linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c
2984 --- linux-2.6.21/arch/arm/mach-at91/board-kb9202.c Thu Apr 26 05:08:32 2007
2985 +++ linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c Tue May 8 12:21:31 2007
2986 @@ -37,6 +37,8 @@
2987 #include <asm/arch/board.h>
2988 #include <asm/arch/gpio.h>
2989
2990 +#include <asm/arch/at91rm9200_mc.h>
2991 +
2992 #include "generic.h"
2993
2994
2995 @@ -111,6 +113,48 @@
2996 .partition_info = nand_partitions,
2997 };
2998
2999 +
3000 +#if defined(CONFIG_FB_S1D15605)
3001 +#warning "Rather pass reset pin via platform_data"
3002 +static struct resource kb9202_lcd_resources[] = {
3003 + [0] = {
3004 + .start = AT91_CHIPSELECT_2,
3005 + .end = AT91_CHIPSELECT_2 + 0x200FF,
3006 + .flags = IORESOURCE_MEM
3007 + },
3008 + [1] = { /* reset pin */
3009 + .start = AT91_PIN_PC22,
3010 + .end = AT91_PIN_PC22,
3011 + .flags = IORESOURCE_MEM
3012 + },
3013 +};
3014 +
3015 +static struct platform_device kb9202_lcd_device = {
3016 + .name = "s1d15605fb",
3017 + .id = 0,
3018 + .num_resources = ARRAY_SIZE(kb9202_lcd_resources),
3019 + .resource = kb9202_lcd_resources,
3020 +};
3021 +
3022 +static void __init kb9202_add_device_lcd(void)
3023 +{
3024 + /* In case the boot loader did not set the chip select mode and timing */
3025 + at91_sys_write(AT91_SMC_CSR(2),
3026 + AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
3027 + AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
3028 +
3029 + /* Backlight pin = output, off */
3030 + at91_set_gpio_output(AT91_PIN_PC23, 0);
3031 +
3032 + /* Reset pin = output, in reset */
3033 + at91_set_gpio_output(AT91_PIN_PC22, 0);
3034 +
3035 + platform_device_register(&kb9202_lcd_device);
3036 +}
3037 +#else
3038 +static void __init kb9202_add_device_lcd(void) {}
3039 +#endif
3040 +
3041 static void __init kb9202_board_init(void)
3042 {
3043 /* Serial */
3044 @@ -129,6 +173,8 @@
3045 at91_add_device_spi(NULL, 0);
3046 /* NAND */
3047 at91_add_device_nand(&kb9202_nand_data);
3048 + /* LCD */
3049 + kb9202_add_device_lcd();
3050 }
3051
3052 MACHINE_START(KB9200, "KB920x")
3053 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c
3054 --- linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c Thu Apr 26 05:08:32 2007
3055 +++ linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c Tue May 8 12:13:30 2007
3056 @@ -104,9 +104,9 @@
3057 },
3058 #endif
3059 #endif
3060 -#if defined(CONFIG_SND_AT73C213)
3061 +#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
3062 { /* AT73C213 DAC */
3063 - .modalias = "snd_at73c213",
3064 + .modalias = "at73c213",
3065 .chip_select = 0,
3066 .max_speed_hz = 10 * 1000 * 1000,
3067 .bus_num = 1,
3068 @@ -118,7 +118,7 @@
3069 /*
3070 * MACB Ethernet device
3071 */
3072 -static struct __initdata at91_eth_data ek_macb_data = {
3073 +static struct at91_eth_data __initdata ek_macb_data = {
3074 .phy_irq_pin = AT91_PIN_PA7,
3075 .is_rmii = 1,
3076 };
3077 @@ -188,6 +188,8 @@
3078 at91_add_device_eth(&ek_macb_data);
3079 /* MMC */
3080 at91_add_device_mmc(0, &ek_mmc_data);
3081 + /* I2C */
3082 + at91_add_device_i2c();
3083 }
3084
3085 MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
3086 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c
3087 --- linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c Thu Apr 26 05:08:32 2007
3088 +++ linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c Wed May 9 12:37:19 2007
3089 @@ -25,7 +25,11 @@
3090 #include <linux/module.h>
3091 #include <linux/platform_device.h>
3092 #include <linux/spi/spi.h>
3093 +#include <linux/spi/ads7846.h>
3094 #include <linux/dm9000.h>
3095 +#include <linux/fb.h>
3096 +
3097 +#include <video/atmel_lcdc.h>
3098
3099 #include <asm/hardware.h>
3100 #include <asm/setup.h>
3101 @@ -59,6 +63,9 @@
3102 /* Initialize processor: 18.432 MHz crystal */
3103 at91sam9261_initialize(18432000);
3104
3105 + /* Setup the LEDs */
3106 + at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
3107 +
3108 /* Setup the serial ports and console */
3109 at91_init_serial(&ek_uart_config);
3110 }
3111 @@ -195,6 +202,41 @@
3112 };
3113
3114 /*
3115 + * ADS7846 Touchscreen
3116 + */
3117 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
3118 +
3119 +static int ads7843_pendown_state(void)
3120 +{
3121 + return !at91_get_gpio_value(AT91_PIN_PC2); /* Touchscreen PENIRQ */
3122 +}
3123 +
3124 +static struct ads7846_platform_data ads_info = {
3125 + .model = 7843,
3126 + .x_min = 150,
3127 + .x_max = 3830,
3128 + .y_min = 190,
3129 + .y_max = 3830,
3130 + .vref_delay_usecs = 100,
3131 + .x_plate_ohms = 450,
3132 + .y_plate_ohms = 250,
3133 + .pressure_max = 15000,
3134 + .debounce_max = 1,
3135 + .debounce_rep = 0,
3136 + .debounce_tol = (~0),
3137 + .get_pendown_state = ads7843_pendown_state,
3138 +};
3139 +
3140 +static void __init ek_add_device_ts(void)
3141 +{
3142 + at91_set_B_periph(AT91_PIN_PC2, 1); /* External IRQ0, with pullup */
3143 + at91_set_gpio_input(AT91_PIN_PA11, 1); /* Touchscreen BUSY signal */
3144 +}
3145 +#else
3146 +static void __init ek_add_device_ts(void) {}
3147 +#endif
3148 +
3149 +/*
3150 * SPI devices
3151 */
3152 static struct spi_board_info ek_spi_devices[] = {
3153 @@ -204,6 +246,17 @@
3154 .max_speed_hz = 15 * 1000 * 1000,
3155 .bus_num = 0,
3156 },
3157 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
3158 + {
3159 + .modalias = "ads7846",
3160 + .chip_select = 2,
3161 + .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
3162 + .bus_num = 0,
3163 + .platform_data = &ads_info,
3164 + .irq = AT91SAM9261_ID_IRQ0,
3165 + .controller_data = AT91_PIN_PA28, /* CS pin */
3166 + },
3167 +#endif
3168 #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
3169 { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
3170 .modalias = "mtd_dataflash",
3171 @@ -211,9 +264,9 @@
3172 .max_speed_hz = 15 * 1000 * 1000,
3173 .bus_num = 0,
3174 },
3175 -#elif defined(CONFIG_SND_AT73C213)
3176 +#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
3177 { /* AT73C213 DAC */
3178 - .modalias = "snd_at73c213",
3179 + .modalias = "at73c213",
3180 .chip_select = 3,
3181 .max_speed_hz = 10 * 1000 * 1000,
3182 .bus_num = 0,
3183 @@ -222,6 +275,65 @@
3184 };
3185
3186
3187 +/*
3188 + * LCD Controller
3189 + */
3190 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
3191 +static struct fb_videomode at91_tft_vga_modes[] = {
3192 + {
3193 + .name = "TX09D50VM1CCA @ 60",
3194 + .refresh = 60,
3195 + .xres = 240, .yres = 320,
3196 + .pixclock = KHZ2PICOS(4965),
3197 +
3198 + .left_margin = 1, .right_margin = 33,
3199 + .upper_margin = 1, .lower_margin = 0,
3200 + .hsync_len = 5, .vsync_len = 1,
3201 +
3202 + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
3203 + .vmode = FB_VMODE_NONINTERLACED,
3204 + },
3205 +};
3206 +
3207 +static struct fb_monspecs at91fb_default_monspecs = {
3208 + .manufacturer = "HIT",
3209 + .monitor = "TX09D50VM1CCA",
3210 +
3211 + .modedb = at91_tft_vga_modes,
3212 + .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
3213 + .hfmin = 15000,
3214 + .hfmax = 64000,
3215 + .vfmin = 50,
3216 + .vfmax = 150,
3217 +};
3218 +
3219 +#define AT91SAM9261_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
3220 + | ATMEL_LCDC_DISTYPE_TFT \
3221 + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
3222 +
3223 +static void at91_lcdc_power_control(int on)
3224 +{
3225 + if (on)
3226 + at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */
3227 + else
3228 + at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */
3229 +}
3230 +
3231 +/* Driver datas */
3232 +static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
3233 + .default_bpp = 16,
3234 + .default_dmacon = ATMEL_LCDC_DMAEN,
3235 + .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
3236 + .default_monspecs = &at91fb_default_monspecs,
3237 + .atmel_lcdfb_power_control = at91_lcdc_power_control,
3238 + .guard_time = 1,
3239 +};
3240 +
3241 +#else
3242 +static struct atmel_lcdfb_info __initdata ek_lcdc_data;
3243 +#endif
3244 +
3245 +
3246 static void __init ek_board_init(void)
3247 {
3248 /* Serial */
3249 @@ -241,10 +353,14 @@
3250 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
3251 /* SPI */
3252 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3253 + /* Touchscreen */
3254 + ek_add_device_ts();
3255 #else
3256 /* MMC */
3257 at91_add_device_mmc(0, &ek_mmc_data);
3258 #endif
3259 + /* LCD Controller */
3260 + at91_add_device_lcdc(&ek_lcdc_data);
3261 }
3262
3263 MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
3264 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c
3265 --- linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c Thu Apr 26 05:08:32 2007
3266 +++ linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c Tue May 8 12:56:33 2007
3267 @@ -25,6 +25,10 @@
3268 #include <linux/module.h>
3269 #include <linux/platform_device.h>
3270 #include <linux/spi/spi.h>
3271 +#include <linux/spi/ads7846.h>
3272 +#include <linux/fb.h>
3273 +
3274 +#include <video/atmel_lcdc.h>
3275
3276 #include <asm/hardware.h>
3277 #include <asm/setup.h>
3278 @@ -86,6 +90,40 @@
3279
3280
3281 /*
3282 + * ADS7846 Touchscreen
3283 + */
3284 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
3285 +static int ads7843_pendown_state(void)
3286 +{
3287 + return !at91_get_gpio_value(AT91_PIN_PA15); /* Touchscreen PENIRQ */
3288 +}
3289 +
3290 +static struct ads7846_platform_data ads_info = {
3291 + .model = 7843,
3292 + .x_min = 150,
3293 + .x_max = 3830,
3294 + .y_min = 190,
3295 + .y_max = 3830,
3296 + .vref_delay_usecs = 100,
3297 + .x_plate_ohms = 450,
3298 + .y_plate_ohms = 250,
3299 + .pressure_max = 15000,
3300 + .debounce_max = 1,
3301 + .debounce_rep = 0,
3302 + .debounce_tol = (~0),
3303 + .get_pendown_state = ads7843_pendown_state,
3304 +};
3305 +
3306 +static void __init ek_add_device_ts(void)
3307 +{
3308 + at91_set_B_periph(AT91_PIN_PA15, 1); /* External IRQ1, with pullup */
3309 + at91_set_gpio_input(AT91_PIN_PA31, 1); /* Touchscreen BUSY signal */
3310 +}
3311 +#else
3312 +static void __init ek_add_device_ts(void) {}
3313 +#endif
3314 +
3315 +/*
3316 * SPI devices.
3317 */
3318 static struct spi_board_info ek_spi_devices[] = {
3319 @@ -97,6 +135,16 @@
3320 .bus_num = 0,
3321 },
3322 #endif
3323 +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
3324 + {
3325 + .modalias = "ads7846",
3326 + .chip_select = 3,
3327 + .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
3328 + .bus_num = 0,
3329 + .platform_data = &ads_info,
3330 + .irq = AT91SAM9263_ID_IRQ1,
3331 + },
3332 +#endif
3333 };
3334
3335
3336 @@ -112,6 +160,14 @@
3337
3338
3339 /*
3340 + * MACB Ethernet device
3341 + */
3342 +static struct at91_eth_data __initdata ek_macb_data = {
3343 + .is_rmii = 1,
3344 +};
3345 +
3346 +
3347 +/*
3348 * NAND flash
3349 */
3350 static struct mtd_partition __initdata ek_nand_partition[] = {
3351 @@ -148,6 +204,73 @@
3352 };
3353
3354
3355 +/*
3356 + * LCD Controller
3357 + */
3358 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
3359 +static struct fb_videomode at91_tft_vga_modes[] = {
3360 + {
3361 + .name = "TX09D50VM1CCA @ 60",
3362 + .refresh = 60,
3363 + .xres = 240, .yres = 320,
3364 + .pixclock = KHZ2PICOS(4965),
3365 +
3366 + .left_margin = 1, .right_margin = 33,
3367 + .upper_margin = 1, .lower_margin = 0,
3368 + .hsync_len = 5, .vsync_len = 1,
3369 +
3370 + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
3371 + .vmode = FB_VMODE_NONINTERLACED,
3372 + },
3373 +};
3374 +
3375 +static struct fb_monspecs at91fb_default_monspecs = {
3376 + .manufacturer = "HIT",
3377 + .monitor = "TX09D70VM1CCA",
3378 +
3379 + .modedb = at91_tft_vga_modes,
3380 + .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
3381 + .hfmin = 15000,
3382 + .hfmax = 64000,
3383 + .vfmin = 50,
3384 + .vfmax = 150,
3385 +};
3386 +
3387 +#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
3388 + | ATMEL_LCDC_DISTYPE_TFT \
3389 + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
3390 +
3391 +static void at91_lcdc_power_control(int on)
3392 +{
3393 + if (on)
3394 + at91_set_gpio_value(AT91_PIN_PD12, 0); /* power up */
3395 + else
3396 + at91_set_gpio_value(AT91_PIN_PD12, 1); /* power down */
3397 +}
3398 +
3399 +/* Driver datas */
3400 +static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
3401 + .default_bpp = 16,
3402 + .default_dmacon = ATMEL_LCDC_DMAEN,
3403 + .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
3404 + .default_monspecs = &at91fb_default_monspecs,
3405 + .atmel_lcdfb_power_control = at91_lcdc_power_control,
3406 + .guard_time = 1,
3407 +};
3408 +
3409 +#else
3410 +static struct atmel_lcdfb_info __initdata ek_lcdc_data;
3411 +#endif
3412 +
3413 +
3414 +/*
3415 + * AC97
3416 + */
3417 +static struct atmel_ac97_data ek_ac97_data = {
3418 + .reset_pin = AT91_PIN_PA13,
3419 +};
3420 +
3421 +
3422 static void __init ek_board_init(void)
3423 {
3424 /* Serial */
3425 @@ -157,11 +280,22 @@
3426 /* USB Device */
3427 at91_add_device_udc(&ek_udc_data);
3428 /* SPI */
3429 + at91_set_gpio_output(AT91_PIN_PE20, 1); /* select spi0 clock */
3430 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3431 + /* Touchscreen */
3432 + ek_add_device_ts();
3433 /* MMC */
3434 at91_add_device_mmc(1, &ek_mmc_data);
3435 + /* Ethernet */
3436 + at91_add_device_eth(&ek_macb_data);
3437 /* NAND */
3438 at91_add_device_nand(&ek_nand_data);
3439 + /* I2C */
3440 + at91_add_device_i2c();
3441 + /* LCD Controller */
3442 + at91_add_device_lcdc(&ek_lcdc_data);
3443 + /* AC97 */
3444 + at91_add_device_ac97(&ek_ac97_data);
3445 }
3446
3447 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
3448 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c
3449 --- linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c Thu Jan 1 02:00:00 1970
3450 +++ linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c Wed May 9 10:58:34 2007
3451 @@ -0,0 +1,204 @@
3452 +/*
3453 + * Copyright (C) 2005 SAN People
3454 + * Copyright (C) 2007 Atmel Corporation
3455 + *
3456 + * This file is subject to the terms and conditions of the GNU General Public
3457 + * License. See the file COPYING in the main directory of this archive for
3458 + * more details.
3459 + */
3460 +
3461 +#include <linux/types.h>
3462 +#include <linux/init.h>
3463 +#include <linux/mm.h>
3464 +#include <linux/module.h>
3465 +#include <linux/platform_device.h>
3466 +#include <linux/spi/spi.h>
3467 +#include <linux/fb.h>
3468 +#include <linux/clk.h>
3469 +
3470 +#include <video/atmel_lcdc.h>
3471 +
3472 +#include <asm/hardware.h>
3473 +#include <asm/setup.h>
3474 +#include <asm/mach-types.h>
3475 +#include <asm/irq.h>
3476 +
3477 +#include <asm/mach/arch.h>
3478 +#include <asm/mach/map.h>
3479 +#include <asm/mach/irq.h>
3480 +
3481 +#include <asm/arch/board.h>
3482 +#include <asm/arch/gpio.h>
3483 +#include <asm/arch/at91sam926x_mc.h>
3484 +
3485 +#include "generic.h"
3486 +
3487 +
3488 +/*
3489 + * Serial port configuration.
3490 + * 0 .. 3 = USART0 .. USART3
3491 + * 4 = DBGU
3492 + */
3493 +static struct at91_uart_config __initdata ek_uart_config = {
3494 + .console_tty = 0, /* ttyS0 */
3495 + .nr_tty = 2,
3496 + .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
3497 +};
3498 +
3499 +static void __init ek_map_io(void)
3500 +{
3501 + /* Initialize processor: 12.000 MHz crystal */
3502 + at91sam9rl_initialize(12000000);
3503 +
3504 + /* Setup the serial ports and console */
3505 + at91_init_serial(&ek_uart_config);
3506 +}
3507 +
3508 +static void __init ek_init_irq(void)
3509 +{
3510 + at91sam9rl_init_interrupts(NULL);
3511 +}
3512 +
3513 +
3514 +/*
3515 + * MCI (SD/MMC)
3516 + */
3517 +static struct at91_mmc_data __initdata ek_mmc_data = {
3518 + .wire4 = 1,
3519 + .det_pin = AT91_PIN_PA15,
3520 +// .wp_pin = ... not connected
3521 +// .vcc_pin = ... not connected
3522 +};
3523 +
3524 +
3525 +/*
3526 + * NAND flash
3527 + */
3528 +static struct mtd_partition __initdata ek_nand_partition[] = {
3529 + {
3530 + .name = "Partition 1",
3531 + .offset = 0,
3532 + .size = 256 * 1024,
3533 + },
3534 + {
3535 + .name = "Partition 2",
3536 + .offset = 256 * 1024 ,
3537 + .size = MTDPART_SIZ_FULL,
3538 + },
3539 +};
3540 +
3541 +static struct mtd_partition *nand_partitions(int size, int *num_partitions)
3542 +{
3543 + *num_partitions = ARRAY_SIZE(ek_nand_partition);
3544 + return ek_nand_partition;
3545 +}
3546 +
3547 +static struct at91_nand_data __initdata ek_nand_data = {
3548 + .ale = 21,
3549 + .cle = 22,
3550 +// .det_pin = ... not connected
3551 + .rdy_pin = AT91_PIN_PD17,
3552 + .enable_pin = AT91_PIN_PB6,
3553 + .partition_info = nand_partitions,
3554 + .bus_width_16 = 0,
3555 +};
3556 +
3557 +
3558 +/*
3559 + * SPI devices
3560 + */
3561 +static struct spi_board_info ek_spi_devices[] = {
3562 + { /* DataFlash chip */
3563 + .modalias = "mtd_dataflash",
3564 + .chip_select = 0,
3565 + .max_speed_hz = 15 * 1000 * 1000,
3566 + .bus_num = 0,
3567 + },
3568 +};
3569 +
3570 +
3571 +/*
3572 + * LCD Controller
3573 + */
3574 +#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
3575 +static struct fb_videomode at91_tft_vga_modes[] = {
3576 + {
3577 + .name = "TX09D50VM1CCA @ 60",
3578 + .refresh = 60,
3579 + .xres = 240, .yres = 320,
3580 + .pixclock = KHZ2PICOS(4965),
3581 +
3582 + .left_margin = 1, .right_margin = 33,
3583 + .upper_margin = 1, .lower_margin = 0,
3584 + .hsync_len = 5, .vsync_len = 1,
3585 +
3586 + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
3587 + .vmode = FB_VMODE_NONINTERLACED,
3588 + },
3589 +};
3590 +
3591 +static struct fb_monspecs at91fb_default_monspecs = {
3592 + .manufacturer = "HIT",
3593 + .monitor = "TX09D50VM1CCA",
3594 +
3595 + .modedb = at91_tft_vga_modes,
3596 + .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
3597 + .hfmin = 15000,
3598 + .hfmax = 64000,
3599 + .vfmin = 50,
3600 + .vfmax = 150,
3601 +};
3602 +
3603 +#define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
3604 + | ATMEL_LCDC_DISTYPE_TFT \
3605 + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
3606 +
3607 +static void at91_lcdc_power_control(int on)
3608 +{
3609 + if (on)
3610 + at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */
3611 + else
3612 + at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */
3613 +}
3614 +
3615 +/* Driver datas */
3616 +static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
3617 + .default_bpp = 16,
3618 + .default_dmacon = ATMEL_LCDC_DMAEN,
3619 + .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2,
3620 + .default_monspecs = &at91fb_default_monspecs,
3621 + .atmel_lcdfb_power_control = at91_lcdc_power_control,
3622 + .guard_time = 1,
3623 +};
3624 +
3625 +#else
3626 +static struct atmel_lcdfb_info __initdata ek_lcdc_data;
3627 +#endif
3628 +
3629 +
3630 +static void __init ek_board_init(void)
3631 +{
3632 + /* Serial */
3633 + at91_add_device_serial();
3634 + /* I2C */
3635 + at91_add_device_i2c();
3636 + /* NAND */
3637 + at91_add_device_nand(&ek_nand_data);
3638 + /* SPI */
3639 + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3640 + /* MMC */
3641 + at91_add_device_mmc(0, &ek_mmc_data);
3642 + /* LCD Controller */
3643 + at91_add_device_lcdc(&ek_lcdc_data);
3644 +}
3645 +
3646 +MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
3647 + /* Maintainer: Atmel */
3648 + .phys_io = AT91_BASE_SYS,
3649 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3650 + .boot_params = AT91_SDRAM_BASE + 0x100,
3651 + .timer = &at91sam926x_timer,
3652 + .map_io = ek_map_io,
3653 + .init_irq = ek_init_irq,
3654 + .init_machine = ek_board_init,
3655 +MACHINE_END
3656 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/clock.c linux-2.6-stable/arch/arm/mach-at91/clock.c
3657 --- linux-2.6.21/arch/arm/mach-at91/clock.c Thu Apr 26 05:08:32 2007
3658 +++ linux-2.6-stable/arch/arm/mach-at91/clock.c Tue May 8 12:13:30 2007
3659 @@ -32,6 +32,7 @@
3660 #include <asm/arch/cpu.h>
3661
3662 #include "clock.h"
3663 +#include "generic.h"
3664
3665
3666 /*
3667 @@ -254,6 +255,23 @@
3668
3669 /*------------------------------------------------------------------------*/
3670
3671 +#ifdef CONFIG_PM
3672 +
3673 +int clk_must_disable(struct clk *clk)
3674 +{
3675 + if (!at91_suspend_entering_slow_clock())
3676 + return 0;
3677 +
3678 + while (clk->parent)
3679 + clk = clk->parent;
3680 + return clk != &clk32k;
3681 +}
3682 +EXPORT_SYMBOL(clk_must_disable);
3683 +
3684 +#endif
3685 +
3686 +/*------------------------------------------------------------------------*/
3687 +
3688 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
3689
3690 /*
3691 @@ -375,6 +393,7 @@
3692 seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
3693
3694 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
3695 +#warning "Hard-coded PCK"
3696 for (i = 0; i < 4; i++)
3697 seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
3698 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
3699 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/generic.h linux-2.6-stable/arch/arm/mach-at91/generic.h
3700 --- linux-2.6.21/arch/arm/mach-at91/generic.h Thu Apr 26 05:08:32 2007
3701 +++ linux-2.6-stable/arch/arm/mach-at91/generic.h Wed May 9 10:20:54 2007
3702 @@ -13,12 +13,14 @@
3703 extern void __init at91sam9260_initialize(unsigned long main_clock);
3704 extern void __init at91sam9261_initialize(unsigned long main_clock);
3705 extern void __init at91sam9263_initialize(unsigned long main_clock);
3706 +extern void __init at91sam9rl_initialize(unsigned long main_clock);
3707
3708 /* Interrupts */
3709 extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
3710 extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
3711 extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
3712 extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
3713 +extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
3714 extern void __init at91_aic_init(unsigned int priority[]);
3715
3716 /* Timer */
3717 @@ -34,6 +36,7 @@
3718 /* Power Management */
3719 extern void at91_irq_suspend(void);
3720 extern void at91_irq_resume(void);
3721 +extern int at91_suspend_entering_slow_clock(void);
3722
3723 /* GPIO */
3724 #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
3725 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/ics1523.c linux-2.6-stable/arch/arm/mach-at91/ics1523.c
3726 --- linux-2.6.21/arch/arm/mach-at91/ics1523.c Thu Jan 1 02:00:00 1970
3727 +++ linux-2.6-stable/arch/arm/mach-at91/ics1523.c Tue May 8 12:13:30 2007
3728 @@ -0,0 +1,207 @@
3729 +/*
3730 + * arch/arm/mach-at91rm9200/ics1523.c
3731 + *
3732 + * Copyright (C) 2003 ATMEL Rousset
3733 + *
3734 + * This program is free software; you can redistribute it and/or modify
3735 + * it under the terms of the GNU General Public License as published by
3736 + * the Free Software Foundation; either version 2 of the License, or
3737 + * (at your option) any later version.
3738 + *
3739 + * This program is distributed in the hope that it will be useful,
3740 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3741 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3742 + * GNU General Public License for more details.
3743 + *
3744 + * You should have received a copy of the GNU General Public License
3745 + * along with this program; if not, write to the Free Software
3746 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3747 + */
3748 +
3749 +#include <asm/hardware.h>
3750 +#include <asm/io.h>
3751 +
3752 +#include <linux/clk.h>
3753 +#include <linux/delay.h>
3754 +#include <linux/err.h>
3755 +#include <linux/init.h>
3756 +
3757 +#include <asm/arch/ics1523.h>
3758 +#include <asm/arch/at91_twi.h>
3759 +#include <asm/arch/gpio.h>
3760 +
3761 +/* TWI Errors */
3762 +#define AT91_TWI_ERROR (AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
3763 +
3764 +
3765 +static void __iomem *twi_base;
3766 +
3767 +#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
3768 +#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
3769 +
3770 +
3771 +/* -----------------------------------------------------------------------------
3772 + * Initialization of TWI CLOCK
3773 + * ----------------------------------------------------------------------------- */
3774 +
3775 +static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
3776 +{
3777 + int sclock;
3778 +
3779 + /* Here, CKDIV = 1 and CHDIV = CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
3780 + sclock = (10*mck_khz / ICS_TRANSFER_RATE);
3781 + if (sclock % 10 >= 5)
3782 + sclock = (sclock /10) - 5;
3783 + else
3784 + sclock = (sclock /10)- 6;
3785 + sclock = (sclock + (4 - sclock %4)) >> 2; /* div 4 */
3786 +
3787 + at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
3788 +}
3789 +
3790 +/* -----------------------------------------------------------------------------
3791 + * Read a byte with TWI Interface from the Clock Generator ICS1523
3792 + * ----------------------------------------------------------------------------- */
3793 +
3794 +static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
3795 +{
3796 + int Status, nb_trial;
3797 +
3798 + at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
3799 + at91_twi_write(AT91_TWI_IADR, reg_address);
3800 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
3801 +
3802 + /* Program temporizing period (300us) */
3803 + udelay(300);
3804 +
3805 + /* Wait TXcomplete ... */
3806 + nb_trial = 0;
3807 + Status = at91_twi_read(AT91_TWI_SR);
3808 + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
3809 + nb_trial++;
3810 + Status = at91_twi_read(AT91_TWI_SR);
3811 + }
3812 +
3813 + if (Status & AT91_TWI_TXCOMP) {
3814 + *data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
3815 + return ICS1523_ACCESS_OK;
3816 + }
3817 + else
3818 + return ICS1523_ACCESS_ERROR;
3819 +}
3820 +
3821 +/* -----------------------------------------------------------------------------
3822 + * Write a byte with TWI Interface to the Clock Generator ICS1523
3823 + * ----------------------------------------------------------------------------- */
3824 +
3825 +static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
3826 +{
3827 + int Status, nb_trial;
3828 +
3829 + at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
3830 + at91_twi_write(AT91_TWI_IADR, reg_address);
3831 + at91_twi_write(AT91_TWI_THR, data_out);
3832 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
3833 +
3834 + /* Program temporizing period (300us) */
3835 + udelay(300);
3836 +
3837 + nb_trial = 0;
3838 + Status = at91_twi_read(AT91_TWI_SR);
3839 + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
3840 + nb_trial++;
3841 + if (Status & AT91_TWI_ERROR) {
3842 + /* If Underrun OR NACK - Start again */
3843 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
3844 +
3845 + /* Program temporizing period (300us) */
3846 + udelay(300);
3847 + }
3848 + Status = at91_twi_read(AT91_TWI_SR);
3849 + };
3850 +
3851 + if (Status & AT91_TWI_TXCOMP)
3852 + return ICS1523_ACCESS_OK;
3853 + else
3854 + return ICS1523_ACCESS_ERROR;
3855 +}
3856 +
3857 +/* -----------------------------------------------------------------------------
3858 + * Initialization of the Clock Generator ICS1523
3859 + * ----------------------------------------------------------------------------- */
3860 +
3861 +int at91_ics1523_init(void)
3862 +{
3863 + int nb_trial;
3864 + int ack = ICS1523_ACCESS_OK;
3865 + unsigned int status = 0xffffffff;
3866 + struct clk *twi_clk;
3867 +
3868 + /* Map in TWI peripheral */
3869 + twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
3870 + if (!twi_base)
3871 + return -ENOMEM;
3872 +
3873 + /* pins used for TWI interface */
3874 + at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
3875 + at91_set_multi_drive(AT91_PIN_PA25, 1);
3876 + at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
3877 + at91_set_multi_drive(AT91_PIN_PA26, 1);
3878 +
3879 + /* Enable the TWI clock */
3880 + twi_clk = clk_get(NULL, "twi_clk");
3881 + if (IS_ERR(twi_clk))
3882 + return ICS1523_ACCESS_ERROR;
3883 + clk_enable(twi_clk);
3884 +
3885 + /* Disable interrupts */
3886 + at91_twi_write(AT91_TWI_IDR, -1);
3887 +
3888 + /* Reset peripheral */
3889 + at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
3890 +
3891 + /* Set Master mode */
3892 + at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
3893 +
3894 + /* Set TWI Clock Waveform Generator Register */
3895 + at91_ics1523_SetTwiClock(60000); /* MCK in KHz = 60000 KHz */
3896 +
3897 + /* ICS1523 Initialisation */
3898 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
3899 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
3900 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
3901 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
3902 +
3903 + nb_trial = 0;
3904 + do {
3905 + nb_trial++;
3906 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
3907 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
3908 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
3909 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
3910 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
3911 +
3912 + /* Program 1ms temporizing period */
3913 + mdelay(1);
3914 +
3915 + at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
3916 + } while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
3917 +
3918 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
3919 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
3920 +
3921 + /* Program 1ms temporizing period */
3922 + mdelay(1);
3923 +
3924 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
3925 +
3926 + /* Program 1ms temporizing period */
3927 + mdelay(1);
3928 +
3929 + /* All done - cleanup */
3930 + iounmap(twi_base);
3931 + clk_disable(twi_clk);
3932 + clk_put(twi_clk);
3933 +
3934 + return ack;
3935 +}
3936 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm.c linux-2.6-stable/arch/arm/mach-at91/pm.c
3937 --- linux-2.6.21/arch/arm/mach-at91/pm.c Thu Apr 26 05:08:32 2007
3938 +++ linux-2.6-stable/arch/arm/mach-at91/pm.c Tue May 8 12:13:31 2007
3939 @@ -63,6 +63,7 @@
3940 * Verify that all the clocks are correct before entering
3941 * slow-clock mode.
3942 */
3943 +#warning "SAM9260 only has 3 programmable clocks."
3944 static int at91_pm_verify_clocks(void)
3945 {
3946 unsigned long scsr;
3947 @@ -104,20 +105,15 @@
3948 }
3949
3950 /*
3951 - * Call this from platform driver suspend() to see how deeply to suspend.
3952 + * This is called from clk_must_disable(), to see how deeply to suspend.
3953 * For example, some controllers (like OHCI) need one of the PLL clocks
3954 * in order to act as a wakeup source, and those are not available when
3955 * going into slow clock mode.
3956 - *
3957 - * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
3958 - * the very same problem (but not using at91 main_clk), and it'd be better
3959 - * to add one generic API rather than lots of platform-specific ones.
3960 */
3961 int at91_suspend_entering_slow_clock(void)
3962 {
3963 return (target_state == PM_SUSPEND_MEM);
3964 }
3965 -EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
3966
3967
3968 static void (*slow_clock)(void);
3969 @@ -207,16 +203,23 @@
3970 .enter = at91_pm_enter,
3971 };
3972
3973 +#ifdef CONFIG_AT91_SLOW_CLOCK
3974 +extern void at91rm9200_slow_clock(void);
3975 +extern u32 at91rm9200_slow_clock_sz;
3976 +#endif
3977 +
3978 static int __init at91_pm_init(void)
3979 {
3980 - printk("AT91: Power Management\n");
3981 -
3982 -#ifdef CONFIG_AT91_PM_SLOW_CLOCK
3983 - /* REVISIT allocations of SRAM should be dynamically managed.
3984 +#ifdef CONFIG_AT91_SLOW_CLOCK
3985 + /*
3986 + * REVISIT allocations of SRAM should be dynamically managed.
3987 * FIQ handlers and other components will want SRAM/TCM too...
3988 */
3989 - slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
3990 + slow_clock = (void *) (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE + (3 * SZ_4K));
3991 memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
3992 + printk("AT91: Power Management (with slow clock mode)\n");
3993 +#else
3994 + printk("AT91: Power Management\n");
3995 #endif
3996
3997 /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
3998 diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S
3999 --- linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S Thu Jan 1 02:00:00 1970
4000 +++ linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S Tue May 8 12:13:31 2007
4001 @@ -0,0 +1,172 @@
4002 +/*
4003 + * arch/arm/mach-at91/pm_slow_clock.S
4004 + *
4005 + * Copyright (C) 2006 Savin Zlobec
4006 + *
4007 + * This program is free software; you can redistribute it and/or modify
4008 + * it under the terms of the GNU General Public License version 2 as
4009 + * published by the Free Software Foundation.
4010 + *
4011 + */
4012 +
4013 +#include <linux/linkage.h>
4014 +#include <asm/hardware.h>
4015 +#include <asm/arch/at91_pmc.h>
4016 +#include <asm/arch/at91rm9200_mc.h>
4017 +
4018 +#define MCKRDY_TIMEOUT 1000
4019 +#define MOSCRDY_TIMEOUT 1000
4020 +#define PLLALOCK_TIMEOUT 1000
4021 +
4022 + .macro wait_mckrdy
4023 + mov r2, #MCKRDY_TIMEOUT
4024 +1: sub r2, r2, #1
4025 + cmp r2, #0
4026 + beq 2f
4027 + ldr r3, [r1, #AT91_PMC_SR]
4028 + tst r3, #AT91_PMC_MCKRDY
4029 + beq 1b
4030 +2:
4031 + .endm
4032 +
4033 + .macro wait_moscrdy
4034 + mov r2, #MOSCRDY_TIMEOUT
4035 +1: sub r2, r2, #1
4036 + cmp r2, #0
4037 + beq 2f
4038 + ldr r3, [r1, #AT91_PMC_SR]
4039 + tst r3, #AT91_PMC_MOSCS
4040 + beq 1b
4041 +2:
4042 + .endm
4043 +
4044 + .macro wait_pllalock
4045 + mov r2, #PLLALOCK_TIMEOUT
4046 +1: sub r2, r2, #1
4047 + cmp r2, #0
4048 + beq 2f
4049 + ldr r3, [r1, #AT91_PMC_SR]
4050 + tst r3, #AT91_PMC_LOCKA
4051 + beq 1b
4052 +2:
4053 + .endm
4054 +
4055 + .macro wait_plladis
4056 + mov r2, #PLLALOCK_TIMEOUT
4057 +1: sub r2, r2, #1
4058 + cmp r2, #0
4059 + beq 2f
4060 + ldr r3, [r1, #AT91_PMC_SR]
4061 + tst r3, #AT91_PMC_LOCKA
4062 + bne 1b
4063 +2:
4064 + .endm
4065 +
4066 + .text
4067 +
4068 +ENTRY(at91rm9200_slow_clock)
4069 +
4070 + ldr r1, .at91_va_base_sys
4071 +
4072 + /* Put SDRAM in self refresh mode */
4073 +
4074 + b 1f
4075 + .align 5
4076 +1: mcr p15, 0, r0, c7, c10, 4
4077 + mov r2, #1
4078 + str r2, [r1, #AT91_SDRAMC_SRR]
4079 +
4080 + /* Save Master clock setting */
4081 +
4082 + ldr r2, [r1, #AT91_PMC_MCKR]
4083 + str r2, .saved_mckr
4084 +
4085 + /*
4086 + * Set the Master clock source to slow clock
4087 + *
4088 + * First set the CSS field, wait for MCKRDY
4089 + * and than set the PRES and MDIV fields.
4090 + *
4091 + * See eratta #2[78] for details.
4092 + */
4093 +
4094 + bic r2, r2, #3
4095 + str r2, [r1, #AT91_PMC_MCKR]
4096 +
4097 + wait_mckrdy
4098 +
4099 + mov r2, #0
4100 + str r2, [r1, #AT91_PMC_MCKR]
4101 +
4102 + /* Save PLLA setting and disable it */
4103 +
4104 + ldr r2, [r1, #AT91_CKGR_PLLAR]
4105 + str r2, .saved_pllar
4106 +
4107 + mov r2, #0
4108 + str r2, [r1, #AT91_CKGR_PLLAR]
4109 +
4110 + wait_plladis
4111 +
4112 + /* Turn off the main oscillator */
4113 +
4114 + ldr r2, [r1, #AT91_CKGR_MOR]
4115 + bic r2, r2, #AT91_PMC_MOSCEN
4116 + str r2, [r1, #AT91_CKGR_MOR]
4117 +
4118 + /* Wait for interrupt */
4119 +
4120 + mcr p15, 0, r0, c7, c0, 4
4121 +
4122 + /* Turn on the main oscillator */
4123 +
4124 + ldr r2, [r1, #AT91_CKGR_MOR]
4125 + orr r2, r2, #AT91_PMC_MOSCEN
4126 + str r2, [r1, #AT91_CKGR_MOR]
4127 +
4128 + wait_moscrdy
4129 +
4130 + /* Restore PLLA setting */
4131 +
4132 + ldr r2, .saved_pllar
4133 + str r2, [r1, #AT91_CKGR_PLLAR]
4134 +
4135 + wait_pllalock
4136 +
4137 + /*
4138 + * Restore master clock setting
4139 + *
4140 + * First set PRES if it was not 0,
4141 + * than set CSS and MDIV fields.
4142 + * After every change wait for
4143 + * MCKRDY.
4144 + *
4145 + * See eratta #2[78] for details.
4146 + */
4147 +
4148 + ldr r2, .saved_mckr
4149 + tst r2, #0x1C
4150 + beq 2f
4151 + and r2, r2, #0x1C
4152 + str r2, [r1, #AT91_PMC_MCKR]
4153 +
4154 + wait_mckrdy
4155 +
4156 +2: ldr r2, .saved_mckr
4157 + str r2, [r1, #AT91_PMC_MCKR]
4158 +
4159 + wait_mckrdy
4160 +
4161 + mov pc, lr
4162 +