projects / openwrt / svn-archive / archive.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
atheros: remove parentheses around return values
[openwrt/svn-archive/archive.git] / target / linux / atheros / patches-3.10 / 110-ar2313_ethernet.patch
1 --- a/drivers/net/ethernet/Kconfig
2 +++ b/drivers/net/ethernet/Kconfig
3 @@ -22,6 +22,7 @@ source "drivers/net/ethernet/adaptec/Kco
4 source "drivers/net/ethernet/aeroflex/Kconfig"
5 source "drivers/net/ethernet/alteon/Kconfig"
6 source "drivers/net/ethernet/amd/Kconfig"
7 +source "drivers/net/ethernet/ar231x/Kconfig"
8 source "drivers/net/ethernet/apple/Kconfig"
9 source "drivers/net/ethernet/atheros/Kconfig"
10 source "drivers/net/ethernet/cadence/Kconfig"
11 --- a/drivers/net/ethernet/Makefile
12 +++ b/drivers/net/ethernet/Makefile
13 @@ -9,6 +9,7 @@ obj-$(CONFIG_GRETH) += aeroflex/
14 obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
15 obj-$(CONFIG_NET_VENDOR_AMD) += amd/
16 obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
17 +obj-$(CONFIG_NET_VENDOR_AR231X) += ar231x/
18 obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/
19 obj-$(CONFIG_NET_CADENCE) += cadence/
20 obj-$(CONFIG_NET_BFIN) += adi/
21 --- /dev/null
22 +++ b/drivers/net/ethernet/ar231x/Kconfig
23 @@ -0,0 +1,5 @@
24 +config NET_VENDOR_AR231X
25 + tristate "AR231X Ethernet support"
26 + depends on ATHEROS_AR231X
27 + help
28 + Support for the AR231x/531x ethernet controller
29 --- /dev/null
30 +++ b/drivers/net/ethernet/ar231x/Makefile
31 @@ -0,0 +1 @@
32 +obj-$(CONFIG_NET_VENDOR_AR231X) += ar231x.o
33 --- /dev/null
34 +++ b/drivers/net/ethernet/ar231x/ar231x.c
35 @@ -0,0 +1,1265 @@
36 +/*
37 + * ar231x.c: Linux driver for the Atheros AR231x Ethernet device.
38 + *
39 + * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
40 + * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
41 + * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
42 + *
43 + * Thanks to Atheros for providing hardware and documentation
44 + * enabling me to write this driver.
45 + *
46 + * This program is free software; you can redistribute it and/or modify
47 + * it under the terms of the GNU General Public License as published by
48 + * the Free Software Foundation; either version 2 of the License, or
49 + * (at your option) any later version.
50 + *
51 + * Additional credits:
52 + * This code is taken from John Taylor's Sibyte driver and then
53 + * modified for the AR2313.
54 + */
55 +
56 +#include <linux/module.h>
57 +#include <linux/version.h>
58 +#include <linux/types.h>
59 +#include <linux/errno.h>
60 +#include <linux/ioport.h>
61 +#include <linux/pci.h>
62 +#include <linux/netdevice.h>
63 +#include <linux/etherdevice.h>
64 +#include <linux/interrupt.h>
65 +#include <linux/hardirq.h>
66 +#include <linux/skbuff.h>
67 +#include <linux/init.h>
68 +#include <linux/delay.h>
69 +#include <linux/mm.h>
70 +#include <linux/highmem.h>
71 +#include <linux/sockios.h>
72 +#include <linux/pkt_sched.h>
73 +#include <linux/mii.h>
74 +#include <linux/phy.h>
75 +#include <linux/ethtool.h>
76 +#include <linux/ctype.h>
77 +#include <linux/platform_device.h>
78 +
79 +#include <net/sock.h>
80 +#include <net/ip.h>
81 +
82 +#include <asm/io.h>
83 +#include <asm/irq.h>
84 +#include <asm/byteorder.h>
85 +#include <asm/uaccess.h>
86 +#include <asm/bootinfo.h>
87 +
88 +#define AR2313_MTU 1692
89 +#define AR2313_PRIOS 1
90 +#define AR2313_QUEUES (2*AR2313_PRIOS)
91 +#define AR2313_DESCR_ENTRIES 64
92 +
93 +
94 +#ifndef min
95 +#define min(a,b) (((a)<(b))?(a):(b))
96 +#endif
97 +
98 +#ifndef SMP_CACHE_BYTES
99 +#define SMP_CACHE_BYTES L1_CACHE_BYTES
100 +#endif
101 +
102 +#define AR2313_MBOX_SET_BIT 0x8
103 +
104 +#include "ar231x.h"
105 +
106 +/**
107 + * New interrupt handler strategy:
108 + *
109 + * An old interrupt handler worked using the traditional method of
110 + * replacing an skbuff with a new one when a packet arrives. However
111 + * the rx rings do not need to contain a static number of buffer
112 + * descriptors, thus it makes sense to move the memory allocation out
113 + * of the main interrupt handler and do it in a bottom half handler
114 + * and only allocate new buffers when the number of buffers in the
115 + * ring is below a certain threshold. In order to avoid starving the
116 + * NIC under heavy load it is however necessary to force allocation
117 + * when hitting a minimum threshold. The strategy for alloction is as
118 + * follows:
119 + *
120 + * RX_LOW_BUF_THRES - allocate buffers in the bottom half
121 + * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
122 + * the buffers in the interrupt handler
123 + * RX_RING_THRES - maximum number of buffers in the rx ring
124 + *
125 + * One advantagous side effect of this allocation approach is that the
126 + * entire rx processing can be done without holding any spin lock
127 + * since the rx rings and registers are totally independent of the tx
128 + * ring and its registers. This of course includes the kmalloc's of
129 + * new skb's. Thus start_xmit can run in parallel with rx processing
130 + * and the memory allocation on SMP systems.
131 + *
132 + * Note that running the skb reallocation in a bottom half opens up
133 + * another can of races which needs to be handled properly. In
134 + * particular it can happen that the interrupt handler tries to run
135 + * the reallocation while the bottom half is either running on another
136 + * CPU or was interrupted on the same CPU. To get around this the
137 + * driver uses bitops to prevent the reallocation routines from being
138 + * reentered.
139 + *
140 + * TX handling can also be done without holding any spin lock, wheee
141 + * this is fun! since tx_csm is only written to by the interrupt
142 + * handler.
143 + */
144 +
145 +/**
146 + * Threshold values for RX buffer allocation - the low water marks for
147 + * when to start refilling the rings are set to 75% of the ring
148 + * sizes. It seems to make sense to refill the rings entirely from the
149 + * intrrupt handler once it gets below the panic threshold, that way
150 + * we don't risk that the refilling is moved to another CPU when the
151 + * one running the interrupt handler just got the slab code hot in its
152 + * cache.
153 + */
154 +#define RX_RING_SIZE AR2313_DESCR_ENTRIES
155 +#define RX_PANIC_THRES (RX_RING_SIZE/4)
156 +#define RX_LOW_THRES ((3*RX_RING_SIZE)/4)
157 +#define CRC_LEN 4
158 +#define RX_OFFSET 2
159 +
160 +#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
161 +#define VLAN_HDR 4
162 +#else
163 +#define VLAN_HDR 0
164 +#endif
165 +
166 +#define AR2313_BUFSIZE (AR2313_MTU + VLAN_HDR + ETH_HLEN + CRC_LEN + RX_OFFSET)
167 +
168 +#ifdef MODULE
169 +MODULE_LICENSE("GPL");
170 +MODULE_AUTHOR("Sameer Dekate <sdekate@arubanetworks.com>, Imre Kaloz <kaloz@openwrt.org>, Felix Fietkau <nbd@openwrt.org>");
171 +MODULE_DESCRIPTION("AR231x Ethernet driver");
172 +#endif
173 +
174 +#define virt_to_phys(x) ((u32)(x) & 0x1fffffff)
175 +
176 +/* prototypes */
177 +static void ar231x_halt(struct net_device *dev);
178 +static void rx_tasklet_func(unsigned long data);
179 +static void rx_tasklet_cleanup(struct net_device *dev);
180 +static void ar231x_multicast_list(struct net_device *dev);
181 +static void ar231x_tx_timeout(struct net_device *dev);
182 +
183 +static int ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum);
184 +static int ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value);
185 +static int ar231x_mdiobus_reset(struct mii_bus *bus);
186 +static int ar231x_mdiobus_probe (struct net_device *dev);
187 +static void ar231x_adjust_link(struct net_device *dev);
188 +
189 +#ifndef ERR
190 +#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
191 +#endif
192 +
193 +#ifdef CONFIG_NET_POLL_CONTROLLER
194 +static void
195 +ar231x_netpoll(struct net_device *dev)
196 +{
197 + unsigned long flags;
198 +
199 + local_irq_save(flags);
200 + ar231x_interrupt(dev->irq, dev);
201 + local_irq_restore(flags);
202 +}
203 +#endif
204 +
205 +static const struct net_device_ops ar231x_ops = {
206 + .ndo_open = ar231x_open,
207 + .ndo_stop = ar231x_close,
208 + .ndo_start_xmit = ar231x_start_xmit,
209 + .ndo_set_rx_mode = ar231x_multicast_list,
210 + .ndo_do_ioctl = ar231x_ioctl,
211 + .ndo_change_mtu = eth_change_mtu,
212 + .ndo_validate_addr = eth_validate_addr,
213 + .ndo_set_mac_address = eth_mac_addr,
214 + .ndo_tx_timeout = ar231x_tx_timeout,
215 +#ifdef CONFIG_NET_POLL_CONTROLLER
216 + .ndo_poll_controller = ar231x_netpoll,
217 +#endif
218 +};
219 +
220 +int ar231x_probe(struct platform_device *pdev)
221 +{
222 + struct net_device *dev;
223 + struct ar231x_private *sp;
224 + struct resource *res;
225 + unsigned long ar_eth_base;
226 + char buf[64];
227 +
228 + dev = alloc_etherdev(sizeof(struct ar231x_private));
229 +
230 + if (dev == NULL) {
231 + printk(KERN_ERR
232 + "ar231x: Unable to allocate net_device structure!\n");
233 + return -ENOMEM;
234 + }
235 +
236 + platform_set_drvdata(pdev, dev);
237 +
238 + sp = netdev_priv(dev);
239 + sp->dev = dev;
240 + sp->cfg = pdev->dev.platform_data;
241 +
242 + sprintf(buf, "eth%d_membase", pdev->id);
243 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, buf);
244 + if (!res)
245 + return -ENODEV;
246 +
247 + sp->link = 0;
248 + ar_eth_base = res->start;
249 +
250 + sprintf(buf, "eth%d_irq", pdev->id);
251 + dev->irq = platform_get_irq_byname(pdev, buf);
252 +
253 + spin_lock_init(&sp->lock);
254 +
255 + dev->features |= NETIF_F_HIGHDMA;
256 + dev->netdev_ops = &ar231x_ops;
257 +
258 + tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long) dev);
259 + tasklet_disable(&sp->rx_tasklet);
260 +
261 + sp->eth_regs =
262 + ioremap_nocache(virt_to_phys(ar_eth_base), sizeof(*sp->eth_regs));
263 + if (!sp->eth_regs) {
264 + printk("Can't remap eth registers\n");
265 + return -ENXIO;
266 + }
267 +
268 + /**
269 + * When there's only one MAC, PHY regs are typically on ENET0,
270 + * even though the MAC might be on ENET1.
271 + * Needto remap PHY regs separately in this case
272 + */
273 + if (virt_to_phys(ar_eth_base) == virt_to_phys(sp->phy_regs))
274 + sp->phy_regs = sp->eth_regs;
275 + else {
276 + sp->phy_regs =
277 + ioremap_nocache(virt_to_phys(sp->cfg->phy_base),
278 + sizeof(*sp->phy_regs));
279 + if (!sp->phy_regs) {
280 + printk("Can't remap phy registers\n");
281 + return -ENXIO;
282 + }
283 + }
284 +
285 + sp->dma_regs =
286 + ioremap_nocache(virt_to_phys(ar_eth_base + 0x1000),
287 + sizeof(*sp->dma_regs));
288 + dev->base_addr = (unsigned int) sp->dma_regs;
289 + if (!sp->dma_regs) {
290 + printk("Can't remap DMA registers\n");
291 + return -ENXIO;
292 + }
293 +
294 + sp->int_regs = ioremap_nocache(virt_to_phys(sp->cfg->reset_base), 4);
295 + if (!sp->int_regs) {
296 + printk("Can't remap INTERRUPT registers\n");
297 + return -ENXIO;
298 + }
299 +
300 + strncpy(sp->name, "Atheros AR231x", sizeof(sp->name) - 1);
301 + sp->name[sizeof(sp->name) - 1] = '\0';
302 + memcpy(dev->dev_addr, sp->cfg->macaddr, 6);
303 +
304 + if (ar231x_init(dev)) {
305 + /* ar231x_init() calls ar231x_init_cleanup() on error */
306 + kfree(dev);
307 + return -ENODEV;
308 + }
309 +
310 + if (register_netdev(dev)) {
311 + printk("%s: register_netdev failed\n", __func__);
312 + return -1;
313 + }
314 +
315 + printk("%s: %s: %02x:%02x:%02x:%02x:%02x:%02x, irq %d\n",
316 + dev->name, sp->name,
317 + dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
318 + dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], dev->irq);
319 +
320 + sp->mii_bus = mdiobus_alloc();
321 + if (sp->mii_bus == NULL)
322 + return -1;
323 +
324 + sp->mii_bus->priv = dev;
325 + sp->mii_bus->read = ar231x_mdiobus_read;
326 + sp->mii_bus->write = ar231x_mdiobus_write;
327 + sp->mii_bus->reset = ar231x_mdiobus_reset;
328 + sp->mii_bus->name = "ar231x_eth_mii";
329 + snprintf(sp->mii_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id);
330 + sp->mii_bus->irq = kmalloc(sizeof(int), GFP_KERNEL);
331 + *sp->mii_bus->irq = PHY_POLL;
332 +
333 + mdiobus_register(sp->mii_bus);
334 +
335 + if (ar231x_mdiobus_probe(dev) != 0) {
336 + printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
337 + rx_tasklet_cleanup(dev);
338 + ar231x_init_cleanup(dev);
339 + unregister_netdev(dev);
340 + kfree(dev);
341 + return -ENODEV;
342 + }
343 +
344 + /* start link poll timer */
345 + ar231x_setup_timer(dev);
346 +
347 + return 0;
348 +}
349 +
350 +
351 +static void ar231x_multicast_list(struct net_device *dev)
352 +{
353 + struct ar231x_private *sp = netdev_priv(dev);
354 + unsigned int filter;
355 +
356 + filter = sp->eth_regs->mac_control;
357 +
358 + if (dev->flags & IFF_PROMISC)
359 + filter |= MAC_CONTROL_PR;
360 + else
361 + filter &= ~MAC_CONTROL_PR;
362 + if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 0))
363 + filter |= MAC_CONTROL_PM;
364 + else
365 + filter &= ~MAC_CONTROL_PM;
366 +
367 + sp->eth_regs->mac_control = filter;
368 +}
369 +
370 +static void rx_tasklet_cleanup(struct net_device *dev)
371 +{
372 + struct ar231x_private *sp = netdev_priv(dev);
373 +
374 + /**
375 + * Tasklet may be scheduled. Need to get it removed from the list
376 + * since we're about to free the struct.
377 + */
378 +
379 + sp->unloading = 1;
380 + tasklet_enable(&sp->rx_tasklet);
381 + tasklet_kill(&sp->rx_tasklet);
382 +}
383 +
384 +static int ar231x_remove(struct platform_device *pdev)
385 +{
386 + struct net_device *dev = platform_get_drvdata(pdev);
387 + struct ar231x_private *sp = netdev_priv(dev);
388 + rx_tasklet_cleanup(dev);
389 + ar231x_init_cleanup(dev);
390 + unregister_netdev(dev);
391 + mdiobus_unregister(sp->mii_bus);
392 + mdiobus_free(sp->mii_bus);
393 + kfree(dev);
394 + return 0;
395 +}
396 +
397 +
398 +/**
399 + * Restart the AR2313 ethernet controller.
400 + */
401 +static int ar231x_restart(struct net_device *dev)
402 +{
403 + /* disable interrupts */
404 + disable_irq(dev->irq);
405 +
406 + /* stop mac */
407 + ar231x_halt(dev);
408 +
409 + /* initialize */
410 + ar231x_init(dev);
411 +
412 + /* enable interrupts */
413 + enable_irq(dev->irq);
414 +
415 + return 0;
416 +}
417 +
418 +static struct platform_driver ar231x_driver = {
419 + .driver.name = "ar231x-eth",
420 + .probe = ar231x_probe,
421 + .remove = ar231x_remove,
422 +};
423 +
424 +module_platform_driver(ar231x_driver);
425 +
426 +static void ar231x_free_descriptors(struct net_device *dev)
427 +{
428 + struct ar231x_private *sp = netdev_priv(dev);
429 + if (sp->rx_ring != NULL) {
430 + kfree((void *) KSEG0ADDR(sp->rx_ring));
431 + sp->rx_ring = NULL;
432 + sp->tx_ring = NULL;
433 + }
434 +}
435 +
436 +
437 +static int ar231x_allocate_descriptors(struct net_device *dev)
438 +{
439 + struct ar231x_private *sp = netdev_priv(dev);
440 + int size;
441 + int j;
442 + ar231x_descr_t *space;
443 +
444 + if (sp->rx_ring != NULL) {
445 + printk("%s: already done.\n", __FUNCTION__);
446 + return 0;
447 + }
448 +
449 + size =
450 + (sizeof(ar231x_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES));
451 + space = kmalloc(size, GFP_KERNEL);
452 + if (space == NULL)
453 + return 1;
454 +
455 + /* invalidate caches */
456 + dma_cache_inv((unsigned int) space, size);
457 +
458 + /* now convert pointer to KSEG1 */
459 + space = (ar231x_descr_t *) KSEG1ADDR(space);
460 +
461 + memset((void *) space, 0, size);
462 +
463 + sp->rx_ring = space;
464 + space += AR2313_DESCR_ENTRIES;
465 +
466 + sp->tx_ring = space;
467 + space += AR2313_DESCR_ENTRIES;
468 +
469 + /* Initialize the transmit Descriptors */
470 + for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
471 + ar231x_descr_t *td = &sp->tx_ring[j];
472 + td->status = 0;
473 + td->devcs = DMA_TX1_CHAINED;
474 + td->addr = 0;
475 + td->descr =
476 + virt_to_phys(&sp->
477 + tx_ring[(j + 1) & (AR2313_DESCR_ENTRIES - 1)]);
478 + }
479 +
480 + return 0;
481 +}
482 +
483 +
484 +/**
485 + * Generic cleanup handling data allocated during init. Used when the
486 + * module is unloaded or if an error occurs during initialization
487 + */
488 +static void ar231x_init_cleanup(struct net_device *dev)
489 +{
490 + struct ar231x_private *sp = netdev_priv(dev);
491 + struct sk_buff *skb;
492 + int j;
493 +
494 + ar231x_free_descriptors(dev);
495 +
496 + if (sp->eth_regs)
497 + iounmap((void *) sp->eth_regs);
498 + if (sp->dma_regs)
499 + iounmap((void *) sp->dma_regs);
500 +
501 + if (sp->rx_skb) {
502 + for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
503 + skb = sp->rx_skb[j];
504 + if (skb) {
505 + sp->rx_skb[j] = NULL;
506 + dev_kfree_skb(skb);
507 + }
508 + }
509 + kfree(sp->rx_skb);
510 + sp->rx_skb = NULL;
511 + }
512 +
513 + if (sp->tx_skb) {
514 + for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
515 + skb = sp->tx_skb[j];
516 + if (skb) {
517 + sp->tx_skb[j] = NULL;
518 + dev_kfree_skb(skb);
519 + }
520 + }
521 + kfree(sp->tx_skb);
522 + sp->tx_skb = NULL;
523 + }
524 +}
525 +
526 +static int ar231x_setup_timer(struct net_device *dev)
527 +{
528 + struct ar231x_private *sp = netdev_priv(dev);
529 +
530 + init_timer(&sp->link_timer);
531 +
532 + sp->link_timer.function = ar231x_link_timer_fn;
533 + sp->link_timer.data = (int) dev;
534 + sp->link_timer.expires = jiffies + HZ;
535 +
536 + add_timer(&sp->link_timer);
537 + return 0;
538 +
539 +}
540 +
541 +static void ar231x_link_timer_fn(unsigned long data)
542 +{
543 + struct net_device *dev = (struct net_device *) data;
544 + struct ar231x_private *sp = netdev_priv(dev);
545 +
546 + /**
547 + * See if the link status changed.
548 + * This was needed to make sure we set the PHY to the
549 + * autonegotiated value of half or full duplex.
550 + */
551 + ar231x_check_link(dev);
552 +
553 + /**
554 + * Loop faster when we don't have link.
555 + * This was needed to speed up the AP bootstrap time.
556 + */
557 + if (sp->link == 0) {
558 + mod_timer(&sp->link_timer, jiffies + HZ / 2);
559 + } else {
560 + mod_timer(&sp->link_timer, jiffies + LINK_TIMER);
561 + }
562 +}
563 +
564 +static void ar231x_check_link(struct net_device *dev)
565 +{
566 + struct ar231x_private *sp = netdev_priv(dev);
567 + u16 phy_data;
568 +
569 + phy_data = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMSR);
570 + if (sp->phy_data != phy_data) {
571 + if (phy_data & BMSR_LSTATUS) {
572 + /**
573 + * Link is present, ready link partner ability to
574 + * deterine duplexity.
575 + */
576 + int duplex = 0;
577 + u16 reg;
578 +
579 + sp->link = 1;
580 + reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMCR);
581 + if (reg & BMCR_ANENABLE) {
582 + /* auto neg enabled */
583 + reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_LPA);
584 + duplex = (reg & (LPA_100FULL | LPA_10FULL)) ? 1 : 0;
585 + } else {
586 + /* no auto neg, just read duplex config */
587 + duplex = (reg & BMCR_FULLDPLX) ? 1 : 0;
588 + }
589 +
590 + printk(KERN_INFO "%s: Configuring MAC for %s duplex\n",
591 + dev->name, (duplex) ? "full" : "half");
592 +
593 + if (duplex) {
594 + /* full duplex */
595 + sp->eth_regs->mac_control =
596 + ((sp->eth_regs->
597 + mac_control | MAC_CONTROL_F) & ~MAC_CONTROL_DRO);
598 + } else {
599 + /* half duplex */
600 + sp->eth_regs->mac_control =
601 + ((sp->eth_regs->
602 + mac_control | MAC_CONTROL_DRO) & ~MAC_CONTROL_F);
603 + }
604 + } else {
605 + /* no link */
606 + sp->link = 0;
607 + }
608 + sp->phy_data = phy_data;
609 + }
610 +}
611 +
612 +static int ar231x_reset_reg(struct net_device *dev)
613 +{
614 + struct ar231x_private *sp = netdev_priv(dev);
615 + unsigned int ethsal, ethsah;
616 + unsigned int flags;
617 +
618 + *sp->int_regs |= sp->cfg->reset_mac;
619 + mdelay(10);
620 + *sp->int_regs &= ~sp->cfg->reset_mac;
621 + mdelay(10);
622 + *sp->int_regs |= sp->cfg->reset_phy;
623 + mdelay(10);
624 + *sp->int_regs &= ~sp->cfg->reset_phy;
625 + mdelay(10);
626 +
627 + sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR);
628 + mdelay(10);
629 + sp->dma_regs->bus_mode =
630 + ((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE);
631 +
632 + /* enable interrupts */
633 + sp->dma_regs->intr_ena = (DMA_STATUS_AIS |
634 + DMA_STATUS_NIS |
635 + DMA_STATUS_RI |
636 + DMA_STATUS_TI | DMA_STATUS_FBE);
637 + sp->dma_regs->xmt_base = virt_to_phys(sp->tx_ring);
638 + sp->dma_regs->rcv_base = virt_to_phys(sp->rx_ring);
639 + sp->dma_regs->control =
640 + (DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF);
641 +
642 + sp->eth_regs->flow_control = (FLOW_CONTROL_FCE);
643 + sp->eth_regs->vlan_tag = (0x8100);
644 +
645 + /* Enable Ethernet Interface */
646 + flags = (MAC_CONTROL_TE | /* transmit enable */
647 + MAC_CONTROL_PM | /* pass mcast */
648 + MAC_CONTROL_F | /* full duplex */
649 + MAC_CONTROL_HBD); /* heart beat disabled */
650 +
651 + if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
652 + flags |= MAC_CONTROL_PR;
653 + }
654 + sp->eth_regs->mac_control = flags;
655 +
656 + /* Set all Ethernet station address registers to their initial values */
657 + ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
658 + (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
659 +
660 + ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
661 + (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
662 + (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
663 + (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
664 +
665 + sp->eth_regs->mac_addr[0] = ethsah;
666 + sp->eth_regs->mac_addr[1] = ethsal;
667 +
668 + mdelay(10);
669 +
670 + return 0;
671 +}
672 +
673 +
674 +static int ar231x_init(struct net_device *dev)
675 +{
676 + struct ar231x_private *sp = netdev_priv(dev);
677 + int ecode = 0;
678 +
679 + /* Allocate descriptors */
680 + if (ar231x_allocate_descriptors(dev)) {
681 + printk("%s: %s: ar231x_allocate_descriptors failed\n",
682 + dev->name, __FUNCTION__);
683 + ecode = -EAGAIN;
684 + goto init_error;
685 + }
686 +
687 + /* Get the memory for the skb rings */
688 + if (sp->rx_skb == NULL) {
689 + sp->rx_skb =
690 + kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
691 + GFP_KERNEL);
692 + if (!(sp->rx_skb)) {
693 + printk("%s: %s: rx_skb kmalloc failed\n",
694 + dev->name, __FUNCTION__);
695 + ecode = -EAGAIN;
696 + goto init_error;
697 + }
698 + }
699 + memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
700 +
701 + if (sp->tx_skb == NULL) {
702 + sp->tx_skb =
703 + kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
704 + GFP_KERNEL);
705 + if (!(sp->tx_skb)) {
706 + printk("%s: %s: tx_skb kmalloc failed\n",
707 + dev->name, __FUNCTION__);
708 + ecode = -EAGAIN;
709 + goto init_error;
710 + }
711 + }
712 + memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
713 +
714 + /**
715 + * Set tx_csm before we start receiving interrupts, otherwise
716 + * the interrupt handler might think it is supposed to process
717 + * tx ints before we are up and running, which may cause a null
718 + * pointer access in the int handler.
719 + */
720 + sp->rx_skbprd = 0;
721 + sp->cur_rx = 0;
722 + sp->tx_prd = 0;
723 + sp->tx_csm = 0;
724 +
725 + /* Zero the stats before starting the interface */
726 + memset(&dev->stats, 0, sizeof(dev->stats));
727 +
728 + /**
729 + * We load the ring here as there seem to be no way to tell the
730 + * firmware to wipe the ring without re-initializing it.
731 + */
732 + ar231x_load_rx_ring(dev, RX_RING_SIZE);
733 +
734 + /* Init hardware */
735 + ar231x_reset_reg(dev);
736 +
737 + /* Get the IRQ */
738 + ecode =
739 + request_irq(dev->irq, &ar231x_interrupt,
740 + IRQF_DISABLED,
741 + dev->name, dev);
742 + if (ecode) {
743 + printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n",
744 + dev->name, __FUNCTION__, dev->irq);
745 + goto init_error;
746 + }
747 +
748 +
749 + tasklet_enable(&sp->rx_tasklet);
750 +
751 + return 0;
752 +
753 + init_error:
754 + ar231x_init_cleanup(dev);
755 + return ecode;
756 +}
757 +
758 +/**
759 + * Load the rx ring.
760 + *
761 + * Loading rings is safe without holding the spin lock since this is
762 + * done only before the device is enabled, thus no interrupts are
763 + * generated and by the interrupt handler/tasklet handler.
764 + */
765 +static void ar231x_load_rx_ring(struct net_device *dev, int nr_bufs)
766 +{
767 +
768 + struct ar231x_private *sp = netdev_priv(dev);
769 + short i, idx;
770 +
771 + idx = sp->rx_skbprd;
772 +
773 + for (i = 0; i < nr_bufs; i++) {
774 + struct sk_buff *skb;
775 + ar231x_descr_t *rd;
776 +
777 + if (sp->rx_skb[idx])
778 + break;
779 +
780 + skb = netdev_alloc_skb_ip_align(dev, AR2313_BUFSIZE);
781 + if (!skb) {
782 + printk("\n\n\n\n %s: No memory in system\n\n\n\n",
783 + __FUNCTION__);
784 + break;
785 + }
786 +
787 + /* Make sure IP header starts on a fresh cache line */
788 + skb->dev = dev;
789 + sp->rx_skb[idx] = skb;
790 +
791 + rd = (ar231x_descr_t *) & sp->rx_ring[idx];
792 +
793 + /* initialize dma descriptor */
794 + rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
795 + DMA_RX1_CHAINED);
796 + rd->addr = virt_to_phys(skb->data);
797 + rd->descr =
798 + virt_to_phys(&sp->
799 + rx_ring[(idx + 1) & (AR2313_DESCR_ENTRIES - 1)]);
800 + rd->status = DMA_RX_OWN;
801 +
802 + idx = DSC_NEXT(idx);
803 + }
804 +
805 + if (i)
806 + sp->rx_skbprd = idx;
807 +
808 + return;
809 +}
810 +
811 +#define AR2313_MAX_PKTS_PER_CALL 64
812 +
813 +static int ar231x_rx_int(struct net_device *dev)
814 +{
815 + struct ar231x_private *sp = netdev_priv(dev);
816 + struct sk_buff *skb, *skb_new;
817 + ar231x_descr_t *rxdesc;
818 + unsigned int status;
819 + u32 idx;
820 + int pkts = 0;
821 + int rval;
822 +
823 + idx = sp->cur_rx;
824 +
825 + /* process at most the entire ring and then wait for another int */
826 + while (1) {
827 +
828 + rxdesc = &sp->rx_ring[idx];
829 + status = rxdesc->status;
830 + if (status & DMA_RX_OWN) {
831 + /* SiByte owns descriptor or descr not yet filled in */
832 + rval = 0;
833 + break;
834 + }
835 +
836 + if (++pkts > AR2313_MAX_PKTS_PER_CALL) {
837 + rval = 1;
838 + break;
839 + }
840 +
841 + if ((status & DMA_RX_ERROR) && !(status & DMA_RX_LONG)) {
842 + dev->stats.rx_errors++;
843 + dev->stats.rx_dropped++;
844 +
845 + /* add statistics counters */
846 + if (status & DMA_RX_ERR_CRC)
847 + dev->stats.rx_crc_errors++;
848 + if (status & DMA_RX_ERR_COL)
849 + dev->stats.rx_over_errors++;
850 + if (status & DMA_RX_ERR_LENGTH)
851 + dev->stats.rx_length_errors++;
852 + if (status & DMA_RX_ERR_RUNT)
853 + dev->stats.rx_over_errors++;
854 + if (status & DMA_RX_ERR_DESC)
855 + dev->stats.rx_over_errors++;
856 +
857 + } else {
858 + /* alloc new buffer. */
859 + skb_new = netdev_alloc_skb_ip_align(dev, AR2313_BUFSIZE);
860 + if (skb_new != NULL) {
861 +
862 + skb = sp->rx_skb[idx];
863 + /* set skb */
864 + skb_put(skb,
865 + ((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN);
866 +
867 + dev->stats.rx_bytes += skb->len;
868 + skb->protocol = eth_type_trans(skb, dev);
869 + /* pass the packet to upper layers */
870 + netif_rx(skb);
871 +
872 + skb_new->dev = dev;
873 + /* reset descriptor's curr_addr */
874 + rxdesc->addr = virt_to_phys(skb_new->data);
875 +
876 + dev->stats.rx_packets++;
877 + sp->rx_skb[idx] = skb_new;
878 + } else {
879 + dev->stats.rx_dropped++;
880 + }
881 + }
882 +
883 + rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
884 + DMA_RX1_CHAINED);
885 + rxdesc->status = DMA_RX_OWN;
886 +
887 + idx = DSC_NEXT(idx);
888 + }
889 +
890 + sp->cur_rx = idx;
891 +
892 + return rval;
893 +}
894 +
895 +
896 +static void ar231x_tx_int(struct net_device *dev)
897 +{
898 + struct ar231x_private *sp = netdev_priv(dev);
899 + u32 idx;
900 + struct sk_buff *skb;
901 + ar231x_descr_t *txdesc;
902 + unsigned int status = 0;
903 +
904 + idx = sp->tx_csm;
905 +
906 + while (idx != sp->tx_prd) {
907 + txdesc = &sp->tx_ring[idx];
908 +
909 + if ((status = txdesc->status) & DMA_TX_OWN) {
910 + /* ar231x dma still owns descr */
911 + break;
912 + }
913 + /* done with this descriptor */
914 + dma_unmap_single(NULL, txdesc->addr,
915 + txdesc->devcs & DMA_TX1_BSIZE_MASK,
916 + DMA_TO_DEVICE);
917 + txdesc->status = 0;
918 +
919 + if (status & DMA_TX_ERROR) {
920 + dev->stats.tx_errors++;
921 + dev->stats.tx_dropped++;
922 + if (status & DMA_TX_ERR_UNDER)
923 + dev->stats.tx_fifo_errors++;
924 + if (status & DMA_TX_ERR_HB)
925 + dev->stats.tx_heartbeat_errors++;
926 + if (status & (DMA_TX_ERR_LOSS | DMA_TX_ERR_LINK))
927 + dev->stats.tx_carrier_errors++;
928 + if (status & (DMA_TX_ERR_LATE |
929 + DMA_TX_ERR_COL |
930 + DMA_TX_ERR_JABBER | DMA_TX_ERR_DEFER))
931 + dev->stats.tx_aborted_errors++;
932 + } else {
933 + /* transmit OK */
934 + dev->stats.tx_packets++;
935 + }
936 +
937 + skb = sp->tx_skb[idx];
938 + sp->tx_skb[idx] = NULL;
939 + idx = DSC_NEXT(idx);
940 + dev->stats.tx_bytes += skb->len;
941 + dev_kfree_skb_irq(skb);
942 + }
943 +
944 + sp->tx_csm = idx;
945 +
946 + return;
947 +}
948 +
949 +
950 +static void rx_tasklet_func(unsigned long data)
951 +{
952 + struct net_device *dev = (struct net_device *) data;
953 + struct ar231x_private *sp = netdev_priv(dev);
954 +
955 + if (sp->unloading) {
956 + return;
957 + }
958 +
959 + if (ar231x_rx_int(dev)) {
960 + tasklet_hi_schedule(&sp->rx_tasklet);
961 + } else {
962 + unsigned long flags;
963 + spin_lock_irqsave(&sp->lock, flags);
964 + sp->dma_regs->intr_ena |= DMA_STATUS_RI;
965 + spin_unlock_irqrestore(&sp->lock, flags);
966 + }
967 +}
968 +
969 +static void rx_schedule(struct net_device *dev)
970 +{
971 + struct ar231x_private *sp = netdev_priv(dev);
972 +
973 + sp->dma_regs->intr_ena &= ~DMA_STATUS_RI;
974 +
975 + tasklet_hi_schedule(&sp->rx_tasklet);
976 +}
977 +
978 +static irqreturn_t ar231x_interrupt(int irq, void *dev_id)
979 +{
980 + struct net_device *dev = (struct net_device *) dev_id;
981 + struct ar231x_private *sp = netdev_priv(dev);
982 + unsigned int status, enabled;
983 +
984 + /* clear interrupt */
985 + /* Don't clear RI bit if currently disabled */
986 + status = sp->dma_regs->status;
987 + enabled = sp->dma_regs->intr_ena;
988 + sp->dma_regs->status = status & enabled;
989 +
990 + if (status & DMA_STATUS_NIS) {
991 + /* normal status */
992 + /**
993 + * Don't schedule rx processing if interrupt
994 + * is already disabled.
995 + */
996 + if (status & enabled & DMA_STATUS_RI) {
997 + /* receive interrupt */
998 + rx_schedule(dev);
999 + }
1000 + if (status & DMA_STATUS_TI) {
1001 + /* transmit interrupt */
1002 + ar231x_tx_int(dev);
1003 + }
1004 + }
1005 +
1006 + /* abnormal status */
1007 + if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) {
1008 + ar231x_restart(dev);
1009 + }
1010 + return IRQ_HANDLED;
1011 +}
1012 +
1013 +
1014 +static int ar231x_open(struct net_device *dev)
1015 +{
1016 + struct ar231x_private *sp = netdev_priv(dev);
1017 + unsigned int ethsal, ethsah;
1018 +
1019 + /* reset the hardware, in case the MAC address changed */
1020 + ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
1021 + (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
1022 +
1023 + ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
1024 + (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
1025 + (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
1026 + (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
1027 +
1028 + sp->eth_regs->mac_addr[0] = ethsah;
1029 + sp->eth_regs->mac_addr[1] = ethsal;
1030 +
1031 + mdelay(10);
1032 +
1033 + dev->mtu = 1500;
1034 + netif_start_queue(dev);
1035 +
1036 + sp->eth_regs->mac_control |= MAC_CONTROL_RE;
1037 +
1038 + return 0;
1039 +}
1040 +
1041 +static void ar231x_tx_timeout(struct net_device *dev)
1042 +{
1043 + struct ar231x_private *sp = netdev_priv(dev);
1044 + unsigned long flags;
1045 +
1046 + spin_lock_irqsave(&sp->lock, flags);
1047 + ar231x_restart(dev);
1048 + spin_unlock_irqrestore(&sp->lock, flags);
1049 +}
1050 +
1051 +static void ar231x_halt(struct net_device *dev)
1052 +{
1053 + struct ar231x_private *sp = netdev_priv(dev);
1054 + int j;
1055 +
1056 + tasklet_disable(&sp->rx_tasklet);
1057 +
1058 + /* kill the MAC */
1059 + sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE | /* disable Receives */
1060 + MAC_CONTROL_TE); /* disable Transmits */
1061 + /* stop dma */
1062 + sp->dma_regs->control = 0;
1063 + sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR;
1064 +
1065 + /* place phy and MAC in reset */
1066 + *sp->int_regs |= (sp->cfg->reset_mac | sp->cfg->reset_phy);
1067 +
1068 + /* free buffers on tx ring */
1069 + for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
1070 + struct sk_buff *skb;
1071 + ar231x_descr_t *txdesc;
1072 +
1073 + txdesc = &sp->tx_ring[j];
1074 + txdesc->descr = 0;
1075 +
1076 + skb = sp->tx_skb[j];
1077 + if (skb) {
1078 + dev_kfree_skb(skb);
1079 + sp->tx_skb[j] = NULL;
1080 + }
1081 + }
1082 +}
1083 +
1084 +/**
1085 + * close should do nothing. Here's why. It's called when
1086 + * 'ifconfig bond0 down' is run. If it calls free_irq then
1087 + * the irq is gone forever ! When bond0 is made 'up' again,
1088 + * the ar231x_open () does not call request_irq (). Worse,
1089 + * the call to ar231x_halt() generates a WDOG reset due to
1090 + * the write to 'sp->int_regs' and the box reboots.
1091 + * Commenting this out is good since it allows the
1092 + * system to resume when bond0 is made up again.
1093 + */
1094 +static int ar231x_close(struct net_device *dev)
1095 +{
1096 +#if 0
1097 + /* Disable interrupts */
1098 + disable_irq(dev->irq);
1099 +
1100 + /**
1101 + * Without (or before) releasing irq and stopping hardware, this
1102 + * is an absolute non-sense, by the way. It will be reset instantly
1103 + * by the first irq.
1104 + */
1105 + netif_stop_queue(dev);
1106 +
1107 + /* stop the MAC and DMA engines */
1108 + ar231x_halt(dev);
1109 +
1110 + /* release the interrupt */
1111 + free_irq(dev->irq, dev);
1112 +
1113 +#endif
1114 + return 0;
1115 +}
1116 +
1117 +static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev)
1118 +{
1119 + struct ar231x_private *sp = netdev_priv(dev);
1120 + ar231x_descr_t *td;
1121 + u32 idx;
1122 +
1123 + idx = sp->tx_prd;
1124 + td = &sp->tx_ring[idx];
1125 +
1126 + if (td->status & DMA_TX_OWN) {
1127 + /* free skbuf and lie to the caller that we sent it out */
1128 + dev->stats.tx_dropped++;
1129 + dev_kfree_skb(skb);
1130 +
1131 + /* restart transmitter in case locked */
1132 + sp->dma_regs->xmt_poll = 0;
1133 + return 0;
1134 + }
1135 +
1136 + /* Setup the transmit descriptor. */
1137 + td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) |
1138 + (DMA_TX1_LS | DMA_TX1_IC | DMA_TX1_CHAINED));
1139 + td->addr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
1140 + td->status = DMA_TX_OWN;
1141 +
1142 + /* kick transmitter last */
1143 + sp->dma_regs->xmt_poll = 0;
1144 +
1145 + sp->tx_skb[idx] = skb;
1146 + idx = DSC_NEXT(idx);
1147 + sp->tx_prd = idx;
1148 +
1149 + return 0;
1150 +}
1151 +
1152 +static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1153 +{
1154 + struct ar231x_private *sp = netdev_priv(dev);
1155 + int ret;
1156 +
1157 + switch (cmd) {
1158 +
1159 + case SIOCETHTOOL:
1160 + spin_lock_irq(&sp->lock);
1161 + ret = phy_ethtool_ioctl(sp->phy_dev, (void *) ifr->ifr_data);
1162 + spin_unlock_irq(&sp->lock);
1163 + return ret;
1164 +
1165 + case SIOCSIFHWADDR:
1166 + if (copy_from_user
1167 + (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr)))
1168 + return -EFAULT;
1169 + return 0;
1170 +
1171 + case SIOCGIFHWADDR:
1172 + if (copy_to_user
1173 + (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
1174 + return -EFAULT;
1175 + return 0;
1176 +
1177 + case SIOCGMIIPHY:
1178 + case SIOCGMIIREG:
1179 + case SIOCSMIIREG:
1180 + return phy_mii_ioctl(sp->phy_dev, ifr, cmd);
1181 +
1182 + default:
1183 + break;
1184 + }
1185 +
1186 + return -EOPNOTSUPP;
1187 +}
1188 +
1189 +static void ar231x_adjust_link(struct net_device *dev)
1190 +{
1191 + struct ar231x_private *sp = netdev_priv(dev);
1192 + unsigned int mc;
1193 +
1194 + if (!sp->phy_dev->link)
1195 + return;
1196 +
1197 + if (sp->phy_dev->duplex != sp->oldduplex) {
1198 + mc = readl(&sp->eth_regs->mac_control);
1199 + mc &= ~(MAC_CONTROL_F | MAC_CONTROL_DRO);
1200 + if (sp->phy_dev->duplex)
1201 + mc |= MAC_CONTROL_F;
1202 + else
1203 + mc |= MAC_CONTROL_DRO;
1204 + writel(mc, &sp->eth_regs->mac_control);
1205 + sp->oldduplex = sp->phy_dev->duplex;
1206 + }
1207 +}
1208 +
1209 +#define MII_ADDR(phy, reg) \
1210 + ((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT))
1211 +
1212 +static int
1213 +ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
1214 +{
1215 + struct net_device *const dev = bus->priv;
1216 + struct ar231x_private *sp = netdev_priv(dev);
1217 + volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
1218 +
1219 + ethernet->mii_addr = MII_ADDR(phy_addr, regnum);
1220 + while (ethernet->mii_addr & MII_ADDR_BUSY);
1221 + return ethernet->mii_data >> MII_DATA_SHIFT;
1222 +}
1223 +
1224 +static int
1225 +ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
1226 + u16 value)
1227 +{
1228 + struct net_device *const dev = bus->priv;
1229 + struct ar231x_private *sp = netdev_priv(dev);
1230 + volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
1231 +
1232 + while (ethernet->mii_addr & MII_ADDR_BUSY);
1233 + ethernet->mii_data = value << MII_DATA_SHIFT;
1234 + ethernet->mii_addr = MII_ADDR(phy_addr, regnum) | MII_ADDR_WRITE;
1235 +
1236 + return 0;
1237 +}
1238 +
1239 +static int ar231x_mdiobus_reset(struct mii_bus *bus)
1240 +{
1241 + struct net_device *const dev = bus->priv;
1242 +
1243 + ar231x_reset_reg(dev);
1244 +
1245 + return 0;
1246 +}
1247 +
1248 +static int ar231x_mdiobus_probe (struct net_device *dev)
1249 +{
1250 + struct ar231x_private *const sp = netdev_priv(dev);
1251 + struct phy_device *phydev = NULL;
1252 + int phy_addr;
1253 +
1254 + /* find the first (lowest address) PHY on the current MAC's MII bus */
1255 + for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
1256 + if (sp->mii_bus->phy_map[phy_addr]) {
1257 + phydev = sp->mii_bus->phy_map[phy_addr];
1258 + sp->phy = phy_addr;
1259 + break; /* break out with first one found */
1260 + }
1261 +
1262 + if (!phydev) {
1263 + printk (KERN_ERR "ar231x: %s: no PHY found\n", dev->name);
1264 + return -1;
1265 + }
1266 +
1267 + /* now we are supposed to have a proper phydev, to attach to... */
1268 + BUG_ON(!phydev);
1269 + BUG_ON(phydev->attached_dev);
1270 +
1271 + phydev = phy_connect(dev, dev_name(&phydev->dev), &ar231x_adjust_link, 0,
1272 + PHY_INTERFACE_MODE_MII);
1273 +
1274 + if (IS_ERR(phydev)) {
1275 + printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
1276 + return PTR_ERR(phydev);
1277 + }
1278 +
1279 + /* mask with MAC supported features */
1280 + phydev->supported &= (SUPPORTED_10baseT_Half
1281 + | SUPPORTED_10baseT_Full
1282 + | SUPPORTED_100baseT_Half
1283 + | SUPPORTED_100baseT_Full
1284 + | SUPPORTED_Autoneg
1285 + /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
1286 + | SUPPORTED_MII
1287 + | SUPPORTED_TP);
1288 +
1289 + phydev->advertising = phydev->supported;
1290 +
1291 + sp->oldduplex = -1;
1292 + sp->phy_dev = phydev;
1293 +
1294 + printk(KERN_INFO "%s: attached PHY driver [%s] "
1295 + "(mii_bus:phy_addr=%s)\n",
1296 + dev->name, phydev->drv->name, dev_name(&phydev->dev));
1297 +
1298 + return 0;
1299 +}
1300 +
1301 --- /dev/null
1302 +++ b/drivers/net/ethernet/ar231x/ar231x.h
1303 @@ -0,0 +1,289 @@
1304 +/*
1305 + * ar231x.h: Linux driver for the Atheros AR231x Ethernet device.
1306 + *
1307 + * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
1308 + * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
1309 + * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
1310 + *
1311 + * Thanks to Atheros for providing hardware and documentation
1312 + * enabling me to write this driver.
1313 + *
1314 + * This program is free software; you can redistribute it and/or modify
1315 + * it under the terms of the GNU General Public License as published by
1316 + * the Free Software Foundation; either version 2 of the License, or
1317 + * (at your option) any later version.
1318 + */
1319 +
1320 +#ifndef _AR2313_H_
1321 +#define _AR2313_H_
1322 +
1323 +#include <linux/interrupt.h>
1324 +#include <generated/autoconf.h>
1325 +#include <linux/bitops.h>
1326 +#include <asm/bootinfo.h>
1327 +#include <ar231x_platform.h>
1328 +
1329 +/* probe link timer - 5 secs */
1330 +#define LINK_TIMER (5*HZ)
1331 +
1332 +#define IS_DMA_TX_INT(X) (((X) & (DMA_STATUS_TI)) != 0)
1333 +#define IS_DMA_RX_INT(X) (((X) & (DMA_STATUS_RI)) != 0)
1334 +#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN)) == 0)
1335 +
1336 +#define AR2313_TX_TIMEOUT (HZ/4)
1337 +
1338 +/* Rings */
1339 +#define DSC_RING_ENTRIES_SIZE (AR2313_DESCR_ENTRIES * sizeof(struct desc))
1340 +#define DSC_NEXT(idx) ((idx + 1) & (AR2313_DESCR_ENTRIES - 1))
1341 +
1342 +#define AR2313_MBGET 2
1343 +#define AR2313_MBSET 3
1344 +#define AR2313_PCI_RECONFIG 4
1345 +#define AR2313_PCI_DUMP 5
1346 +#define AR2313_TEST_PANIC 6
1347 +#define AR2313_TEST_NULLPTR 7
1348 +#define AR2313_READ_DATA 8
1349 +#define AR2313_WRITE_DATA 9
1350 +#define AR2313_GET_VERSION 10
1351 +#define AR2313_TEST_HANG 11
1352 +#define AR2313_SYNC 12
1353 +
1354 +#define DMA_RX_ERR_CRC BIT(1)
1355 +#define DMA_RX_ERR_DRIB BIT(2)
1356 +#define DMA_RX_ERR_MII BIT(3)
1357 +#define DMA_RX_EV2 BIT(5)
1358 +#define DMA_RX_ERR_COL BIT(6)
1359 +#define DMA_RX_LONG BIT(7)
1360 +#define DMA_RX_LS BIT(8) /* last descriptor */
1361 +#define DMA_RX_FS BIT(9) /* first descriptor */
1362 +#define DMA_RX_MF BIT(10) /* multicast frame */
1363 +#define DMA_RX_ERR_RUNT BIT(11) /* runt frame */
1364 +#define DMA_RX_ERR_LENGTH BIT(12) /* length error */
1365 +#define DMA_RX_ERR_DESC BIT(14) /* descriptor error */
1366 +#define DMA_RX_ERROR BIT(15) /* error summary */
1367 +#define DMA_RX_LEN_MASK 0x3fff0000
1368 +#define DMA_RX_LEN_SHIFT 16
1369 +#define DMA_RX_FILT BIT(30)
1370 +#define DMA_RX_OWN BIT(31) /* desc owned by DMA controller */
1371 +
1372 +#define DMA_RX1_BSIZE_MASK 0x000007ff
1373 +#define DMA_RX1_BSIZE_SHIFT 0
1374 +#define DMA_RX1_CHAINED BIT(24)
1375 +#define DMA_RX1_RER BIT(25)
1376 +
1377 +#define DMA_TX_ERR_UNDER BIT(1) /* underflow error */
1378 +#define DMA_TX_ERR_DEFER BIT(2) /* excessive deferral */
1379 +#define DMA_TX_COL_MASK 0x78
1380 +#define DMA_TX_COL_SHIFT 3
1381 +#define DMA_TX_ERR_HB BIT(7) /* hearbeat failure */
1382 +#define DMA_TX_ERR_COL BIT(8) /* excessive collisions */
1383 +#define DMA_TX_ERR_LATE BIT(9) /* late collision */
1384 +#define DMA_TX_ERR_LINK BIT(10) /* no carrier */
1385 +#define DMA_TX_ERR_LOSS BIT(11) /* loss of carrier */
1386 +#define DMA_TX_ERR_JABBER BIT(14) /* transmit jabber timeout */
1387 +#define DMA_TX_ERROR BIT(15) /* frame aborted */
1388 +#define DMA_TX_OWN BIT(31) /* descr owned by DMA controller */
1389 +
1390 +#define DMA_TX1_BSIZE_MASK 0x000007ff
1391 +#define DMA_TX1_BSIZE_SHIFT 0
1392 +#define DMA_TX1_CHAINED BIT(24) /* chained descriptors */
1393 +#define DMA_TX1_TER BIT(25) /* transmit end of ring */
1394 +#define DMA_TX1_FS BIT(29) /* first segment */
1395 +#define DMA_TX1_LS BIT(30) /* last segment */
1396 +#define DMA_TX1_IC BIT(31) /* interrupt on completion */
1397 +
1398 +#define RCVPKT_LENGTH(X) (X >> 16) /* Received pkt Length */
1399 +
1400 +#define MAC_CONTROL_RE BIT(2) /* receive enable */
1401 +#define MAC_CONTROL_TE BIT(3) /* transmit enable */
1402 +#define MAC_CONTROL_DC BIT(5) /* Deferral check */
1403 +#define MAC_CONTROL_ASTP BIT(8) /* Auto pad strip */
1404 +#define MAC_CONTROL_DRTY BIT(10) /* Disable retry */
1405 +#define MAC_CONTROL_DBF BIT(11) /* Disable bcast frames */
1406 +#define MAC_CONTROL_LCC BIT(12) /* late collision ctrl */
1407 +#define MAC_CONTROL_HP BIT(13) /* Hash Perfect filtering */
1408 +#define MAC_CONTROL_HASH BIT(14) /* Unicast hash filtering */
1409 +#define MAC_CONTROL_HO BIT(15) /* Hash only filtering */
1410 +#define MAC_CONTROL_PB BIT(16) /* Pass Bad frames */
1411 +#define MAC_CONTROL_IF BIT(17) /* Inverse filtering */
1412 +#define MAC_CONTROL_PR BIT(18) /* promiscuous mode (valid frames only) */
1413 +#define MAC_CONTROL_PM BIT(19) /* pass multicast */
1414 +#define MAC_CONTROL_F BIT(20) /* full-duplex */
1415 +#define MAC_CONTROL_DRO BIT(23) /* Disable Receive Own */
1416 +#define MAC_CONTROL_HBD BIT(28) /* heart-beat disabled (MUST BE SET) */
1417 +#define MAC_CONTROL_BLE BIT(30) /* big endian mode */
1418 +#define MAC_CONTROL_RA BIT(31) /* receive all (valid and invalid frames) */
1419 +
1420 +#define MII_ADDR_BUSY BIT(0)
1421 +#define MII_ADDR_WRITE BIT(1)
1422 +#define MII_ADDR_REG_SHIFT 6
1423 +#define MII_ADDR_PHY_SHIFT 11
1424 +#define MII_DATA_SHIFT 0
1425 +
1426 +#define FLOW_CONTROL_FCE BIT(1)
1427 +
1428 +#define DMA_BUS_MODE_SWR BIT(0) /* software reset */
1429 +#define DMA_BUS_MODE_BLE BIT(7) /* big endian mode */
1430 +#define DMA_BUS_MODE_PBL_SHIFT 8 /* programmable burst length 32 */
1431 +#define DMA_BUS_MODE_DBO BIT(20) /* big-endian descriptors */
1432 +
1433 +#define DMA_STATUS_TI BIT(0) /* transmit interrupt */
1434 +#define DMA_STATUS_TPS BIT(1) /* transmit process stopped */
1435 +#define DMA_STATUS_TU BIT(2) /* transmit buffer unavailable */
1436 +#define DMA_STATUS_TJT BIT(3) /* transmit buffer timeout */
1437 +#define DMA_STATUS_UNF BIT(5) /* transmit underflow */
1438 +#define DMA_STATUS_RI BIT(6) /* receive interrupt */
1439 +#define DMA_STATUS_RU BIT(7) /* receive buffer unavailable */
1440 +#define DMA_STATUS_RPS BIT(8) /* receive process stopped */
1441 +#define DMA_STATUS_ETI BIT(10) /* early transmit interrupt */
1442 +#define DMA_STATUS_FBE BIT(13) /* fatal bus interrupt */
1443 +#define DMA_STATUS_ERI BIT(14) /* early receive interrupt */
1444 +#define DMA_STATUS_AIS BIT(15) /* abnormal interrupt summary */
1445 +#define DMA_STATUS_NIS BIT(16) /* normal interrupt summary */
1446 +#define DMA_STATUS_RS_SHIFT 17 /* receive process state */
1447 +#define DMA_STATUS_TS_SHIFT 20 /* transmit process state */
1448 +#define DMA_STATUS_EB_SHIFT 23 /* error bits */
1449 +
1450 +#define DMA_CONTROL_SR BIT(1) /* start receive */
1451 +#define DMA_CONTROL_ST BIT(13) /* start transmit */
1452 +#define DMA_CONTROL_SF BIT(21) /* store and forward */
1453 +
1454 +
1455 +typedef struct {
1456 + volatile unsigned int status; /* OWN, Device control and status. */
1457 + volatile unsigned int devcs; /* pkt Control bits + Length */
1458 + volatile unsigned int addr; /* Current Address. */
1459 + volatile unsigned int descr; /* Next descriptor in chain. */
1460 +} ar231x_descr_t;
1461 +
1462 +
1463 +
1464 +/**
1465 + * New Combo structure for Both Eth0 AND eth1
1466 + */
1467 +typedef struct {
1468 + volatile unsigned int mac_control; /* 0x00 */
1469 + volatile unsigned int mac_addr[2]; /* 0x04 - 0x08 */
1470 + volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
1471 + volatile unsigned int mii_addr; /* 0x14 */
1472 + volatile unsigned int mii_data; /* 0x18 */
1473 + volatile unsigned int flow_control; /* 0x1c */
1474 + volatile unsigned int vlan_tag; /* 0x20 */
1475 + volatile unsigned int pad[7]; /* 0x24 - 0x3c */
1476 + volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
1477 +
1478 +} ETHERNET_STRUCT;
1479 +
1480 +/********************************************************************
1481 + * Interrupt controller
1482 + ********************************************************************/
1483 +
1484 +typedef struct {
1485 + volatile unsigned int wdog_control; /* 0x08 */
1486 + volatile unsigned int wdog_timer; /* 0x0c */
1487 + volatile unsigned int misc_status; /* 0x10 */
1488 + volatile unsigned int misc_mask; /* 0x14 */
1489 + volatile unsigned int global_status; /* 0x18 */
1490 + volatile unsigned int reserved; /* 0x1c */
1491 + volatile unsigned int reset_control; /* 0x20 */
1492 +} INTERRUPT;
1493 +
1494 +/********************************************************************
1495 + * DMA controller
1496 + ********************************************************************/
1497 +typedef struct {
1498 + volatile unsigned int bus_mode; /* 0x00 (CSR0) */
1499 + volatile unsigned int xmt_poll; /* 0x04 (CSR1) */
1500 + volatile unsigned int rcv_poll; /* 0x08 (CSR2) */
1501 + volatile unsigned int rcv_base; /* 0x0c (CSR3) */
1502 + volatile unsigned int xmt_base; /* 0x10 (CSR4) */
1503 + volatile unsigned int status; /* 0x14 (CSR5) */
1504 + volatile unsigned int control; /* 0x18 (CSR6) */
1505 + volatile unsigned int intr_ena; /* 0x1c (CSR7) */
1506 + volatile unsigned int rcv_missed; /* 0x20 (CSR8) */
1507 + volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */
1508 + volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
1509 + volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
1510 +} DMA;
1511 +
1512 +/**
1513 + * Struct private for the Sibyte.
1514 + *
1515 + * Elements are grouped so variables used by the tx handling goes
1516 + * together, and will go into the same cache lines etc. in order to
1517 + * avoid cache line contention between the rx and tx handling on SMP.
1518 + *
1519 + * Frequently accessed variables are put at the beginning of the
1520 + * struct to help the compiler generate better/shorter code.
1521 + */
1522 +struct ar231x_private {
1523 + struct net_device *dev;
1524 + int version;
1525 + u32 mb[2];
1526 +
1527 + volatile ETHERNET_STRUCT *phy_regs;
1528 + volatile ETHERNET_STRUCT *eth_regs;
1529 + volatile DMA *dma_regs;
1530 + volatile u32 *int_regs;
1531 + struct ar231x_eth *cfg;
1532 +
1533 + spinlock_t lock; /* Serialise access to device */
1534 +
1535 + /* RX and TX descriptors, must be adjacent */
1536 + ar231x_descr_t *rx_ring;
1537 + ar231x_descr_t *tx_ring;
1538 +
1539 +
1540 + struct sk_buff **rx_skb;
1541 + struct sk_buff **tx_skb;
1542 +
1543 + /* RX elements */
1544 + u32 rx_skbprd;
1545 + u32 cur_rx;
1546 +
1547 + /* TX elements */
1548 + u32 tx_prd;
1549 + u32 tx_csm;
1550 +
1551 + /* Misc elements */
1552 + char name[48];
1553 + struct {
1554 + u32 address;
1555 + u32 length;
1556 + char *mapping;
1557 + } desc;
1558 +
1559 +
1560 + struct timer_list link_timer;
1561 + unsigned short phy; /* merlot phy = 1, samsung phy = 0x1f */
1562 + unsigned short mac;
1563 + unsigned short link; /* 0 - link down, 1 - link up */
1564 + u16 phy_data;
1565 +
1566 + struct tasklet_struct rx_tasklet;
1567 + int unloading;
1568 +
1569 + struct phy_device *phy_dev;
1570 + struct mii_bus *mii_bus;
1571 + int oldduplex;
1572 +};
1573 +
1574 +
1575 +/* Prototypes */
1576 +static int ar231x_init(struct net_device *dev);
1577 +#ifdef TX_TIMEOUT
1578 +static void ar231x_tx_timeout(struct net_device *dev);
1579 +#endif
1580 +static int ar231x_restart(struct net_device *dev);
1581 +static void ar231x_load_rx_ring(struct net_device *dev, int bufs);
1582 +static irqreturn_t ar231x_interrupt(int irq, void *dev_id);
1583 +static int ar231x_open(struct net_device *dev);
1584 +static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev);
1585 +static int ar231x_close(struct net_device *dev);
1586 +static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr,
1587 + int cmd);
1588 +static void ar231x_init_cleanup(struct net_device *dev);
1589 +static int ar231x_setup_timer(struct net_device *dev);
1590 +static void ar231x_link_timer_fn(unsigned long data);
1591 +static void ar231x_check_link(struct net_device *dev);
1592 +#endif /* _AR2313_H_ */
OpenWrt SVN history