target/linux/atheros/patches-3.18/103-ar2315_gpio.patch

   1 --- a/arch/mips/ath25/Kconfig
   2 +++ b/arch/mips/ath25/Kconfig
   3 @@ -7,4 +7,5 @@ config SOC_AR5312
   4  config SOC_AR2315
   5         bool "Atheros 2315+ support"
   6         depends on ATH25
   7 +       select GPIO_AR2315
   8         default y
   9 --- a/arch/mips/ath25/ar2315.c
  10 +++ b/arch/mips/ath25/ar2315.c
  11 @@ -236,6 +236,32 @@ static struct platform_device ar2315_wdt
  12         .num_resources = ARRAY_SIZE(ar2315_wdt_res)
  13  };
  14
  15 +static struct resource ar2315_gpio_res[] = {
  16 +       {
  17 +               .name = "ar2315-gpio",
  18 +               .flags = IORESOURCE_MEM,
  19 +               .start = AR2315_RST_BASE + AR2315_GPIO,
  20 +               .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1,
  21 +       },
  22 +       {
  23 +               .name = "ar2315-gpio",
  24 +               .flags = IORESOURCE_IRQ,
  25 +       },
  26 +       {
  27 +               .name = "ar2315-gpio-irq-base",
  28 +               .flags = IORESOURCE_IRQ,
  29 +               .start = AR231X_GPIO_IRQ_BASE,
  30 +               .end = AR231X_GPIO_IRQ_BASE,
  31 +       }
  32 +};
  33 +
  34 +static struct platform_device ar2315_gpio = {
  35 +       .id = -1,
  36 +       .name = "ar2315-gpio",
  37 +       .resource = ar2315_gpio_res,
  38 +       .num_resources = ARRAY_SIZE(ar2315_gpio_res)
  39 +};
  40 +
  41  #ifdef CONFIG_LEDS_GPIO
  42  static struct gpio_led ar2315_leds[6];
  43  static struct gpio_led_platform_data ar2315_led_data = {
  44 @@ -286,6 +312,11 @@ void __init ar2315_init_devices(void)
  45         ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE);
  46         ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;
  47
  48 +       ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
  49 +                                                     AR2315_MISC_IRQ_GPIO);
  50 +       ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
  51 +       platform_device_register(&ar2315_gpio);
  52 +
  53         ar2315_init_gpio_leds();
  54
  55         ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
  56 --- a/drivers/gpio/Kconfig
  57 +++ b/drivers/gpio/Kconfig
  58 @@ -112,6 +112,13 @@ config GPIO_MAX730X
  59
  60  comment "Memory mapped GPIO drivers:"
  61
  62 +config GPIO_AR2315
  63 +       bool "AR2315 SoC GPIO support"
  64 +       default y if SOC_AR2315
  65 +       depends on SOC_AR2315
  66 +       help
  67 +         Say yes here to enable GPIO support for Atheros AR2315+ SoCs.
  68 +
  69  config GPIO_AR5312
  70         bool "AR5312 SoC GPIO support"
  71         default y if SOC_AR5312
  72 --- a/drivers/gpio/Makefile
  73 +++ b/drivers/gpio/Makefile
  74 @@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP)               += gpio-adnp.o
  75  obj-$(CONFIG_GPIO_ADP5520)     += gpio-adp5520.o
  76  obj-$(CONFIG_GPIO_ADP5588)     += gpio-adp5588.o
  77  obj-$(CONFIG_GPIO_AMD8111)     += gpio-amd8111.o
  78 +obj-$(CONFIG_GPIO_AR2315)      += gpio-ar2315.o
  79  obj-$(CONFIG_GPIO_AR5312)      += gpio-ar5312.o
  80  obj-$(CONFIG_GPIO_ARIZONA)     += gpio-arizona.o
  81  obj-$(CONFIG_GPIO_BCM_KONA)    += gpio-bcm-kona.o
  82 --- /dev/null
  83 +++ b/drivers/gpio/gpio-ar2315.c
  84 @@ -0,0 +1,233 @@
  85 +/*
  86 + * This file is subject to the terms and conditions of the GNU General Public
  87 + * License.  See the file "COPYING" in the main directory of this archive
  88 + * for more details.
  89 + *
  90 + * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
  91 + * Copyright (C) 2006 FON Technology, SL.
  92 + * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
  93 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
  94 + * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
  95 + */
  96 +
  97 +#include <linux/kernel.h>
  98 +#include <linux/init.h>
  99 +#include <linux/platform_device.h>
 100 +#include <linux/gpio.h>
 101 +#include <linux/irq.h>
 102 +
 103 +#define DRIVER_NAME    "ar2315-gpio"
 104 +
 105 +#define AR2315_GPIO_DI                 0x0000
 106 +#define AR2315_GPIO_DO                 0x0008
 107 +#define AR2315_GPIO_DIR                        0x0010
 108 +#define AR2315_GPIO_INT                        0x0018
 109 +
 110 +#define AR2315_GPIO_DIR_M(x)           (1 << (x))      /* mask for i/o */
 111 +#define AR2315_GPIO_DIR_O(x)           (1 << (x))      /* output */
 112 +#define AR2315_GPIO_DIR_I(x)           (0)             /* input */
 113 +
 114 +#define AR2315_GPIO_INT_NUM_M          0x3F            /* mask for GPIO num */
 115 +#define AR2315_GPIO_INT_TRIG(x)                ((x) << 6)      /* interrupt trigger */
 116 +#define AR2315_GPIO_INT_TRIG_M         (0x3 << 6)      /* mask for int trig */
 117 +
 118 +#define AR2315_GPIO_INT_TRIG_OFF       0       /* Triggerring off */
 119 +#define AR2315_GPIO_INT_TRIG_LOW       1       /* Low Level Triggered */
 120 +#define AR2315_GPIO_INT_TRIG_HIGH      2       /* High Level Triggered */
 121 +#define AR2315_GPIO_INT_TRIG_EDGE      3       /* Edge Triggered */
 122 +
 123 +#define AR2315_GPIO_NUM                22
 124 +
 125 +static u32 ar2315_gpio_intmask;
 126 +static u32 ar2315_gpio_intval;
 127 +static unsigned ar2315_gpio_irq_base;
 128 +static void __iomem *ar2315_mem;
 129 +
 130 +static inline u32 ar2315_gpio_reg_read(unsigned reg)
 131 +{
 132 +       return __raw_readl(ar2315_mem + reg);
 133 +}
 134 +
 135 +static inline void ar2315_gpio_reg_write(unsigned reg, u32 val)
 136 +{
 137 +       __raw_writel(val, ar2315_mem + reg);
 138 +}
 139 +
 140 +static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
 141 +{
 142 +       ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val);
 143 +}
 144 +
 145 +static void ar2315_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 146 +{
 147 +       u32 pend;
 148 +       int bit = -1;
 149 +
 150 +       /* only do one gpio interrupt at a time */
 151 +       pend = ar2315_gpio_reg_read(AR2315_GPIO_DI);
 152 +       pend ^= ar2315_gpio_intval;
 153 +       pend &= ar2315_gpio_intmask;
 154 +
 155 +       if (pend) {
 156 +               bit = fls(pend) - 1;
 157 +               pend &= ~(1 << bit);
 158 +               ar2315_gpio_intval ^= (1 << bit);
 159 +       }
 160 +
 161 +       /* Enable interrupt with edge detection */
 162 +       if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) !=
 163 +           AR2315_GPIO_DIR_I(bit))
 164 +               return;
 165 +
 166 +       if (bit >= 0)
 167 +               generic_handle_irq(ar2315_gpio_irq_base + bit);
 168 +}
 169 +
 170 +static void ar2315_gpio_int_setup(unsigned gpio, int trig)
 171 +{
 172 +       u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT);
 173 +
 174 +       reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M);
 175 +       reg |= gpio | AR2315_GPIO_INT_TRIG(trig);
 176 +       ar2315_gpio_reg_write(AR2315_GPIO_INT, reg);
 177 +}
 178 +
 179 +static void ar2315_gpio_irq_unmask(struct irq_data *d)
 180 +{
 181 +       unsigned gpio = d->irq - ar2315_gpio_irq_base;
 182 +       u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR);
 183 +
 184 +       /* Enable interrupt with edge detection */
 185 +       if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio))
 186 +               return;
 187 +
 188 +       ar2315_gpio_intmask |= (1 << gpio);
 189 +       ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE);
 190 +}
 191 +
 192 +static void ar2315_gpio_irq_mask(struct irq_data *d)
 193 +{
 194 +       unsigned gpio = d->irq - ar2315_gpio_irq_base;
 195 +
 196 +       /* Disable interrupt */
 197 +       ar2315_gpio_intmask &= ~(1 << gpio);
 198 +       ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF);
 199 +}
 200 +
 201 +static struct irq_chip ar2315_gpio_irq_chip = {
 202 +       .name           = DRIVER_NAME,
 203 +       .irq_unmask     = ar2315_gpio_irq_unmask,
 204 +       .irq_mask       = ar2315_gpio_irq_mask,
 205 +};
 206 +
 207 +static void ar2315_gpio_irq_init(unsigned irq)
 208 +{
 209 +       unsigned i;
 210 +
 211 +       ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI);
 212 +       for (i = 0; i < AR2315_GPIO_NUM; i++) {
 213 +               unsigned _irq = ar2315_gpio_irq_base + i;
 214 +
 215 +               irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip,
 216 +                                        handle_level_irq);
 217 +       }
 218 +       irq_set_chained_handler(irq, ar2315_gpio_irq_handler);
 219 +}
 220 +
 221 +static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
 222 +{
 223 +       return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1;
 224 +}
 225 +
 226 +static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
 227 +{
 228 +       u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO);
 229 +
 230 +       reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
 231 +       ar2315_gpio_reg_write(AR2315_GPIO_DO, reg);
 232 +}
 233 +
 234 +static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
 235 +{
 236 +       ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0);
 237 +       return 0;
 238 +}
 239 +
 240 +static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
 241 +{
 242 +       ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio);
 243 +       ar2315_gpio_set_val(chip, gpio, val);
 244 +       return 0;
 245 +}
 246 +
 247 +static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 248 +{
 249 +       return ar2315_gpio_irq_base + gpio;
 250 +}
 251 +
 252 +static struct gpio_chip ar2315_gpio_chip = {
 253 +       .label                  = DRIVER_NAME,
 254 +       .direction_input        = ar2315_gpio_dir_in,
 255 +       .direction_output       = ar2315_gpio_dir_out,
 256 +       .set                    = ar2315_gpio_set_val,
 257 +       .get                    = ar2315_gpio_get_val,
 258 +       .to_irq                 = ar2315_gpio_to_irq,
 259 +       .base                   = 0,
 260 +       .ngpio                  = AR2315_GPIO_NUM,
 261 +};
 262 +
 263 +static int ar2315_gpio_probe(struct platform_device *pdev)
 264 +{
 265 +       struct device *dev = &pdev->dev;
 266 +       struct resource *res;
 267 +       unsigned irq;
 268 +       int ret;
 269 +
 270 +       if (ar2315_mem)
 271 +               return -EBUSY;
 272 +
 273 +       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 274 +                                          "ar2315-gpio-irq-base");
 275 +       if (!res) {
 276 +               dev_err(dev, "not found GPIO IRQ base\n");
 277 +               return -ENXIO;
 278 +       }
 279 +       ar2315_gpio_irq_base = res->start;
 280 +
 281 +       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME);
 282 +       if (!res) {
 283 +               dev_err(dev, "not found IRQ number\n");
 284 +               return -ENXIO;
 285 +       }
 286 +       irq = res->start;
 287 +
 288 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME);
 289 +       ar2315_mem = devm_ioremap_resource(dev, res);
 290 +       if (IS_ERR(ar2315_mem))
 291 +               return PTR_ERR(ar2315_mem);
 292 +
 293 +       ar2315_gpio_chip.dev = dev;
 294 +       ret = gpiochip_add(&ar2315_gpio_chip);
 295 +       if (ret) {
 296 +               dev_err(dev, "failed to add gpiochip\n");
 297 +               return ret;
 298 +       }
 299 +
 300 +       ar2315_gpio_irq_init(irq);
 301 +
 302 +       return 0;
 303 +}
 304 +
 305 +static struct platform_driver ar2315_gpio_driver = {
 306 +       .probe = ar2315_gpio_probe,
 307 +       .driver = {
 308 +               .name = DRIVER_NAME,
 309 +               .owner = THIS_MODULE,
 310 +       }
 311 +};
 312 +
 313 +static int __init ar2315_gpio_init(void)
 314 +{
 315 +       return platform_driver_register(&ar2315_gpio_driver);
 316 +}
 317 +subsys_initcall(ar2315_gpio_init);