target/linux/bcm53xx/patches-3.10/0010-bcma-add-some-more-core-names.patch

   1 From 6fe4f63b017c3c0a7caa73d01fab23874ca0ed97 Mon Sep 17 00:00:00 2001
   2 From: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date: Thu, 4 Jul 2013 22:29:48 +0200
   4 Subject: [PATCH 10/17] bcma: add some more core names
   5
   6 These cores were found on a BCM4708 (chipid 53010), this is a ARM SoC
   7 with two Cortex A9 cores.
   8
   9 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  10 ---
  11  drivers/bcma/scan.c       |   12 ++++++++++++
  12  include/linux/bcma/bcma.h |   12 ++++++++++++
  13  2 files changed, 24 insertions(+)
  14
  15 --- a/drivers/bcma/scan.c
  16 +++ b/drivers/bcma/scan.c
  17 @@ -32,6 +32,18 @@ static const struct bcma_device_id_name
  18         { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
  19         { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
  20         { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
  21 +       { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
  22 +       { BCMA_CORE_DMA, "DMA" },
  23 +       { BCMA_CORE_SDIO3, "SDIO3" },
  24 +       { BCMA_CORE_USB20, "USB 2.0" },
  25 +       { BCMA_CORE_USB30, "USB 3.0" },
  26 +       { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
  27 +       { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
  28 +       { BCMA_CORE_ROM, "ROM" },
  29 +       { BCMA_CORE_NAND, "NAND flash controller" },
  30 +       { BCMA_CORE_QSPI, "SPI flash controller" },
  31 +       { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
  32 +       { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
  33         { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
  34         { BCMA_CORE_ALTA, "ALTA (I2S)" },
  35         { BCMA_CORE_INVALID, "Invalid" },
  36 --- a/include/linux/bcma/bcma.h
  37 +++ b/include/linux/bcma/bcma.h
  38 @@ -72,7 +72,19 @@ struct bcma_host_ops {
  39  /* Core-ID values. */
  40  #define BCMA_CORE_OOB_ROUTER           0x367   /* Out of band */
  41  #define BCMA_CORE_4706_CHIPCOMMON      0x500
  42 +#define BCMA_CORE_PCIEG2               0x501
  43 +#define BCMA_CORE_DMA                  0x502
  44 +#define BCMA_CORE_SDIO3                        0x503
  45 +#define BCMA_CORE_USB20                        0x504
  46 +#define BCMA_CORE_USB30                        0x505
  47 +#define BCMA_CORE_A9JTAG               0x506
  48 +#define BCMA_CORE_DDR23                        0x507
  49 +#define BCMA_CORE_ROM                  0x508
  50 +#define BCMA_CORE_NAND                 0x509
  51 +#define BCMA_CORE_QSPI                 0x50A
  52 +#define BCMA_CORE_CHIPCOMMON_B         0x50B           /* ChipcommonB core */
  53  #define BCMA_CORE_4706_SOC_RAM         0x50E
  54 +#define BCMA_CORE_ARMCA9               0x510
  55  #define BCMA_CORE_4706_MAC_GBIT                0x52D
  56  #define BCMA_CORE_AMEMC                        0x52E   /* DDR1/2 memory controller core */
  57  #define BCMA_CORE_ALTA                 0x534   /* I2S core */