bcm53xx: add support for the PCIe controller
[openwrt/svn-archive/archive.git] / target / linux / bcm53xx / patches-3.14 / 112-bcm53xx-sprom-add-sprom-driver.patch
1 From b113f9d3e140f18e63cbf3408b3dcde372242dc8 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 4 May 2014 13:19:20 +0200
4 Subject: [PATCH 04/15] bcm53xx-sprom: add sprom driver
5
6 This driver needs an nvram driver and fetches the sprom values from the
7 sprom and provides it to any other driver. The calibration data for the
8 wifi chip the mac address and some more board description data is
9 stores in the sprom.
10
11 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
12 ---
13 drivers/misc/Kconfig | 5 +
14 drivers/misc/Makefile | 1 +
15 drivers/misc/bcm53xx-sprom.c | 625 +++++++++++++++++++++++++++++++++++++++++++
16 3 files changed, 631 insertions(+)
17 create mode 100644 drivers/misc/bcm53xx-sprom.c
18
19 --- a/drivers/misc/Kconfig
20 +++ b/drivers/misc/Kconfig
21 @@ -520,6 +520,11 @@ config BCM47XX_NVRAM
22 help
23 This adds support for the brcm47xx nvram driver.
24
25 +config BCM53XX_SPROM
26 + tristate "BCM53XX sprom driver"
27 + help
28 + This adds support for the brcm53xx sprom driver.
29 +
30 source "drivers/misc/c2port/Kconfig"
31 source "drivers/misc/eeprom/Kconfig"
32 source "drivers/misc/cb710/Kconfig"
33 --- a/drivers/misc/Makefile
34 +++ b/drivers/misc/Makefile
35 @@ -55,3 +55,4 @@ obj-$(CONFIG_SRAM) += sram.o
36 obj-y += mic/
37 obj-$(CONFIG_GENWQE) += genwqe/
38 obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx-nvram.o
39 +obj-$(CONFIG_BCM53XX_SPROM) += bcm53xx-sprom.o
40 --- /dev/null
41 +++ b/drivers/misc/bcm53xx-sprom.c
42 @@ -0,0 +1,625 @@
43 +/*
44 + * BCM947xx nvram variable access
45 + *
46 + * Copyright (C) 2005 Broadcom Corporation
47 + * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
48 + * Copyright (C) 2006 Michael Buesch <m@bues.ch>
49 + * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
50 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
51 + * Copyright (C) 2010-2014 Hauke Mehrtens <hauke@hauke-m.de>
52 + *
53 + * This program is free software; you can redistribute it and/or modify it
54 + * under the terms of the GNU General Public License as published by the
55 + * Free Software Foundation; either version 2 of the License, or (at your
56 + * option) any later version.
57 + */
58 +
59 +#include <linux/types.h>
60 +#include <linux/module.h>
61 +#include <linux/kernel.h>
62 +#include <linux/string.h>
63 +#include <linux/of_address.h>
64 +#include <linux/device.h>
65 +#include <linux/platform_device.h>
66 +#include <linux/of_platform.h>
67 +#include <linux/io.h>
68 +#include <linux/ssb/ssb.h>
69 +#include <linux/bcm47xx_nvram.h>
70 +
71 +struct bcm53xx_sprom_fill {
72 + const char *prefix;
73 + bool fallback;
74 + int (*getenv)(const struct bcm53xx_sprom_fill *fill, const char *name, char *val, size_t val_len);
75 + const void *priv;
76 +};
77 +
78 +static void create_key(const char *prefix, const char *postfix,
79 + const char *name, char *buf, int len)
80 +{
81 + if (prefix && postfix)
82 + snprintf(buf, len, "%s%s%s", prefix, name, postfix);
83 + else if (prefix)
84 + snprintf(buf, len, "%s%s", prefix, name);
85 + else if (postfix)
86 + snprintf(buf, len, "%s%s", name, postfix);
87 + else
88 + snprintf(buf, len, "%s", name);
89 +}
90 +
91 +static int get_nvram_var(const struct bcm53xx_sprom_fill *fill, const char *postfix,
92 + const char *name, char *buf, int len)
93 +{
94 + char key[40];
95 + int err;
96 +
97 + create_key(fill->prefix, postfix, name, key, sizeof(key));
98 +
99 + err = fill->getenv(fill, key, buf, len);
100 + if (fill->fallback && err == -ENOENT && fill->prefix) {
101 + create_key(NULL, postfix, name, key, sizeof(key));
102 + err = fill->getenv(fill, key, buf, len);
103 + }
104 + return err;
105 +}
106 +
107 +#define NVRAM_READ_VAL(type) \
108 +static void nvram_read_ ## type (const struct bcm53xx_sprom_fill *fill, \
109 + const char *postfix, const char *name, \
110 + type *val, type allset) \
111 +{ \
112 + char buf[100]; \
113 + int err; \
114 + type var; \
115 + \
116 + err = get_nvram_var(fill, postfix, name, buf, sizeof(buf)); \
117 + if (err < 0) \
118 + return; \
119 + err = kstrto ## type(strim(buf), 0, &var); \
120 + if (err) { \
121 + pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
122 + fill->prefix, name, postfix, buf, err); \
123 + return; \
124 + } \
125 + if (allset && var == allset) \
126 + return; \
127 + *val = var; \
128 +}
129 +
130 +NVRAM_READ_VAL(u8)
131 +NVRAM_READ_VAL(s8)
132 +NVRAM_READ_VAL(u16)
133 +NVRAM_READ_VAL(u32)
134 +
135 +#undef NVRAM_READ_VAL
136 +
137 +static void nvram_read_u32_2(const struct bcm53xx_sprom_fill *fill, const char *name,
138 + u16 *val_lo, u16 *val_hi)
139 +{
140 + char buf[100];
141 + int err;
142 + u32 val;
143 +
144 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
145 + if (err < 0)
146 + return;
147 + err = kstrtou32(strim(buf), 0, &val);
148 + if (err) {
149 + pr_warn("can not parse nvram name %s%s with value %s got %i\n",
150 + fill->prefix, name, buf, err);
151 + return;
152 + }
153 + *val_lo = (val & 0x0000FFFFU);
154 + *val_hi = (val & 0xFFFF0000U) >> 16;
155 +}
156 +
157 +static void nvram_read_leddc(const struct bcm53xx_sprom_fill *fill, const char *name,
158 + u8 *leddc_on_time, u8 *leddc_off_time)
159 +{
160 + char buf[100];
161 + int err;
162 + u32 val;
163 +
164 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
165 + if (err < 0)
166 + return;
167 + err = kstrtou32(strim(buf), 0, &val);
168 + if (err) {
169 + pr_warn("can not parse nvram name %s%s with value %s got %i\n",
170 + fill->prefix, name, buf, err);
171 + return;
172 + }
173 +
174 + if (val == 0xffff || val == 0xffffffff)
175 + return;
176 +
177 + *leddc_on_time = val & 0xff;
178 + *leddc_off_time = (val >> 16) & 0xff;
179 +}
180 +
181 +static void nvram_read_macaddr(const struct bcm53xx_sprom_fill *fill, const char *name,
182 + u8 val[6])
183 +{
184 + char buf[100];
185 + int err;
186 +
187 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
188 + if (err < 0)
189 + return;
190 +
191 + bcm47xx_nvram_parse_macaddr(buf, val);
192 +}
193 +
194 +static void nvram_read_alpha2(const struct bcm53xx_sprom_fill *fill, const char *name,
195 + char val[2])
196 +{
197 + char buf[10];
198 + int err;
199 +
200 + err = get_nvram_var(fill, NULL, name, buf, sizeof(buf));
201 + if (err < 0)
202 + return;
203 + if (buf[0] == '0')
204 + return;
205 + if (strlen(buf) > 2) {
206 + pr_warn("alpha2 is too long %s\n", buf);
207 + return;
208 + }
209 + memcpy(val, buf, 2);
210 +}
211 +
212 +static void bcm53xx_sprom_fill_r1234589(struct ssb_sprom *sprom,
213 + const struct bcm53xx_sprom_fill *fill)
214 +{
215 + nvram_read_u8(fill, NULL, "ledbh0", &sprom->gpio0, 0xff);
216 + nvram_read_u8(fill, NULL, "ledbh1", &sprom->gpio1, 0xff);
217 + nvram_read_u8(fill, NULL, "ledbh2", &sprom->gpio2, 0xff);
218 + nvram_read_u8(fill, NULL, "ledbh3", &sprom->gpio3, 0xff);
219 + nvram_read_u8(fill, NULL, "aa2g", &sprom->ant_available_bg, 0);
220 + nvram_read_u8(fill, NULL, "aa5g", &sprom->ant_available_a, 0);
221 + nvram_read_s8(fill, NULL, "ag0", &sprom->antenna_gain.a0, 0);
222 + nvram_read_s8(fill, NULL, "ag1", &sprom->antenna_gain.a1, 0);
223 + nvram_read_alpha2(fill, "ccode", sprom->alpha2);
224 +}
225 +
226 +static void bcm53xx_sprom_fill_r12389(struct ssb_sprom *sprom,
227 + const struct bcm53xx_sprom_fill *fill)
228 +{
229 + nvram_read_u16(fill, NULL, "pa0b0", &sprom->pa0b0, 0);
230 + nvram_read_u16(fill, NULL, "pa0b1", &sprom->pa0b1, 0);
231 + nvram_read_u16(fill, NULL, "pa0b2", &sprom->pa0b2, 0);
232 + nvram_read_u8(fill, NULL, "pa0itssit", &sprom->itssi_bg, 0);
233 + nvram_read_u8(fill, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
234 + nvram_read_u16(fill, NULL, "pa1b0", &sprom->pa1b0, 0);
235 + nvram_read_u16(fill, NULL, "pa1b1", &sprom->pa1b1, 0);
236 + nvram_read_u16(fill, NULL, "pa1b2", &sprom->pa1b2, 0);
237 + nvram_read_u8(fill, NULL, "pa1itssit", &sprom->itssi_a, 0);
238 + nvram_read_u8(fill, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
239 +}
240 +
241 +static void bcm53xx_sprom_fill_r1(struct ssb_sprom *sprom,
242 + const struct bcm53xx_sprom_fill *fill)
243 +{
244 + nvram_read_u16(fill, NULL, "boardflags", &sprom->boardflags_lo, 0);
245 + nvram_read_u8(fill, NULL, "cc", &sprom->country_code, 0);
246 +}
247 +
248 +static void bcm53xx_sprom_fill_r2389(struct ssb_sprom *sprom,
249 + const struct bcm53xx_sprom_fill *fill)
250 +{
251 + nvram_read_u8(fill, NULL, "opo", &sprom->opo, 0);
252 + nvram_read_u16(fill, NULL, "pa1lob0", &sprom->pa1lob0, 0);
253 + nvram_read_u16(fill, NULL, "pa1lob1", &sprom->pa1lob1, 0);
254 + nvram_read_u16(fill, NULL, "pa1lob2", &sprom->pa1lob2, 0);
255 + nvram_read_u16(fill, NULL, "pa1hib0", &sprom->pa1hib0, 0);
256 + nvram_read_u16(fill, NULL, "pa1hib1", &sprom->pa1hib1, 0);
257 + nvram_read_u16(fill, NULL, "pa1hib2", &sprom->pa1hib2, 0);
258 + nvram_read_u8(fill, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
259 + nvram_read_u8(fill, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
260 +}
261 +
262 +static void bcm53xx_sprom_fill_r389(struct ssb_sprom *sprom,
263 + const struct bcm53xx_sprom_fill *fill)
264 +{
265 + nvram_read_u8(fill, NULL, "bxa2g", &sprom->bxa2g, 0);
266 + nvram_read_u8(fill, NULL, "rssisav2g", &sprom->rssisav2g, 0);
267 + nvram_read_u8(fill, NULL, "rssismc2g", &sprom->rssismc2g, 0);
268 + nvram_read_u8(fill, NULL, "rssismf2g", &sprom->rssismf2g, 0);
269 + nvram_read_u8(fill, NULL, "bxa5g", &sprom->bxa5g, 0);
270 + nvram_read_u8(fill, NULL, "rssisav5g", &sprom->rssisav5g, 0);
271 + nvram_read_u8(fill, NULL, "rssismc5g", &sprom->rssismc5g, 0);
272 + nvram_read_u8(fill, NULL, "rssismf5g", &sprom->rssismf5g, 0);
273 + nvram_read_u8(fill, NULL, "tri2g", &sprom->tri2g, 0);
274 + nvram_read_u8(fill, NULL, "tri5g", &sprom->tri5g, 0);
275 + nvram_read_u8(fill, NULL, "tri5gl", &sprom->tri5gl, 0);
276 + nvram_read_u8(fill, NULL, "tri5gh", &sprom->tri5gh, 0);
277 + nvram_read_s8(fill, NULL, "rxpo2g", &sprom->rxpo2g, 0);
278 + nvram_read_s8(fill, NULL, "rxpo5g", &sprom->rxpo5g, 0);
279 +}
280 +
281 +static void bcm53xx_sprom_fill_r3(struct ssb_sprom *sprom,
282 + const struct bcm53xx_sprom_fill *fill)
283 +{
284 + nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
285 + nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
286 + &sprom->leddc_off_time);
287 +}
288 +
289 +static void bcm53xx_sprom_fill_r4589(struct ssb_sprom *sprom,
290 + const struct bcm53xx_sprom_fill *fill)
291 +{
292 + nvram_read_u8(fill, NULL, "regrev", &sprom->regrev, 0);
293 + nvram_read_s8(fill, NULL, "ag2", &sprom->antenna_gain.a2, 0);
294 + nvram_read_s8(fill, NULL, "ag3", &sprom->antenna_gain.a3, 0);
295 + nvram_read_u8(fill, NULL, "txchain", &sprom->txchain, 0xf);
296 + nvram_read_u8(fill, NULL, "rxchain", &sprom->rxchain, 0xf);
297 + nvram_read_u8(fill, NULL, "antswitch", &sprom->antswitch, 0xff);
298 + nvram_read_leddc(fill, "leddc", &sprom->leddc_on_time,
299 + &sprom->leddc_off_time);
300 +}
301 +
302 +static void bcm53xx_sprom_fill_r458(struct ssb_sprom *sprom,
303 + const struct bcm53xx_sprom_fill *fill)
304 +{
305 + nvram_read_u16(fill, NULL, "cck2gpo", &sprom->cck2gpo, 0);
306 + nvram_read_u32(fill, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
307 + nvram_read_u32(fill, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
308 + nvram_read_u32(fill, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
309 + nvram_read_u32(fill, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
310 + nvram_read_u16(fill, NULL, "cddpo", &sprom->cddpo, 0);
311 + nvram_read_u16(fill, NULL, "stbcpo", &sprom->stbcpo, 0);
312 + nvram_read_u16(fill, NULL, "bw40po", &sprom->bw40po, 0);
313 + nvram_read_u16(fill, NULL, "bwduppo", &sprom->bwduppo, 0);
314 + nvram_read_u16(fill, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
315 + nvram_read_u16(fill, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
316 + nvram_read_u16(fill, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
317 + nvram_read_u16(fill, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
318 + nvram_read_u16(fill, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
319 + nvram_read_u16(fill, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
320 + nvram_read_u16(fill, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
321 + nvram_read_u16(fill, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
322 + nvram_read_u16(fill, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
323 + nvram_read_u16(fill, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
324 + nvram_read_u16(fill, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
325 + nvram_read_u16(fill, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
326 + nvram_read_u16(fill, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
327 + nvram_read_u16(fill, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
328 + nvram_read_u16(fill, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
329 + nvram_read_u16(fill, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
330 + nvram_read_u16(fill, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
331 + nvram_read_u16(fill, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
332 + nvram_read_u16(fill, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
333 + nvram_read_u16(fill, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
334 + nvram_read_u16(fill, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
335 + nvram_read_u16(fill, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
336 + nvram_read_u16(fill, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
337 + nvram_read_u16(fill, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
338 + nvram_read_u16(fill, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
339 + nvram_read_u16(fill, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
340 + nvram_read_u16(fill, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
341 + nvram_read_u16(fill, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
342 + nvram_read_u16(fill, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
343 + nvram_read_u16(fill, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
344 + nvram_read_u16(fill, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
345 + nvram_read_u16(fill, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
346 +}
347 +
348 +static void bcm53xx_sprom_fill_r45(struct ssb_sprom *sprom,
349 + const struct bcm53xx_sprom_fill *fill)
350 +{
351 + nvram_read_u8(fill, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
352 + nvram_read_u8(fill, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
353 + nvram_read_u8(fill, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
354 + nvram_read_u8(fill, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
355 + nvram_read_u8(fill, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
356 + nvram_read_u8(fill, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
357 + nvram_read_u8(fill, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
358 + nvram_read_u8(fill, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
359 + nvram_read_u8(fill, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
360 + nvram_read_u8(fill, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
361 + nvram_read_u8(fill, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
362 + nvram_read_u8(fill, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
363 + nvram_read_u8(fill, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
364 + nvram_read_u8(fill, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
365 + nvram_read_u8(fill, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
366 + nvram_read_u8(fill, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
367 +}
368 +
369 +static void bcm53xx_sprom_fill_r89(struct ssb_sprom *sprom,
370 + const struct bcm53xx_sprom_fill *fill)
371 +{
372 + nvram_read_u8(fill, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
373 + nvram_read_u8(fill, NULL, "extpagain2g", &sprom->fem.ghz2.extpa_gain, 0);
374 + nvram_read_u8(fill, NULL, "pdetrange2g", &sprom->fem.ghz2.pdet_range, 0);
375 + nvram_read_u8(fill, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
376 + nvram_read_u8(fill, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
377 + nvram_read_u8(fill, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
378 + nvram_read_u8(fill, NULL, "extpagain5g", &sprom->fem.ghz5.extpa_gain, 0);
379 + nvram_read_u8(fill, NULL, "pdetrange5g", &sprom->fem.ghz5.pdet_range, 0);
380 + nvram_read_u8(fill, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
381 + nvram_read_u8(fill, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
382 + nvram_read_u8(fill, NULL, "tempthresh", &sprom->tempthresh, 0);
383 + nvram_read_u8(fill, NULL, "tempoffset", &sprom->tempoffset, 0);
384 + nvram_read_u16(fill, NULL, "rawtempsense", &sprom->rawtempsense, 0);
385 + nvram_read_u8(fill, NULL, "measpower", &sprom->measpower, 0);
386 + nvram_read_u8(fill, NULL, "tempsense_slope", &sprom->tempsense_slope, 0);
387 + nvram_read_u8(fill, NULL, "tempcorrx", &sprom->tempcorrx, 0);
388 + nvram_read_u8(fill, NULL, "tempsense_option", &sprom->tempsense_option, 0);
389 + nvram_read_u8(fill, NULL, "freqoffset_corr", &sprom->freqoffset_corr, 0);
390 + nvram_read_u8(fill, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
391 + nvram_read_u8(fill, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
392 + nvram_read_u8(fill, NULL, "elna2g", &sprom->elna2g, 0);
393 + nvram_read_u8(fill, NULL, "elna5g", &sprom->elna5g, 0);
394 + nvram_read_u8(fill, NULL, "phycal_tempdelta", &sprom->phycal_tempdelta, 0);
395 + nvram_read_u8(fill, NULL, "temps_period", &sprom->temps_period, 0);
396 + nvram_read_u8(fill, NULL, "temps_hysteresis", &sprom->temps_hysteresis, 0);
397 + nvram_read_u8(fill, NULL, "measpower1", &sprom->measpower1, 0);
398 + nvram_read_u8(fill, NULL, "measpower2", &sprom->measpower2, 0);
399 + nvram_read_u8(fill, NULL, "rxgainerr2ga0", &sprom->rxgainerr2ga[0], 0);
400 + nvram_read_u8(fill, NULL, "rxgainerr2ga1", &sprom->rxgainerr2ga[1], 0);
401 + nvram_read_u8(fill, NULL, "rxgainerr2ga2", &sprom->rxgainerr2ga[2], 0);
402 + nvram_read_u8(fill, NULL, "rxgainerr5gla0", &sprom->rxgainerr5gla[0], 0);
403 + nvram_read_u8(fill, NULL, "rxgainerr5gla1", &sprom->rxgainerr5gla[1], 0);
404 + nvram_read_u8(fill, NULL, "rxgainerr5gla2", &sprom->rxgainerr5gla[2], 0);
405 + nvram_read_u8(fill, NULL, "rxgainerr5gma0", &sprom->rxgainerr5gma[0], 0);
406 + nvram_read_u8(fill, NULL, "rxgainerr5gma1", &sprom->rxgainerr5gma[1], 0);
407 + nvram_read_u8(fill, NULL, "rxgainerr5gma2", &sprom->rxgainerr5gma[2], 0);
408 + nvram_read_u8(fill, NULL, "rxgainerr5gha0", &sprom->rxgainerr5gha[0], 0);
409 + nvram_read_u8(fill, NULL, "rxgainerr5gha1", &sprom->rxgainerr5gha[1], 0);
410 + nvram_read_u8(fill, NULL, "rxgainerr5gha2", &sprom->rxgainerr5gha[2], 0);
411 + nvram_read_u8(fill, NULL, "rxgainerr5gua0", &sprom->rxgainerr5gua[0], 0);
412 + nvram_read_u8(fill, NULL, "rxgainerr5gua1", &sprom->rxgainerr5gua[1], 0);
413 + nvram_read_u8(fill, NULL, "rxgainerr5gua2", &sprom->rxgainerr5gua[2], 0);
414 + nvram_read_u8(fill, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
415 + nvram_read_u8(fill, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
416 + nvram_read_u8(fill, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
417 + nvram_read_u8(fill, NULL, "noiselvl5gla0", &sprom->noiselvl5gla[0], 0);
418 + nvram_read_u8(fill, NULL, "noiselvl5gla1", &sprom->noiselvl5gla[1], 0);
419 + nvram_read_u8(fill, NULL, "noiselvl5gla2", &sprom->noiselvl5gla[2], 0);
420 + nvram_read_u8(fill, NULL, "noiselvl5gma0", &sprom->noiselvl5gma[0], 0);
421 + nvram_read_u8(fill, NULL, "noiselvl5gma1", &sprom->noiselvl5gma[1], 0);
422 + nvram_read_u8(fill, NULL, "noiselvl5gma2", &sprom->noiselvl5gma[2], 0);
423 + nvram_read_u8(fill, NULL, "noiselvl5gha0", &sprom->noiselvl5gha[0], 0);
424 + nvram_read_u8(fill, NULL, "noiselvl5gha1", &sprom->noiselvl5gha[1], 0);
425 + nvram_read_u8(fill, NULL, "noiselvl5gha2", &sprom->noiselvl5gha[2], 0);
426 + nvram_read_u8(fill, NULL, "noiselvl5gua0", &sprom->noiselvl5gua[0], 0);
427 + nvram_read_u8(fill, NULL, "noiselvl5gua1", &sprom->noiselvl5gua[1], 0);
428 + nvram_read_u8(fill, NULL, "noiselvl5gua2", &sprom->noiselvl5gua[2], 0);
429 + nvram_read_u8(fill, NULL, "pcieingress_war", &sprom->pcieingress_war, 0);
430 +}
431 +
432 +static void bcm53xx_sprom_fill_r9(struct ssb_sprom *sprom,
433 + const struct bcm53xx_sprom_fill *fill)
434 +{
435 + nvram_read_u16(fill, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
436 + nvram_read_u16(fill, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
437 + nvram_read_u32(fill, NULL, "legofdmbw202gpo", &sprom->legofdmbw202gpo, 0);
438 + nvram_read_u32(fill, NULL, "legofdmbw20ul2gpo", &sprom->legofdmbw20ul2gpo, 0);
439 + nvram_read_u32(fill, NULL, "legofdmbw205glpo", &sprom->legofdmbw205glpo, 0);
440 + nvram_read_u32(fill, NULL, "legofdmbw20ul5glpo", &sprom->legofdmbw20ul5glpo, 0);
441 + nvram_read_u32(fill, NULL, "legofdmbw205gmpo", &sprom->legofdmbw205gmpo, 0);
442 + nvram_read_u32(fill, NULL, "legofdmbw20ul5gmpo", &sprom->legofdmbw20ul5gmpo, 0);
443 + nvram_read_u32(fill, NULL, "legofdmbw205ghpo", &sprom->legofdmbw205ghpo, 0);
444 + nvram_read_u32(fill, NULL, "legofdmbw20ul5ghpo", &sprom->legofdmbw20ul5ghpo, 0);
445 + nvram_read_u32(fill, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
446 + nvram_read_u32(fill, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
447 + nvram_read_u32(fill, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
448 + nvram_read_u32(fill, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
449 + nvram_read_u32(fill, NULL, "mcsbw20ul5glpo", &sprom->mcsbw20ul5glpo, 0);
450 + nvram_read_u32(fill, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
451 + nvram_read_u32(fill, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
452 + nvram_read_u32(fill, NULL, "mcsbw20ul5gmpo", &sprom->mcsbw20ul5gmpo, 0);
453 + nvram_read_u32(fill, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
454 + nvram_read_u32(fill, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
455 + nvram_read_u32(fill, NULL, "mcsbw20ul5ghpo", &sprom->mcsbw20ul5ghpo, 0);
456 + nvram_read_u32(fill, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
457 + nvram_read_u16(fill, NULL, "mcs32po", &sprom->mcs32po, 0);
458 + nvram_read_u16(fill, NULL, "legofdm40duppo", &sprom->legofdm40duppo, 0);
459 + nvram_read_u8(fill, NULL, "sar2g", &sprom->sar2g, 0);
460 + nvram_read_u8(fill, NULL, "sar5g", &sprom->sar5g, 0);
461 +}
462 +
463 +static void bcm53xx_sprom_fill_path_r4589(struct ssb_sprom *sprom,
464 + const struct bcm53xx_sprom_fill *fill)
465 +{
466 + char postfix[2];
467 + int i;
468 +
469 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
470 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
471 + snprintf(postfix, sizeof(postfix), "%i", i);
472 + nvram_read_u8(fill, postfix, "maxp2ga", &pwr_info->maxpwr_2g, 0);
473 + nvram_read_u8(fill, postfix, "itt2ga", &pwr_info->itssi_2g, 0);
474 + nvram_read_u8(fill, postfix, "itt5ga", &pwr_info->itssi_5g, 0);
475 + nvram_read_u16(fill, postfix, "pa2gw0a", &pwr_info->pa_2g[0], 0);
476 + nvram_read_u16(fill, postfix, "pa2gw1a", &pwr_info->pa_2g[1], 0);
477 + nvram_read_u16(fill, postfix, "pa2gw2a", &pwr_info->pa_2g[2], 0);
478 + nvram_read_u8(fill, postfix, "maxp5ga", &pwr_info->maxpwr_5g, 0);
479 + nvram_read_u8(fill, postfix, "maxp5gha", &pwr_info->maxpwr_5gh, 0);
480 + nvram_read_u8(fill, postfix, "maxp5gla", &pwr_info->maxpwr_5gl, 0);
481 + nvram_read_u16(fill, postfix, "pa5gw0a", &pwr_info->pa_5g[0], 0);
482 + nvram_read_u16(fill, postfix, "pa5gw1a", &pwr_info->pa_5g[1], 0);
483 + nvram_read_u16(fill, postfix, "pa5gw2a", &pwr_info->pa_5g[2], 0);
484 + nvram_read_u16(fill, postfix, "pa5glw0a", &pwr_info->pa_5gl[0], 0);
485 + nvram_read_u16(fill, postfix, "pa5glw1a", &pwr_info->pa_5gl[1], 0);
486 + nvram_read_u16(fill, postfix, "pa5glw2a", &pwr_info->pa_5gl[2], 0);
487 + nvram_read_u16(fill, postfix, "pa5ghw0a", &pwr_info->pa_5gh[0], 0);
488 + nvram_read_u16(fill, postfix, "pa5ghw1a", &pwr_info->pa_5gh[1], 0);
489 + nvram_read_u16(fill, postfix, "pa5ghw2a", &pwr_info->pa_5gh[2], 0);
490 + }
491 +}
492 +
493 +static void bcm53xx_sprom_fill_path_r45(struct ssb_sprom *sprom,
494 + const struct bcm53xx_sprom_fill *fill)
495 +{
496 + char postfix[2];
497 + int i;
498 +
499 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
500 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
501 + snprintf(postfix, sizeof(postfix), "%i", i);
502 + nvram_read_u16(fill, postfix, "pa2gw3a", &pwr_info->pa_2g[3], 0);
503 + nvram_read_u16(fill, postfix, "pa5gw3a", &pwr_info->pa_5g[3], 0);
504 + nvram_read_u16(fill, postfix, "pa5glw3a", &pwr_info->pa_5gl[3], 0);
505 + nvram_read_u16(fill, postfix, "pa5ghw3a", &pwr_info->pa_5gh[3], 0);
506 + }
507 +}
508 +
509 +static void bcm53xx_sprom_fill_ethernet(struct ssb_sprom *sprom,
510 + const struct bcm53xx_sprom_fill *fill)
511 +{
512 + nvram_read_macaddr(fill, "et0macaddr", sprom->et0mac);
513 + nvram_read_u8(fill, NULL, "et0mdcport", &sprom->et0mdcport, 0);
514 + nvram_read_u8(fill, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
515 +
516 + nvram_read_macaddr(fill, "et1macaddr", sprom->et1mac);
517 + nvram_read_u8(fill, NULL, "et1mdcport", &sprom->et1mdcport, 0);
518 + nvram_read_u8(fill, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
519 +
520 + nvram_read_macaddr(fill, "macaddr", sprom->il0mac);
521 + nvram_read_macaddr(fill, "il0macaddr", sprom->il0mac);
522 +}
523 +
524 +static void bcm53xx_sprom_fill_board_data(struct ssb_sprom *sprom,
525 + const struct bcm53xx_sprom_fill *fill)
526 +{
527 + nvram_read_u16(fill, NULL, "boardrev", &sprom->board_rev, 0);
528 + nvram_read_u16(fill, NULL, "boardnum", &sprom->board_num, 0);
529 + nvram_read_u16(fill, NULL, "boardtype", &sprom->board_type, 0);
530 + nvram_read_u32_2(fill, "boardflags", &sprom->boardflags_lo,
531 + &sprom->boardflags_hi);
532 + nvram_read_u32_2(fill, "boardflags2", &sprom->boardflags2_lo,
533 + &sprom->boardflags2_hi);
534 +}
535 +
536 +static void bcm53xx_sprom_fill(struct ssb_sprom *sprom,
537 + const struct bcm53xx_sprom_fill *fill)
538 +{
539 + bcm53xx_sprom_fill_ethernet(sprom, fill);
540 + bcm53xx_sprom_fill_board_data(sprom, fill);
541 +
542 + nvram_read_u8(fill, NULL, "sromrev", &sprom->revision, 0);
543 +
544 + switch (sprom->revision) {
545 + case 1:
546 + bcm53xx_sprom_fill_r1234589(sprom, fill);
547 + bcm53xx_sprom_fill_r12389(sprom, fill);
548 + bcm53xx_sprom_fill_r1(sprom, fill);
549 + break;
550 + case 2:
551 + bcm53xx_sprom_fill_r1234589(sprom, fill);
552 + bcm53xx_sprom_fill_r12389(sprom, fill);
553 + bcm53xx_sprom_fill_r2389(sprom, fill);
554 + break;
555 + case 3:
556 + bcm53xx_sprom_fill_r1234589(sprom, fill);
557 + bcm53xx_sprom_fill_r12389(sprom, fill);
558 + bcm53xx_sprom_fill_r2389(sprom, fill);
559 + bcm53xx_sprom_fill_r389(sprom, fill);
560 + bcm53xx_sprom_fill_r3(sprom, fill);
561 + break;
562 + case 4:
563 + case 5:
564 + bcm53xx_sprom_fill_r1234589(sprom, fill);
565 + bcm53xx_sprom_fill_r4589(sprom, fill);
566 + bcm53xx_sprom_fill_r458(sprom, fill);
567 + bcm53xx_sprom_fill_r45(sprom, fill);
568 + bcm53xx_sprom_fill_path_r4589(sprom, fill);
569 + bcm53xx_sprom_fill_path_r45(sprom, fill);
570 + break;
571 + case 8:
572 + bcm53xx_sprom_fill_r1234589(sprom, fill);
573 + bcm53xx_sprom_fill_r12389(sprom, fill);
574 + bcm53xx_sprom_fill_r2389(sprom, fill);
575 + bcm53xx_sprom_fill_r389(sprom, fill);
576 + bcm53xx_sprom_fill_r4589(sprom, fill);
577 + bcm53xx_sprom_fill_r458(sprom, fill);
578 + bcm53xx_sprom_fill_r89(sprom, fill);
579 + bcm53xx_sprom_fill_path_r4589(sprom, fill);
580 + break;
581 + case 9:
582 + bcm53xx_sprom_fill_r1234589(sprom, fill);
583 + bcm53xx_sprom_fill_r12389(sprom, fill);
584 + bcm53xx_sprom_fill_r2389(sprom, fill);
585 + bcm53xx_sprom_fill_r389(sprom, fill);
586 + bcm53xx_sprom_fill_r4589(sprom, fill);
587 + bcm53xx_sprom_fill_r89(sprom, fill);
588 + bcm53xx_sprom_fill_r9(sprom, fill);
589 + bcm53xx_sprom_fill_path_r4589(sprom, fill);
590 + break;
591 + default:
592 + pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
593 + sprom->revision);
594 + sprom->revision = 1;
595 + bcm53xx_sprom_fill_r1234589(sprom, fill);
596 + bcm53xx_sprom_fill_r12389(sprom, fill);
597 + bcm53xx_sprom_fill_r1(sprom, fill);
598 + }
599 +}
600 +
601 +static int bcm53xx_sprom_getenv(const struct bcm53xx_sprom_fill *fill,
602 + const char *name, char *val, size_t val_len)
603 +{
604 + const struct platform_device *nvram_dev = fill->priv;
605 +
606 + return bcm47xx_nvram_getenv(&nvram_dev->dev, name, val, val_len);
607 +};
608 +
609 +static int bcm53xx_sprom_probe(struct platform_device *pdev)
610 +{
611 + struct device *dev = &pdev->dev;
612 + struct device_node *np = dev->of_node;
613 + struct ssb_sprom *sprom;
614 + const phandle *handle;
615 + struct device_node *nvram_node;
616 + struct platform_device *nvram_dev;
617 + struct bcm53xx_sprom_fill fill;
618 +
619 + /* Alloc */
620 + sprom = devm_kzalloc(dev, sizeof(*sprom), GFP_KERNEL);
621 + if (!sprom)
622 + return -ENOMEM;
623 +
624 + handle = of_get_property(np, "nvram", NULL);
625 + if (!handle)
626 + return -ENOMEM;
627 +
628 + nvram_node = of_find_node_by_phandle(be32_to_cpup(handle));
629 + if (!nvram_node)
630 + return -ENOMEM;
631 +
632 + nvram_dev = of_find_device_by_node(nvram_node);
633 + if (!nvram_dev)
634 + return -ENOMEM;
635 +
636 + fill.prefix = NULL;
637 + fill.fallback = false;
638 + fill.getenv = bcm53xx_sprom_getenv;
639 + fill.priv = nvram_dev;
640 +
641 + bcm53xx_sprom_fill(sprom, &fill);
642 +
643 + platform_set_drvdata(pdev, sprom);
644 +
645 + return 0;
646 +}
647 +
648 +static const struct of_device_id bcm53xx_sprom_of_match_table[] = {
649 + { .compatible = "brcm,bcm53xx-sprom", },
650 + {},
651 +};
652 +MODULE_DEVICE_TABLE(of, mvebu_pcie_of_match_table);
653 +
654 +static struct platform_driver bcm53xx_sprom_driver = {
655 + .driver = {
656 + .owner = THIS_MODULE,
657 + .name = "bcm53xx-sprom",
658 + .of_match_table = bcm53xx_sprom_of_match_table,
659 + /* driver unloading/unbinding currently not supported */
660 + .suppress_bind_attrs = true,
661 + },
662 + .probe = bcm53xx_sprom_probe,
663 +};
664 +module_platform_driver(bcm53xx_sprom_driver);
665 +
666 +MODULE_AUTHOR("Hauke Mehrtens <hauke@hauke-m.de>");
667 +MODULE_LICENSE("GPLv2");