brcm47xx: prepare brcm47xx patches for sending to mainline.
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-2.6.34 / 021-USB-Add-USB-2.0-to-ssb-ohci-driver.patch
1 From cb33ffbdd8491c58b35958ec74c39b3a5c7fabe8 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 18 Jul 2010 21:25:03 +0200
4 Subject: [PATCH 1/2] USB: Add USB 2.0 to ssb ohci driver
5
6 This adds USB 2.0 support to ssb ohci driver.
7 This work was done based on Braodcom source code in the OpenWRT project.
8
9 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
10 ---
11 drivers/usb/host/ohci-ssb.c | 55 ++++++++++++++++++++++++++++++++++++++++--
12 1 files changed, 52 insertions(+), 3 deletions(-)
13
14 --- a/drivers/usb/host/ohci-ssb.c
15 +++ b/drivers/usb/host/ohci-ssb.c
16 @@ -92,9 +92,12 @@ static const struct hc_driver ssb_ohci_h
17 static void ssb_ohci_detach(struct ssb_device *dev)
18 {
19 struct usb_hcd *hcd = ssb_get_drvdata(dev);
20 + if (hcd->driver->shutdown)
21 + hcd->driver->shutdown(hcd);
22
23 usb_remove_hcd(hcd);
24 iounmap(hcd->regs);
25 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
26 usb_put_hcd(hcd);
27 ssb_device_disable(dev, 0);
28 }
29 @@ -106,10 +109,55 @@ static int ssb_ohci_attach(struct ssb_de
30 int err = -ENOMEM;
31 u32 tmp, flags = 0;
32
33 - if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV)
34 - flags |= SSB_OHCI_TMSLOW_HOSTMODE;
35 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
36 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
37 + return -EOPNOTSUPP;
38
39 - ssb_device_enable(dev, flags);
40 + if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) {
41 + /* Put the device into host-mode. */
42 + flags |= SSB_OHCI_TMSLOW_HOSTMODE;
43 + ssb_device_enable(dev, flags);
44 + } else if (dev->id.coreid == SSB_DEV_USB20_HOST) {
45 + /*
46 + * USB 2.0 special considerations:
47 + *
48 + * 1. Since the core supports both ehci and EHCI functions, it must
49 + * only be reset once.
50 + *
51 + * 2. In addition to the standard SSB reset sequence, the Host Control
52 + * Register must be programmed to bring the USB core and various
53 + * phy components out of reset.
54 + */
55 + ssb_device_enable(dev, 0);
56 + ssb_write32(dev, 0x200, 0x7ff);
57 +
58 + /* Change Flush control reg */
59 + tmp = ssb_read32(dev, 0x400);
60 + tmp &= ~8;
61 + ssb_write32(dev, 0x400, tmp);
62 + tmp = ssb_read32(dev, 0x400);
63 +
64 + /* Change Shim control reg */
65 + tmp = ssb_read32(dev, 0x304);
66 + tmp &= ~0x100;
67 + ssb_write32(dev, 0x304, tmp);
68 + tmp = ssb_read32(dev, 0x304);
69 +
70 + udelay(1);
71 +
72 + /* Work around for 5354 failures */
73 + if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
74 + /* Change syn01 reg */
75 + tmp = 0x00fe00fe;
76 + ssb_write32(dev, 0x894, tmp);
77 +
78 + /* Change syn03 reg */
79 + tmp = ssb_read32(dev, 0x89c);
80 + tmp |= 0x1;
81 + ssb_write32(dev, 0x89c, tmp);
82 + }
83 + } else
84 + ssb_device_enable(dev, 0);
85
86 hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev,
87 dev_name(dev->dev));
88 @@ -200,6 +248,7 @@ static int ssb_ohci_resume(struct ssb_de
89 static const struct ssb_device_id ssb_ohci_table[] = {
90 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
91 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
92 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
93 SSB_DEVTABLE_END
94 };
95 MODULE_DEVICE_TABLE(ssb, ssb_ohci_table);