brcm47xx: prepare brcm47xx patches for sending to mainline.
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-2.6.35 / 022-USB-Add-ehci-ssb-driver.patch
1 From cb269cf1f97c316a5184080814a751687c72b718 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 18 Jul 2010 21:29:40 +0200
4 Subject: [PATCH 2/2] USB: Add ehci ssb driver
5
6 Support for the Sonics Silicon Backplane (SSB) attached Broadcom USB EHCI core.
7
8 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
9 ---
10 drivers/usb/host/Kconfig | 13 ++
11 drivers/usb/host/ehci-hcd.c | 23 ++++-
12 drivers/usb/host/ehci-ssb.c | 258 +++++++++++++++++++++++++++++++++++++++++++
13 3 files changed, 292 insertions(+), 2 deletions(-)
14 create mode 100644 drivers/usb/host/ehci-ssb.c
15
16 --- a/drivers/usb/host/Kconfig
17 +++ b/drivers/usb/host/Kconfig
18 @@ -150,6 +150,19 @@ config USB_OXU210HP_HCD
19 To compile this driver as a module, choose M here: the
20 module will be called oxu210hp-hcd.
21
22 +config USB_EHCI_HCD_SSB
23 + bool "EHCI support for Broadcom SSB EHCI core"
24 + depends on USB_EHCI_HCD && (SSB = y || SSB = USB_EHCI_HCD) && EXPERIMENTAL
25 + default n
26 + ---help---
27 + Support for the Sonics Silicon Backplane (SSB) attached
28 + Broadcom USB EHCI core.
29 +
30 + This device is present in some embedded devices with
31 + Broadcom based SSB bus.
32 +
33 + If unsure, say N.
34 +
35 config USB_ISP116X_HCD
36 tristate "ISP116X HCD support"
37 depends on USB
38 --- a/drivers/usb/host/ehci-hcd.c
39 +++ b/drivers/usb/host/ehci-hcd.c
40 @@ -1158,9 +1158,14 @@ MODULE_LICENSE ("GPL");
41 #define PLATFORM_DRIVER ehci_atmel_driver
42 #endif
43
44 +#ifdef CONFIG_USB_EHCI_HCD_SSB
45 +#include "ehci-ssb.c"
46 +#define SSB_EHCI_DRIVER ssb_ehci_driver
47 +#endif
48 +
49 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
50 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
51 - !defined(XILINX_OF_PLATFORM_DRIVER)
52 + !defined(XILINX_OF_PLATFORM_DRIVER) && !defined(SSB_EHCI_DRIVER)
53 #error "missing bus glue for ehci-hcd"
54 #endif
55
56 @@ -1220,10 +1225,21 @@ static int __init ehci_hcd_init(void)
57 if (retval < 0)
58 goto clean4;
59 #endif
60 +
61 +#ifdef SSB_EHCI_DRIVER
62 + retval = ssb_driver_register(&SSB_EHCI_DRIVER);
63 + if (retval < 0)
64 + goto clean5;
65 +#endif
66 +
67 return retval;
68
69 +#ifdef SSB_EHCI_DRIVER
70 + /* ssb_driver_unregister(&SSB_EHCI_DRIVER); */
71 +clean5:
72 +#endif
73 #ifdef XILINX_OF_PLATFORM_DRIVER
74 - /* of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER); */
75 + of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
76 clean4:
77 #endif
78 #ifdef OF_PLATFORM_DRIVER
79 @@ -1254,6 +1270,9 @@ module_init(ehci_hcd_init);
80
81 static void __exit ehci_hcd_cleanup(void)
82 {
83 +#ifdef SSB_EHCI_DRIVER
84 + ssb_driver_unregister(&SSB_EHCI_DRIVER);
85 +#endif
86 #ifdef XILINX_OF_PLATFORM_DRIVER
87 of_unregister_platform_driver(&XILINX_OF_PLATFORM_DRIVER);
88 #endif
89 --- /dev/null
90 +++ b/drivers/usb/host/ehci-ssb.c
91 @@ -0,0 +1,258 @@
92 +/*
93 + * Sonics Silicon Backplane
94 + * Broadcom USB-core EHCI driver (SSB bus glue)
95 + *
96 + * Copyright 2007 Steven Brown <sbrown@cortland.com>
97 + * Copyright 2010 Hauke Mehrtens <hauke@hauke-m.de>
98 + *
99 + * Derived from the OHCI-SSB driver
100 + * Copyright 2007 Michael Buesch <mb@bu3sch.de>
101 + *
102 + * Derived from the EHCI-PCI driver
103 + * Copyright (c) 2000-2004 by David Brownell
104 + *
105 + * Derived from the OHCI-PCI driver
106 + * Copyright 1999 Roman Weissgaerber
107 + * Copyright 2000-2002 David Brownell
108 + * Copyright 1999 Linus Torvalds
109 + * Copyright 1999 Gregory P. Smith
110 + *
111 + * Derived from the USBcore related parts of Broadcom-SB
112 + * Copyright 2005 Broadcom Corporation
113 + *
114 + * Licensed under the GNU/GPL. See COPYING for details.
115 + */
116 +#include <linux/ssb/ssb.h>
117 +
118 +
119 +struct ssb_ehci_device {
120 + struct ehci_hcd ehci; /* _must_ be at the beginning. */
121 +};
122 +
123 +static inline
124 +struct ssb_ehci_device *hcd_to_ssb_ehci(struct usb_hcd *hcd)
125 +{
126 + return (struct ssb_ehci_device *)(hcd->hcd_priv);
127 +}
128 +
129 +static int ssb_ehci_reset(struct usb_hcd *hcd)
130 +{
131 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
132 + int err;
133 +
134 + ehci->caps = hcd->regs;
135 + ehci->regs = hcd->regs +
136 + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
137 +
138 + dbg_hcs_params(ehci, "reset");
139 + dbg_hcc_params(ehci, "reset");
140 +
141 + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
142 +
143 + err = ehci_halt(ehci);
144 +
145 + if (err)
146 + return err;
147 +
148 + err = ehci_init(hcd);
149 +
150 + if (err)
151 + return err;
152 +
153 + ehci_reset(ehci);
154 +
155 + return err;
156 +}
157 +
158 +static const struct hc_driver ssb_ehci_hc_driver = {
159 + .description = "ssb-usb-ehci",
160 + .product_desc = "SSB EHCI Controller",
161 + .hcd_priv_size = sizeof(struct ssb_ehci_device),
162 +
163 + .irq = ehci_irq,
164 + .flags = HCD_MEMORY | HCD_USB2,
165 +
166 + .reset = ssb_ehci_reset,
167 + .start = ehci_run,
168 + .stop = ehci_stop,
169 + .shutdown = ehci_shutdown,
170 +
171 + .urb_enqueue = ehci_urb_enqueue,
172 + .urb_dequeue = ehci_urb_dequeue,
173 + .endpoint_disable = ehci_endpoint_disable,
174 + .endpoint_reset = ehci_endpoint_reset,
175 +
176 + .get_frame_number = ehci_get_frame,
177 +
178 + .hub_status_data = ehci_hub_status_data,
179 + .hub_control = ehci_hub_control,
180 +#if defined(CONFIG_PM)
181 + .bus_suspend = ehci_bus_suspend,
182 + .bus_resume = ehci_bus_resume,
183 +#endif
184 + .relinquish_port = ehci_relinquish_port,
185 + .port_handed_over = ehci_port_handed_over,
186 +
187 + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
188 +};
189 +
190 +static void ssb_ehci_detach(struct ssb_device *dev)
191 +{
192 + struct usb_hcd *hcd = ssb_get_drvdata(dev);
193 + if (hcd->driver->shutdown)
194 + hcd->driver->shutdown(hcd);
195 +
196 + usb_remove_hcd(hcd);
197 + iounmap(hcd->regs);
198 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
199 + usb_put_hcd(hcd);
200 + ssb_device_disable(dev, 0);
201 +}
202 +
203 +static int ssb_ehci_attach(struct ssb_device *dev)
204 +{
205 + struct ssb_ehci_device *ehcidev;
206 + struct usb_hcd *hcd;
207 + int err = -ENOMEM;
208 + u32 tmp;
209 +
210 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
211 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
212 + return -EOPNOTSUPP;
213 +
214 + /*
215 + * USB 2.0 special considerations:
216 + *
217 + * 1. Since the core supports both ehci and EHCI functions, it must
218 + * only be reset once.
219 + *
220 + * 2. In addition to the standard SSB reset sequence, the Host Control
221 + * Register must be programmed to bring the USB core and various
222 + * phy components out of reset.
223 + */
224 + ssb_device_enable(dev, 0);
225 + ssb_write32(dev, 0x200, 0x7ff);
226 +
227 + /* Change Flush control reg */
228 + tmp = ssb_read32(dev, 0x400);
229 + tmp &= ~8;
230 + ssb_write32(dev, 0x400, tmp);
231 + tmp = ssb_read32(dev, 0x400);
232 +
233 + /* Change Shim control reg */
234 + tmp = ssb_read32(dev, 0x304);
235 + tmp &= ~0x100;
236 + ssb_write32(dev, 0x304, tmp);
237 + tmp = ssb_read32(dev, 0x304);
238 +
239 + udelay(1);
240 +
241 + /* Work around for 5354 failures */
242 + if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
243 + /* Change syn01 reg */
244 + tmp = 0x00fe00fe;
245 + ssb_write32(dev, 0x894, tmp);
246 +
247 + /* Change syn03 reg */
248 + tmp = ssb_read32(dev, 0x89c);
249 + tmp |= 0x1;
250 + ssb_write32(dev, 0x89c, tmp);
251 + }
252 +
253 + hcd = usb_create_hcd(&ssb_ehci_hc_driver, dev->dev,
254 + dev_name(dev->dev));
255 + if (!hcd)
256 + goto err_dev_disable;
257 +
258 + ehcidev = hcd_to_ssb_ehci(hcd);
259 + tmp = ssb_read32(dev, SSB_ADMATCH0);
260 + hcd->rsrc_start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */
261 + hcd->rsrc_len = 0x100; /* ehci reg block size */
262 + /*
263 + * start & size modified per sbutils.c
264 + */
265 + hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
266 + if (!hcd->regs)
267 + goto err_put_hcd;
268 + err = usb_add_hcd(hcd, dev->irq, IRQF_DISABLED | IRQF_SHARED);
269 + if (err)
270 + goto err_iounmap;
271 +
272 + ssb_set_drvdata(dev, hcd);
273 +
274 + return err;
275 +
276 +err_iounmap:
277 + iounmap(hcd->regs);
278 +err_put_hcd:
279 + usb_put_hcd(hcd);
280 +err_dev_disable:
281 + ssb_device_disable(dev, 0);
282 + return err;
283 +}
284 +
285 +static int ssb_ehci_probe(struct ssb_device *dev,
286 + const struct ssb_device_id *id)
287 +{
288 + int err;
289 + u16 chipid_top;
290 +
291 + /* USBcores are only connected on embedded devices. */
292 + chipid_top = (dev->bus->chip_id & 0xFF00);
293 + if (chipid_top != 0x4700 && chipid_top != 0x5300)
294 + return -ENODEV;
295 +
296 + /* TODO: Probably need checks here; is the core connected? */
297 +
298 + if (usb_disabled())
299 + return -ENODEV;
300 +
301 + err = ssb_ehci_attach(dev);
302 +
303 + return err;
304 +}
305 +
306 +static void ssb_ehci_remove(struct ssb_device *dev)
307 +{
308 + ssb_ehci_detach(dev);
309 +}
310 +
311 +#ifdef CONFIG_PM
312 +
313 +static int ssb_ehci_suspend(struct ssb_device *dev, pm_message_t state)
314 +{
315 + ssb_device_disable(dev, 0);
316 +
317 + return 0;
318 +}
319 +
320 +static int ssb_ehci_resume(struct ssb_device *dev)
321 +{
322 + struct usb_hcd *hcd = ssb_get_drvdata(dev);
323 + struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd);
324 +
325 + ssb_device_enable(dev, 0);
326 +
327 + ehci_finish_controller_resume(hcd);
328 + return 0;
329 +}
330 +
331 +#else /* !CONFIG_PM */
332 +#define ssb_ehci_suspend NULL
333 +#define ssb_ehci_resume NULL
334 +#endif /* CONFIG_PM */
335 +
336 +static const struct ssb_device_id ssb_ehci_table[] = {
337 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
338 + SSB_DEVTABLE_END
339 +};
340 +MODULE_DEVICE_TABLE(ssb, ssb_ehci_table);
341 +
342 +static struct ssb_driver ssb_ehci_driver = {
343 + .name = KBUILD_MODNAME,
344 + .id_table = ssb_ehci_table,
345 + .probe = ssb_ehci_probe,
346 + .remove = ssb_ehci_remove,
347 + .suspend = ssb_ehci_suspend,
348 + .resume = ssb_ehci_resume,
349 +};