brcm47xx: update bcma and ssb to master-2011-07-21
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-3.0 / 0012-bcma-move-parallel-flash-into-a-union.patch
1 From a1d9c96a6c9b37b26dc1149706f3061b57a62b50 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 17 Jul 2011 14:51:47 +0200
4 Subject: [PATCH 12/22] bcma: move parallel flash into a union
5
6
7 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
8 ---
9 arch/mips/bcm47xx/nvram.c | 7 ++-
10 drivers/bcma/driver_mips.c | 9 ++--
11 include/linux/bcma/bcma_driver_chipcommon.h | 75 ++++++++++++++++++++++++++-
12 3 files changed, 84 insertions(+), 7 deletions(-)
13
14 --- a/arch/mips/bcm47xx/nvram.c
15 +++ b/arch/mips/bcm47xx/nvram.c
16 @@ -50,8 +50,11 @@ static void early_nvram_init(void)
17 #ifdef CONFIG_BCM47XX_BCMA
18 case BCM47XX_BUS_TYPE_BCMA:
19 bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
20 - base = bcma_cc->pflash.window;
21 - lim = bcma_cc->pflash.window_size;
22 + if (bcma_cc->flash_type != BCMA_PFLASH)
23 + return;
24 +
25 + base = bcma_cc->flash.pflash.window;
26 + lim = bcma_cc->flash.pflash.window_size;
27 break;
28 #endif
29 }
30 --- a/drivers/bcma/driver_mips.c
31 +++ b/drivers/bcma/driver_mips.c
32 @@ -189,14 +189,15 @@ static void bcma_core_mips_flash_detect(
33 break;
34 case BCMA_CC_FLASHT_PARA:
35 pr_info("found parallel flash.\n");
36 - bus->drv_cc.pflash.window = 0x1c000000;
37 - bus->drv_cc.pflash.window_size = 0x02000000;
38 + bus->drv_cc.flash_type = BCMA_PFLASH;
39 + bus->drv_cc.flash.pflash.window = 0x1c000000;
40 + bus->drv_cc.flash.pflash.window_size = 0x02000000;
41
42 if ((bcma_read32(bus->drv_cc.core, BCMA_CC_FLASH_CFG) &
43 BCMA_CC_FLASH_CFG_DS) == 0)
44 - bus->drv_cc.pflash.buswidth = 1;
45 + bus->drv_cc.flash.pflash.buswidth = 1;
46 else
47 - bus->drv_cc.pflash.buswidth = 2;
48 + bus->drv_cc.flash.pflash.buswidth = 2;
49 break;
50 default:
51 pr_err("flash not supported.\n");
52 --- a/include/linux/bcma/bcma_driver_chipcommon.h
53 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
54 @@ -108,10 +108,68 @@
55 #define BCMA_CC_JCTL_EXT_EN 2 /* Enable external targets */
56 #define BCMA_CC_JCTL_EN 1 /* Enable Jtag master */
57 #define BCMA_CC_FLASHCTL 0x0040
58 +
59 +/* Start/busy bit in flashcontrol */
60 +#define BCMA_CC_FLASHCTL_OPCODE 0x000000ff
61 +#define BCMA_CC_FLASHCTL_ACTION 0x00000700
62 +#define BCMA_CC_FLASHCTL_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */
63 #define BCMA_CC_FLASHCTL_START 0x80000000
64 #define BCMA_CC_FLASHCTL_BUSY BCMA_CC_FLASHCTL_START
65 +
66 +/* flashcontrol action+opcodes for ST flashes */
67 +#define BCMA_CC_FLASHCTL_ST_WREN 0x0006 /* Write Enable */
68 +#define BCMA_CC_FLASHCTL_ST_WRDIS 0x0004 /* Write Disable */
69 +#define BCMA_CC_FLASHCTL_ST_RDSR 0x0105 /* Read Status Register */
70 +#define BCMA_CC_FLASHCTL_ST_WRSR 0x0101 /* Write Status Register */
71 +#define BCMA_CC_FLASHCTL_ST_READ 0x0303 /* Read Data Bytes */
72 +#define BCMA_CC_FLASHCTL_ST_PP 0x0302 /* Page Program */
73 +#define BCMA_CC_FLASHCTL_ST_SE 0x02d8 /* Sector Erase */
74 +#define BCMA_CC_FLASHCTL_ST_BE 0x00c7 /* Bulk Erase */
75 +#define BCMA_CC_FLASHCTL_ST_DP 0x00b9 /* Deep Power-down */
76 +#define BCMA_CC_FLASHCTL_ST_RES 0x03ab /* Read Electronic Signature */
77 +#define BCMA_CC_FLASHCTL_ST_CSA 0x1000 /* Keep chip select asserted */
78 +#define BCMA_CC_FLASHCTL_ST_SSE 0x0220 /* Sub-sector Erase */
79 +
80 +
81 +/* flashcontrol action+opcodes for Atmel flashes */
82 +#define BCMA_CC_FLASHCTL_AT_READ 0x07e8
83 +#define BCMA_CC_FLASHCTL_AT_PAGE_READ 0x07d2
84 +#define BCMA_CC_FLASHCTL_AT_BUF1_READ
85 +#define BCMA_CC_FLASHCTL_AT_BUF2_READ
86 +#define BCMA_CC_FLASHCTL_AT_STATUS 0x01d7
87 +#define BCMA_CC_FLASHCTL_AT_BUF1_WRITE 0x0384
88 +#define BCMA_CC_FLASHCTL_AT_BUF2_WRITE 0x0387
89 +#define BCMA_CC_FLASHCTL_AT_BUF1_ERASE_PROGRAM 0x0283
90 +#define BCMA_CC_FLASHCTL_AT_BUF2_ERASE_PROGRAM 0x0286
91 +#define BCMA_CC_FLASHCTL_AT_BUF1_PROGRAM 0x0288
92 +#define BCMA_CC_FLASHCTL_AT_BUF2_PROGRAM 0x0289
93 +#define BCMA_CC_FLASHCTL_AT_PAGE_ERASE 0x0281
94 +#define BCMA_CC_FLASHCTL_AT_BLOCK_ERASE 0x0250
95 +#define BCMA_CC_FLASHCTL_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382
96 +#define BCMA_CC_FLASHCTL_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385
97 +#define BCMA_CC_FLASHCTL_AT_BUF1_LOAD 0x0253
98 +#define BCMA_CC_FLASHCTL_AT_BUF2_LOAD 0x0255
99 +#define BCMA_CC_FLASHCTL_AT_BUF1_COMPARE 0x0260
100 +#define BCMA_CC_FLASHCTL_AT_BUF2_COMPARE 0x0261
101 +#define BCMA_CC_FLASHCTL_AT_BUF1_REPROGRAM 0x0258
102 +#define BCMA_CC_FLASHCTL_AT_BUF2_REPROGRAM 0x0259
103 +
104 #define BCMA_CC_FLASHADDR 0x0044
105 #define BCMA_CC_FLASHDATA 0x0048
106 +
107 +/* Status register bits for ST flashes */
108 +#define BCMA_CC_FLASHDATA_ST_WIP 0x01 /* Write In Progress */
109 +#define BCMA_CC_FLASHDATA_ST_WEL 0x02 /* Write Enable Latch */
110 +#define BCMA_CC_FLASHDATA_ST_BP_MASK 0x1c /* Block Protect */
111 +#define BCMA_CC_FLASHDATA_ST_BP_SHIFT 2
112 +#define BCMA_CC_FLASHDATA_ST_SRWD 0x80 /* Status Register Write Disable */
113 +
114 +/* Status register bits for Atmel flashes */
115 +#define BCMA_CC_FLASHDATA_AT_READY 0x80
116 +#define BCMA_CC_FLASHDATA_AT_MISMATCH 0x40
117 +#define BCMA_CC_FLASHDATA_AT_ID_MASK 0x38
118 +#define BCMA_CC_FLASHDATA_AT_ID_SHIFT 3
119 +
120 #define BCMA_CC_BCAST_ADDR 0x0050
121 #define BCMA_CC_BCAST_DATA 0x0054
122 #define BCMA_CC_GPIOPULLUP 0x0058 /* Rev >= 20 only */
123 @@ -283,6 +341,12 @@
124 #define BCMA_CC_PPL_PCHI_OFF 5
125 #define BCMA_CC_PPL_PCHI_MASK 0x0000003f
126
127 +#define BCMA_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */
128 +#define BCMA_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */
129 +#define BCMA_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */
130 +#define BCMA_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */
131 +
132 +
133 /* Data for the PMU, if available.
134 * Check availability with ((struct bcma_chipcommon)->capabilities & BCMA_CC_CAP_PMU)
135 */
136 @@ -292,12 +356,20 @@ struct bcma_chipcommon_pmu {
137 };
138
139 #ifdef CONFIG_BCMA_DRIVER_MIPS
140 +enum bcma_flash_type {
141 + BCMA_PFLASH,
142 +};
143 +
144 struct bcma_pflash {
145 u8 buswidth;
146 u32 window;
147 u32 window_size;
148 };
149
150 +union bcma_flash {
151 + struct bcma_pflash pflash;
152 +};
153 +
154 struct bcma_serial_port {
155 void *regs;
156 unsigned long clockspeed;
157 @@ -317,7 +389,8 @@ struct bcma_drv_cc {
158 u16 fast_pwrup_delay;
159 struct bcma_chipcommon_pmu pmu;
160 #ifdef CONFIG_BCMA_DRIVER_MIPS
161 - struct bcma_pflash pflash;
162 + enum bcma_flash_type flash_type;
163 + union bcma_flash flash;
164
165 int nr_serial_ports;
166 struct bcma_serial_port serial_ports[4];