brcm47xx: move and rename the patches
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-3.2 / 022-ssb-move-flash-to-chipcommon.patch
1 From e8afde87ecf56beff67c7d5371cabaa4fc018541 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 23 Jul 2011 23:57:06 +0200
4 Subject: [PATCH 14/26] ssb: move flash to chipcommon
5
6
7 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
8 ---
9 arch/mips/bcm47xx/nvram.c | 8 +++---
10 arch/mips/bcm47xx/wgt634u.c | 8 +++---
11 drivers/ssb/driver_mipscore.c | 36 +++++++++++++++++++++-------
12 include/linux/ssb/ssb_driver_chipcommon.h | 18 ++++++++++++++
13 include/linux/ssb/ssb_driver_mips.h | 4 ---
14 5 files changed, 53 insertions(+), 21 deletions(-)
15
16 --- a/arch/mips/bcm47xx/nvram.c
17 +++ b/arch/mips/bcm47xx/nvram.c
18 @@ -27,7 +27,7 @@ static char nvram_buf[NVRAM_SPACE];
19 static void early_nvram_init(void)
20 {
21 #ifdef CONFIG_BCM47XX_SSB
22 - struct ssb_mipscore *mcore_ssb;
23 + struct ssb_chipcommon *ssb_cc;
24 #endif
25 #ifdef CONFIG_BCM47XX_BCMA
26 struct bcma_drv_cc *bcma_cc;
27 @@ -42,9 +42,9 @@ static void early_nvram_init(void)
28 switch (bcm47xx_bus_type) {
29 #ifdef CONFIG_BCM47XX_SSB
30 case BCM47XX_BUS_TYPE_SSB:
31 - mcore_ssb = &bcm47xx_bus.ssb.mipscore;
32 - base = mcore_ssb->flash_window;
33 - lim = mcore_ssb->flash_window_size;
34 + ssb_cc = &bcm47xx_bus.ssb.chipco;
35 + base = ssb_cc->pflash.window;
36 + lim = ssb_cc->pflash.window_size;
37 break;
38 #endif
39 #ifdef CONFIG_BCM47XX_BCMA
40 --- a/arch/mips/bcm47xx/wgt634u.c
41 +++ b/arch/mips/bcm47xx/wgt634u.c
42 @@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
43 SSB_CHIPCO_IRQ_GPIO);
44 }
45
46 - wgt634u_flash_data.width = mcore->flash_buswidth;
47 - wgt634u_flash_resource.start = mcore->flash_window;
48 - wgt634u_flash_resource.end = mcore->flash_window
49 - + mcore->flash_window_size
50 + wgt634u_flash_data.width = mcore->pflash.buswidth;
51 + wgt634u_flash_resource.start = mcore->pflash.window;
52 + wgt634u_flash_resource.end = mcore->pflash.window
53 + + mcore->pflash.window_size
54 - 1;
55 return platform_add_devices(wgt634u_devices,
56 ARRAY_SIZE(wgt634u_devices));
57 --- a/drivers/ssb/driver_mipscore.c
58 +++ b/drivers/ssb/driver_mipscore.c
59 @@ -190,16 +190,34 @@ static void ssb_mips_flash_detect(struct
60 {
61 struct ssb_bus *bus = mcore->dev->bus;
62
63 - mcore->flash_buswidth = 2;
64 - if (bus->chipco.dev) {
65 - mcore->flash_window = 0x1c000000;
66 - mcore->flash_window_size = 0x02000000;
67 + /* When there is no chipcommon on the bus there is 4MB flash */
68 + if (!bus->chipco.dev) {
69 + pr_info("found parallel flash.\n");
70 + bus->chipco.flash_type = SSB_PFLASH;
71 + bus->chipco.pflash.window = SSB_FLASH1;
72 + bus->chipco.pflash.window_size = SSB_FLASH1_SZ;
73 + bus->chipco.pflash.buswidth = 2;
74 + return;
75 + }
76 +
77 + switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
78 + case SSB_CHIPCO_FLASHT_STSER:
79 + case SSB_CHIPCO_FLASHT_ATSER:
80 + pr_info("serial flash not supported.\n");
81 + break;
82 + case SSB_CHIPCO_FLASHT_PARA:
83 + pr_info("found parallel flash.\n");
84 + bus->chipco.flash_type = SSB_PFLASH;
85 + bus->chipco.pflash.window = SSB_FLASH2;
86 + bus->chipco.pflash.window_size = SSB_FLASH2_SZ;
87 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
88 - & SSB_CHIPCO_CFG_DS16) == 0)
89 - mcore->flash_buswidth = 1;
90 - } else {
91 - mcore->flash_window = 0x1fc00000;
92 - mcore->flash_window_size = 0x00400000;
93 + & SSB_CHIPCO_CFG_DS16) == 0)
94 + bus->chipco.pflash.buswidth = 1;
95 + else
96 + bus->chipco.pflash.buswidth = 2;
97 + break;
98 + default:
99 + pr_err("flash not supported.\n");
100 }
101 }
102
103 --- a/include/linux/ssb/ssb_driver_chipcommon.h
104 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
105 @@ -582,6 +582,18 @@ struct ssb_chipcommon_pmu {
106 u32 crystalfreq; /* The active crystal frequency (in kHz) */
107 };
108
109 +#ifdef CONFIG_SSB_DRIVER_MIPS
110 +enum ssb_flash_type {
111 + SSB_PFLASH,
112 +};
113 +
114 +struct ssb_pflash {
115 + u8 buswidth;
116 + u32 window;
117 + u32 window_size;
118 +};
119 +#endif /* CONFIG_SSB_DRIVER_MIPS */
120 +
121 struct ssb_chipcommon {
122 struct ssb_device *dev;
123 u32 capabilities;
124 @@ -589,6 +601,12 @@ struct ssb_chipcommon {
125 /* Fast Powerup Delay constant */
126 u16 fast_pwrup_delay;
127 struct ssb_chipcommon_pmu pmu;
128 +#ifdef CONFIG_SSB_DRIVER_MIPS
129 + enum ssb_flash_type flash_type;
130 + union {
131 + struct ssb_pflash pflash;
132 + };
133 +#endif /* CONFIG_SSB_DRIVER_MIPS */
134 };
135
136 static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
137 --- a/include/linux/ssb/ssb_driver_mips.h
138 +++ b/include/linux/ssb/ssb_driver_mips.h
139 @@ -19,10 +19,6 @@ struct ssb_mipscore {
140
141 int nr_serial_ports;
142 struct ssb_serial_port serial_ports[4];
143 -
144 - u8 flash_buswidth;
145 - u32 flash_window;
146 - u32 flash_window_size;
147 };
148
149 extern void ssb_mipscore_init(struct ssb_mipscore *mcore);