brcm47xx: sprom for nvram parsing
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-3.2 / 198-MIPS-BCM47XX-move-and-extend-sprom-parsing.patch
1 From bf975de39d2c6be28421c1de2068fd8bd018b96d Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 18 Feb 2012 14:50:24 +0100
4 Subject: [PATCH 198/202] MIPS: BCM47XX: move and extend sprom parsing
5
6 Move the sprom parsing from nvram into sprom.c. There are all values
7 needed for sprom version 1 to 9 read from nvram and there are more
8 sanity checks added. This is based on the sprom parsing in the open
9 source part of the Broadcom SDK.
10
11 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
12 ---
13 arch/mips/bcm47xx/Makefile | 2 +-
14 arch/mips/bcm47xx/setup.c | 151 +-------
15 arch/mips/bcm47xx/sprom.c | 618 ++++++++++++++++++++++++++
16 arch/mips/include/asm/mach-bcm47xx/bcm47xx.h | 3 +
17 4 files changed, 623 insertions(+), 151 deletions(-)
18 create mode 100644 arch/mips/bcm47xx/sprom.c
19
20 --- a/arch/mips/bcm47xx/Makefile
21 +++ b/arch/mips/bcm47xx/Makefile
22 @@ -3,5 +3,5 @@
23 # under Linux.
24 #
25
26 -obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o bus.o
27 +obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o bus.o sprom.o
28 obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
29 --- a/arch/mips/bcm47xx/setup.c
30 +++ b/arch/mips/bcm47xx/setup.c
31 @@ -91,156 +91,7 @@ static void bcm47xx_machine_halt(void)
32 }
33
34 #ifdef CONFIG_BCM47XX_SSB
35 -#define READ_FROM_NVRAM(_outvar, name, buf) \
36 - if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
37 - sprom->_outvar = simple_strtoul(buf, NULL, 0);
38 -
39 -#define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
40 - if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
41 - nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
42 - sprom->_outvar = simple_strtoul(buf, NULL, 0);
43 -
44 -static inline int nvram_getprefix(const char *prefix, char *name,
45 - char *buf, int len)
46 -{
47 - if (prefix) {
48 - char key[100];
49 -
50 - snprintf(key, sizeof(key), "%s%s", prefix, name);
51 - return nvram_getenv(key, buf, len);
52 - }
53 -
54 - return nvram_getenv(name, buf, len);
55 -}
56 -
57 -static u32 nvram_getu32(const char *name, char *buf, int len)
58 -{
59 - int rv;
60 - char key[100];
61 - u16 var0, var1;
62 -
63 - snprintf(key, sizeof(key), "%s0", name);
64 - rv = nvram_getenv(key, buf, len);
65 - /* return 0 here so this looks like unset */
66 - if (rv < 0)
67 - return 0;
68 - var0 = simple_strtoul(buf, NULL, 0);
69 -
70 - snprintf(key, sizeof(key), "%s1", name);
71 - rv = nvram_getenv(key, buf, len);
72 - if (rv < 0)
73 - return 0;
74 - var1 = simple_strtoul(buf, NULL, 0);
75 - return var1 << 16 | var0;
76 -}
77 -
78 -static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
79 -{
80 - char buf[100];
81 - u32 boardflags;
82 -
83 - memset(sprom, 0, sizeof(struct ssb_sprom));
84 -
85 - sprom->revision = 1; /* Fallback: Old hardware does not define this. */
86 - READ_FROM_NVRAM(revision, "sromrev", buf);
87 - if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
88 - nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
89 - nvram_parse_macaddr(buf, sprom->il0mac);
90 - if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
91 - nvram_parse_macaddr(buf, sprom->et0mac);
92 - if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
93 - nvram_parse_macaddr(buf, sprom->et1mac);
94 - READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
95 - READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
96 - READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
97 - READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
98 - READ_FROM_NVRAM(board_rev, "boardrev", buf);
99 - READ_FROM_NVRAM(country_code, "ccode", buf);
100 - READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
101 - READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
102 - READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
103 - READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
104 - READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
105 - READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
106 - READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
107 - READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
108 - READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
109 - READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
110 - READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
111 - READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
112 - READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
113 - READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
114 - READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
115 - READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
116 - READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
117 - READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
118 - READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
119 - READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
120 - READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
121 - READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
122 - READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
123 - READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
124 - READ_FROM_NVRAM(tri2g, "tri2g", buf);
125 - READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
126 - READ_FROM_NVRAM(tri5g, "tri5g", buf);
127 - READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
128 - READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
129 - READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
130 - READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
131 - READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
132 - READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
133 - READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
134 - READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
135 - READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
136 - READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
137 - READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
138 - READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
139 - READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
140 - READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
141 - READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
142 - READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
143 - READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
144 - READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
145 - READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
146 - READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
147 - READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
148 - READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
149 - READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
150 - READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
151 - READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
152 - READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
153 - READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
154 - READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
155 -
156 - sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
157 - sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
158 - sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
159 - sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
160 -
161 - READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
162 - READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
163 - READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
164 - READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
165 - memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
166 - sizeof(sprom->antenna_gain.ghz5));
167 -
168 - if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
169 - boardflags = simple_strtoul(buf, NULL, 0);
170 - if (boardflags) {
171 - sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
172 - sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
173 - }
174 - }
175 - if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
176 - boardflags = simple_strtoul(buf, NULL, 0);
177 - if (boardflags) {
178 - sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
179 - sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
180 - }
181 - }
182 -}
183 -
184 -int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
185 +static int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
186 {
187 char prefix[10];
188
189 --- /dev/null
190 +++ b/arch/mips/bcm47xx/sprom.c
191 @@ -0,0 +1,618 @@
192 +/*
193 + * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
194 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
195 + * Copyright (C) 2006 Michael Buesch <m@bues.ch>
196 + * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
197 + * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
198 + *
199 + * This program is free software; you can redistribute it and/or modify it
200 + * under the terms of the GNU General Public License as published by the
201 + * Free Software Foundation; either version 2 of the License, or (at your
202 + * option) any later version.
203 + *
204 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
205 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
206 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
207 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
209 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
210 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
211 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
212 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
213 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
214 + *
215 + * You should have received a copy of the GNU General Public License along
216 + * with this program; if not, write to the Free Software Foundation, Inc.,
217 + * 675 Mass Ave, Cambridge, MA 02139, USA.
218 + */
219 +
220 +#include <bcm47xx.h>
221 +#include <nvram.h>
222 +
223 +static void create_key(const char *prefix, const char *postfix,
224 + const char *name, char *buf, int len)
225 +{
226 + if (prefix && postfix)
227 + snprintf(buf, len, "%s%s%s", prefix, name, postfix);
228 + else if (prefix)
229 + snprintf(buf, len, "%s%s", prefix, name);
230 + else if (postfix)
231 + snprintf(buf, len, "%s%s", name, postfix);
232 + else
233 + snprintf(buf, len, "%s", name);
234 +}
235 +
236 +#define NVRAM_READ_VAL(type) \
237 +static void nvram_read_ ## type (const char *prefix, \
238 + const char *postfix, const char *name, \
239 + type *val, type allset) \
240 +{ \
241 + char buf[100]; \
242 + char key[40]; \
243 + int err; \
244 + type var; \
245 + \
246 + create_key(prefix, postfix, name, key, sizeof(key)); \
247 + \
248 + err = nvram_getenv(key, buf, sizeof(buf)); \
249 + if (err < 0) \
250 + return; \
251 + err = kstrto ## type (buf, 0, &var); \
252 + if (err) { \
253 + pr_warn("can not parse nvram name %s with value %s" \
254 + " got %i", key, buf, err); \
255 + return; \
256 + } \
257 + if (allset && var == allset) \
258 + return; \
259 + *val = var; \
260 +}
261 +
262 +NVRAM_READ_VAL(u8)
263 +NVRAM_READ_VAL(s8)
264 +NVRAM_READ_VAL(u16)
265 +NVRAM_READ_VAL(u32)
266 +
267 +#undef NVRAM_READ_VAL
268 +
269 +static void nvram_read_u32_2(const char *prefix, const char *name,
270 + u16 *val_lo, u16 *val_hi)
271 +{
272 + char buf[100];
273 + char key[40];
274 + int err;
275 + u32 val;
276 +
277 + create_key(prefix, NULL, name, key, sizeof(key));
278 +
279 + err = nvram_getenv(key, buf, sizeof(buf));
280 + if (err < 0)
281 + return;
282 + err = kstrtou32(buf, 0, &val);
283 + if (err) {
284 + pr_warn("can not parse nvram name %s with value %s got %i",
285 + key, buf, err);
286 + return;
287 + }
288 + *val_lo = (val & 0x0000FFFFU);
289 + *val_hi = (val & 0xFFFF0000U) >> 16;
290 +}
291 +
292 +static void nvram_read_leddc(const char *prefix, const char *name,
293 + u8 *leddc_on_time, u8 *leddc_off_time)
294 +{
295 + char buf[100];
296 + char key[40];
297 + int err;
298 + u32 val;
299 +
300 + create_key(prefix, NULL, name, key, sizeof(key));
301 +
302 + err = nvram_getenv(key, buf, sizeof(buf));
303 + if (err < 0)
304 + return;
305 + err = kstrtou32(buf, 0, &val);
306 + if (err) {
307 + pr_warn("can not parse nvram name %s with value %s got %i",
308 + key, buf, err);
309 + return;
310 + }
311 +
312 + if (val == 0xffff || val == 0xffffffff)
313 + return;
314 +
315 + *leddc_on_time = val & 0xff;
316 + *leddc_off_time = (val >> 16) & 0xff;
317 +}
318 +
319 +static void nvram_read_macaddr(const char *prefix, const char *name,
320 + u8 (*val)[6])
321 +{
322 + char buf[100];
323 + char key[40];
324 + int err;
325 +
326 + create_key(prefix, NULL, name, key, sizeof(key));
327 +
328 + err = nvram_getenv(key, buf, sizeof(buf));
329 + if (err < 0)
330 + return;
331 + nvram_parse_macaddr(buf, *val);
332 +}
333 +
334 +static void nvram_read_ccode(const char *prefix, const char *name,
335 + char (*val)[2])
336 +{
337 + char buf[10];
338 + char key[40];
339 + int err;
340 +
341 + create_key(prefix, NULL, name, key, sizeof(key));
342 +
343 + err = nvram_getenv(key, buf, sizeof(buf));
344 + if (err < 0)
345 + return;
346 + if (buf[0] == '0')
347 + return;
348 + if (strlen(buf) > 2) {
349 + pr_warn("ccode is too long %s", buf);
350 + return;
351 + }
352 + memcpy(val, buf, sizeof(val));
353 +}
354 +
355 +static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
356 + const char *prefix)
357 +{
358 + nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0);
359 + nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0);
360 + nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff);
361 + nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff);
362 + nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff);
363 + nvram_read_u8(prefix, NULL, "ledbh3", &sprom->gpio3, 0xff);
364 + nvram_read_u8(prefix, NULL, "aa2g", &sprom->ant_available_bg, 0);
365 + nvram_read_u8(prefix, NULL, "aa5g", &sprom->ant_available_a, 0);
366 + nvram_read_u8(prefix, NULL, "ag0", &sprom->antenna_gain.ghz24.a0, 0);
367 + nvram_read_u8(prefix, NULL, "ag1", &sprom->antenna_gain.ghz24.a1, 0);
368 + nvram_read_ccode(prefix, "ccode", &sprom->ccode);
369 +}
370 +
371 +static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
372 + const char *prefix)
373 +{
374 + nvram_read_u16(prefix, NULL, "pa0b0", &sprom->pa0b0, 0);
375 + nvram_read_u16(prefix, NULL, "pa0b1", &sprom->pa0b1, 0);
376 + nvram_read_u16(prefix, NULL, "pa0b2", &sprom->pa0b2, 0);
377 + nvram_read_u8(prefix, NULL, "pa0itssit", &sprom->itssi_bg, 0);
378 + nvram_read_u8(prefix, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
379 + nvram_read_u16(prefix, NULL, "pa1b0", &sprom->pa1b0, 0);
380 + nvram_read_u16(prefix, NULL, "pa1b1", &sprom->pa1b1, 0);
381 + nvram_read_u16(prefix, NULL, "pa1b2", &sprom->pa1b2, 0);
382 + nvram_read_u8(prefix, NULL, "pa1itssit", &sprom->itssi_a, 0);
383 + nvram_read_u8(prefix, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
384 +}
385 +
386 +static void bcm47xx_fill_sprom_r1(struct ssb_sprom *sprom, const char *prefix)
387 +{
388 + nvram_read_u16(prefix, NULL, "boardflags", &sprom->boardflags_lo, 0);
389 + nvram_read_u8(prefix, NULL, "cc", &sprom->country_code, 0);
390 +}
391 +
392 +static void bcm47xx_fill_sprom_r2389(struct ssb_sprom *sprom,
393 + const char *prefix)
394 +{
395 + nvram_read_u8(prefix, NULL, "opo", &sprom->opo, 0);
396 + nvram_read_u16(prefix, NULL, "pa1lob0", &sprom->pa1lob0, 0);
397 + nvram_read_u16(prefix, NULL, "pa1lob1", &sprom->pa1lob1, 0);
398 + nvram_read_u16(prefix, NULL, "pa1lob2", &sprom->pa1lob2, 0);
399 + nvram_read_u16(prefix, NULL, "pa1hib0", &sprom->pa1hib0, 0);
400 + nvram_read_u16(prefix, NULL, "pa1hib1", &sprom->pa1hib1, 0);
401 + nvram_read_u16(prefix, NULL, "pa1hib2", &sprom->pa1hib2, 0);
402 + nvram_read_u8(prefix, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
403 + nvram_read_u8(prefix, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
404 +}
405 +
406 +static void bcm47xx_fill_sprom_r2(struct ssb_sprom *sprom, const char *prefix)
407 +{
408 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
409 + &sprom->boardflags_hi);
410 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
411 +}
412 +
413 +static void bcm47xx_fill_sprom_r389(struct ssb_sprom *sprom, const char *prefix)
414 +{
415 + nvram_read_u8(prefix, NULL, "bxa2g", &sprom->bxa2g, 0);
416 + nvram_read_u8(prefix, NULL, "rssisav2g", &sprom->rssisav2g, 0);
417 + nvram_read_u8(prefix, NULL, "rssismc2g", &sprom->rssismc2g, 0);
418 + nvram_read_u8(prefix, NULL, "rssismf2g", &sprom->rssismf2g, 0);
419 + nvram_read_u8(prefix, NULL, "bxa5g", &sprom->bxa5g, 0);
420 + nvram_read_u8(prefix, NULL, "rssisav5g", &sprom->rssisav5g, 0);
421 + nvram_read_u8(prefix, NULL, "rssismc5g", &sprom->rssismc5g, 0);
422 + nvram_read_u8(prefix, NULL, "rssismf5g", &sprom->rssismf5g, 0);
423 + nvram_read_u8(prefix, NULL, "tri2g", &sprom->tri2g, 0);
424 + nvram_read_u8(prefix, NULL, "tri5g", &sprom->tri5g, 0);
425 + nvram_read_u8(prefix, NULL, "tri5gl", &sprom->tri5gl, 0);
426 + nvram_read_u8(prefix, NULL, "tri5gh", &sprom->tri5gh, 0);
427 + nvram_read_s8(prefix, NULL, "rxpo2g", &sprom->rxpo2g, 0);
428 + nvram_read_s8(prefix, NULL, "rxpo5g", &sprom->rxpo5g, 0);
429 +}
430 +
431 +static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix)
432 +{
433 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
434 + &sprom->boardflags_hi);
435 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
436 + nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
437 + nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
438 + &sprom->leddc_off_time);
439 +}
440 +
441 +static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,
442 + const char *prefix)
443 +{
444 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
445 + &sprom->boardflags_hi);
446 + nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
447 + &sprom->boardflags2_hi);
448 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
449 + nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
450 + nvram_read_u8(prefix, NULL, "ag2", &sprom->antenna_gain.ghz24.a2, 0);
451 + nvram_read_u8(prefix, NULL, "ag3", &sprom->antenna_gain.ghz24.a3, 0);
452 + nvram_read_u8(prefix, NULL, "txchain", &sprom->txchain, 0xf);
453 + nvram_read_u8(prefix, NULL, "rxchain", &sprom->rxchain, 0xf);
454 + nvram_read_u8(prefix, NULL, "antswitch", &sprom->antswitch, 0xff);
455 + nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
456 + &sprom->leddc_off_time);
457 +}
458 +
459 +static void bcm47xx_fill_sprom_r458(struct ssb_sprom *sprom, const char *prefix)
460 +{
461 + nvram_read_u16(prefix, NULL, "cck2gpo", &sprom->cck2gpo, 0);
462 + nvram_read_u32(prefix, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
463 + nvram_read_u32(prefix, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
464 + nvram_read_u32(prefix, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
465 + nvram_read_u32(prefix, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
466 + nvram_read_u16(prefix, NULL, "cddpo", &sprom->cddpo, 0);
467 + nvram_read_u16(prefix, NULL, "stbcpo", &sprom->stbcpo, 0);
468 + nvram_read_u16(prefix, NULL, "bw40po", &sprom->bw40po, 0);
469 + nvram_read_u16(prefix, NULL, "bwduppo", &sprom->bwduppo, 0);
470 + nvram_read_u16(prefix, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
471 + nvram_read_u16(prefix, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
472 + nvram_read_u16(prefix, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
473 + nvram_read_u16(prefix, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
474 + nvram_read_u16(prefix, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
475 + nvram_read_u16(prefix, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
476 + nvram_read_u16(prefix, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
477 + nvram_read_u16(prefix, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
478 + nvram_read_u16(prefix, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
479 + nvram_read_u16(prefix, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
480 + nvram_read_u16(prefix, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
481 + nvram_read_u16(prefix, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
482 + nvram_read_u16(prefix, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
483 + nvram_read_u16(prefix, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
484 + nvram_read_u16(prefix, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
485 + nvram_read_u16(prefix, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
486 + nvram_read_u16(prefix, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
487 + nvram_read_u16(prefix, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
488 + nvram_read_u16(prefix, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
489 + nvram_read_u16(prefix, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
490 + nvram_read_u16(prefix, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
491 + nvram_read_u16(prefix, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
492 + nvram_read_u16(prefix, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
493 + nvram_read_u16(prefix, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
494 + nvram_read_u16(prefix, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
495 + nvram_read_u16(prefix, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
496 + nvram_read_u16(prefix, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
497 + nvram_read_u16(prefix, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
498 + nvram_read_u16(prefix, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
499 + nvram_read_u16(prefix, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
500 + nvram_read_u16(prefix, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
501 + nvram_read_u16(prefix, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
502 +}
503 +
504 +static void bcm47xx_fill_sprom_r45(struct ssb_sprom *sprom, const char *prefix)
505 +{
506 + nvram_read_u8(prefix, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
507 + nvram_read_u8(prefix, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
508 + nvram_read_u8(prefix, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
509 + nvram_read_u8(prefix, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
510 + nvram_read_u8(prefix, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
511 + nvram_read_u8(prefix, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
512 + nvram_read_u8(prefix, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
513 + nvram_read_u8(prefix, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
514 + nvram_read_u8(prefix, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
515 + nvram_read_u8(prefix, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
516 + nvram_read_u8(prefix, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
517 + nvram_read_u8(prefix, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
518 + nvram_read_u8(prefix, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
519 + nvram_read_u8(prefix, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
520 + nvram_read_u8(prefix, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
521 + nvram_read_u8(prefix, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
522 +}
523 +
524 +static void bcm47xx_fill_sprom_r89(struct ssb_sprom *sprom, const char *prefix)
525 +{
526 + nvram_read_u8(prefix, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
527 + nvram_read_u8(prefix, NULL, "extpagain2g",
528 + &sprom->fem.ghz2.extpa_gain, 0);
529 + nvram_read_u8(prefix, NULL, "pdetrange2g",
530 + &sprom->fem.ghz2.pdet_range, 0);
531 + nvram_read_u8(prefix, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
532 + nvram_read_u8(prefix, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
533 + nvram_read_u8(prefix, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
534 + nvram_read_u8(prefix, NULL, "extpagain5g",
535 + &sprom->fem.ghz5.extpa_gain, 0);
536 + nvram_read_u8(prefix, NULL, "pdetrange5g",
537 + &sprom->fem.ghz5.pdet_range, 0);
538 + nvram_read_u8(prefix, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
539 + nvram_read_u8(prefix, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
540 + nvram_read_u8(prefix, NULL, "tempthresh", &sprom->tempthresh, 0);
541 + nvram_read_u8(prefix, NULL, "tempoffset", &sprom->tempoffset, 0);
542 + nvram_read_u16(prefix, NULL, "rawtempsense", &sprom->rawtempsense, 0);
543 + nvram_read_u8(prefix, NULL, "measpower", &sprom->measpower, 0);
544 + nvram_read_u8(prefix, NULL, "tempsense_slope",
545 + &sprom->tempsense_slope, 0);
546 + nvram_read_u8(prefix, NULL, "tempcorrx", &sprom->tempcorrx, 0);
547 + nvram_read_u8(prefix, NULL, "tempsense_option",
548 + &sprom->tempsense_option, 0);
549 + nvram_read_u8(prefix, NULL, "freqoffset_corr",
550 + &sprom->freqoffset_corr, 0);
551 + nvram_read_u8(prefix, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
552 + nvram_read_u8(prefix, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
553 + nvram_read_u8(prefix, NULL, "elna2g", &sprom->elna2g, 0);
554 + nvram_read_u8(prefix, NULL, "elna5g", &sprom->elna5g, 0);
555 + nvram_read_u8(prefix, NULL, "phycal_tempdelta",
556 + &sprom->phycal_tempdelta, 0);
557 + nvram_read_u8(prefix, NULL, "temps_period", &sprom->temps_period, 0);
558 + nvram_read_u8(prefix, NULL, "temps_hysteresis",
559 + &sprom->temps_hysteresis, 0);
560 + nvram_read_u8(prefix, NULL, "measpower1", &sprom->measpower1, 0);
561 + nvram_read_u8(prefix, NULL, "measpower2", &sprom->measpower2, 0);
562 + nvram_read_u8(prefix, NULL, "rxgainerr2ga0",
563 + &sprom->rxgainerr2ga[0], 0);
564 + nvram_read_u8(prefix, NULL, "rxgainerr2ga1",
565 + &sprom->rxgainerr2ga[1], 0);
566 + nvram_read_u8(prefix, NULL, "rxgainerr2ga2",
567 + &sprom->rxgainerr2ga[2], 0);
568 + nvram_read_u8(prefix, NULL, "rxgainerr5gla0",
569 + &sprom->rxgainerr5gla[0], 0);
570 + nvram_read_u8(prefix, NULL, "rxgainerr5gla1",
571 + &sprom->rxgainerr5gla[1], 0);
572 + nvram_read_u8(prefix, NULL, "rxgainerr5gla2",
573 + &sprom->rxgainerr5gla[2], 0);
574 + nvram_read_u8(prefix, NULL, "rxgainerr5gma0",
575 + &sprom->rxgainerr5gma[0], 0);
576 + nvram_read_u8(prefix, NULL, "rxgainerr5gma1",
577 + &sprom->rxgainerr5gma[1], 0);
578 + nvram_read_u8(prefix, NULL, "rxgainerr5gma2",
579 + &sprom->rxgainerr5gma[2], 0);
580 + nvram_read_u8(prefix, NULL, "rxgainerr5gha0",
581 + &sprom->rxgainerr5gha[0], 0);
582 + nvram_read_u8(prefix, NULL, "rxgainerr5gha1",
583 + &sprom->rxgainerr5gha[1], 0);
584 + nvram_read_u8(prefix, NULL, "rxgainerr5gha2",
585 + &sprom->rxgainerr5gha[2], 0);
586 + nvram_read_u8(prefix, NULL, "rxgainerr5gua0",
587 + &sprom->rxgainerr5gua[0], 0);
588 + nvram_read_u8(prefix, NULL, "rxgainerr5gua1",
589 + &sprom->rxgainerr5gua[1], 0);
590 + nvram_read_u8(prefix, NULL, "rxgainerr5gua2",
591 + &sprom->rxgainerr5gua[2], 0);
592 + nvram_read_u8(prefix, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
593 + nvram_read_u8(prefix, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
594 + nvram_read_u8(prefix, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
595 + nvram_read_u8(prefix, NULL, "noiselvl5gla0",
596 + &sprom->noiselvl5gla[0], 0);
597 + nvram_read_u8(prefix, NULL, "noiselvl5gla1",
598 + &sprom->noiselvl5gla[1], 0);
599 + nvram_read_u8(prefix, NULL, "noiselvl5gla2",
600 + &sprom->noiselvl5gla[2], 0);
601 + nvram_read_u8(prefix, NULL, "noiselvl5gma0",
602 + &sprom->noiselvl5gma[0], 0);
603 + nvram_read_u8(prefix, NULL, "noiselvl5gma1",
604 + &sprom->noiselvl5gma[1], 0);
605 + nvram_read_u8(prefix, NULL, "noiselvl5gma2",
606 + &sprom->noiselvl5gma[2], 0);
607 + nvram_read_u8(prefix, NULL, "noiselvl5gha0",
608 + &sprom->noiselvl5gha[0], 0);
609 + nvram_read_u8(prefix, NULL, "noiselvl5gha1",
610 + &sprom->noiselvl5gha[1], 0);
611 + nvram_read_u8(prefix, NULL, "noiselvl5gha2",
612 + &sprom->noiselvl5gha[2], 0);
613 + nvram_read_u8(prefix, NULL, "noiselvl5gua0",
614 + &sprom->noiselvl5gua[0], 0);
615 + nvram_read_u8(prefix, NULL, "noiselvl5gua1",
616 + &sprom->noiselvl5gua[1], 0);
617 + nvram_read_u8(prefix, NULL, "noiselvl5gua2",
618 + &sprom->noiselvl5gua[2], 0);
619 + nvram_read_u8(prefix, NULL, "pcieingress_war",
620 + &sprom->pcieingress_war, 0);
621 +}
622 +
623 +static void bcm47xx_fill_sprom_r9(struct ssb_sprom *sprom, const char *prefix)
624 +{
625 + nvram_read_u16(prefix, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
626 + nvram_read_u16(prefix, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
627 + nvram_read_u32(prefix, NULL, "legofdmbw202gpo",
628 + &sprom->legofdmbw202gpo, 0);
629 + nvram_read_u32(prefix, NULL, "legofdmbw20ul2gpo",
630 + &sprom->legofdmbw20ul2gpo, 0);
631 + nvram_read_u32(prefix, NULL, "legofdmbw205glpo",
632 + &sprom->legofdmbw205glpo, 0);
633 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5glpo",
634 + &sprom->legofdmbw20ul5glpo, 0);
635 + nvram_read_u32(prefix, NULL, "legofdmbw205gmpo",
636 + &sprom->legofdmbw205gmpo, 0);
637 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5gmpo",
638 + &sprom->legofdmbw20ul5gmpo, 0);
639 + nvram_read_u32(prefix, NULL, "legofdmbw205ghpo",
640 + &sprom->legofdmbw205ghpo, 0);
641 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5ghpo",
642 + &sprom->legofdmbw20ul5ghpo, 0);
643 + nvram_read_u32(prefix, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
644 + nvram_read_u32(prefix, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
645 + nvram_read_u32(prefix, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
646 + nvram_read_u32(prefix, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
647 + nvram_read_u32(prefix, NULL, "mcsbw20ul5glpo",
648 + &sprom->mcsbw20ul5glpo, 0);
649 + nvram_read_u32(prefix, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
650 + nvram_read_u32(prefix, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
651 + nvram_read_u32(prefix, NULL, "mcsbw20ul5gmpo",
652 + &sprom->mcsbw20ul5gmpo, 0);
653 + nvram_read_u32(prefix, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
654 + nvram_read_u32(prefix, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
655 + nvram_read_u32(prefix, NULL, "mcsbw20ul5ghpo",
656 + &sprom->mcsbw20ul5ghpo, 0);
657 + nvram_read_u32(prefix, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
658 + nvram_read_u16(prefix, NULL, "mcs32po", &sprom->mcs32po, 0);
659 + nvram_read_u16(prefix, NULL, "legofdm40duppo",
660 + &sprom->legofdm40duppo, 0);
661 + nvram_read_u8(prefix, NULL, "sar2g", &sprom->sar2g, 0);
662 + nvram_read_u8(prefix, NULL, "sar5g", &sprom->sar5g, 0);
663 +}
664 +
665 +static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
666 + const char *prefix)
667 +{
668 + char postfix[2];
669 + int i;
670 +
671 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
672 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
673 + snprintf(postfix, sizeof(postfix), "%i", i);
674 + nvram_read_u8(prefix, postfix, "maxp2ga",
675 + &pwr_info->maxpwr_2g, 0);
676 + nvram_read_u8(prefix, postfix, "itt2ga",
677 + &pwr_info->itssi_2g, 0);
678 + nvram_read_u8(prefix, postfix, "itt5ga",
679 + &pwr_info->itssi_5g, 0);
680 + nvram_read_u16(prefix, postfix, "pa2gw0a",
681 + &pwr_info->pa_2g[0], 0);
682 + nvram_read_u16(prefix, postfix, "pa2gw1a",
683 + &pwr_info->pa_2g[1], 0);
684 + nvram_read_u16(prefix, postfix, "pa2gw2a",
685 + &pwr_info->pa_2g[2], 0);
686 + nvram_read_u8(prefix, postfix, "maxp5ga",
687 + &pwr_info->maxpwr_5g, 0);
688 + nvram_read_u8(prefix, postfix, "maxp5gha",
689 + &pwr_info->maxpwr_5gh, 0);
690 + nvram_read_u8(prefix, postfix, "maxp5gla",
691 + &pwr_info->maxpwr_5gl, 0);
692 + nvram_read_u16(prefix, postfix, "pa5gw0a",
693 + &pwr_info->pa_5g[0], 0);
694 + nvram_read_u16(prefix, postfix, "pa5gw1a",
695 + &pwr_info->pa_5g[1], 0);
696 + nvram_read_u16(prefix, postfix, "pa5gw2a",
697 + &pwr_info->pa_5g[2], 0);
698 + nvram_read_u16(prefix, postfix, "pa5glw0a",
699 + &pwr_info->pa_5gl[0], 0);
700 + nvram_read_u16(prefix, postfix, "pa5glw1a",
701 + &pwr_info->pa_5gl[1], 0);
702 + nvram_read_u16(prefix, postfix, "pa5glw2a",
703 + &pwr_info->pa_5gl[2], 0);
704 + nvram_read_u16(prefix, postfix, "pa5ghw0a",
705 + &pwr_info->pa_5gh[0], 0);
706 + nvram_read_u16(prefix, postfix, "pa5ghw1a",
707 + &pwr_info->pa_5gh[1], 0);
708 + nvram_read_u16(prefix, postfix, "pa5ghw2a",
709 + &pwr_info->pa_5gh[2], 0);
710 + }
711 +}
712 +
713 +static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
714 + const char *prefix)
715 +{
716 + char postfix[2];
717 + int i;
718 +
719 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
720 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
721 + snprintf(postfix, sizeof(postfix), "%i", i);
722 + nvram_read_u16(prefix, postfix, "pa2gw3a",
723 + &pwr_info->pa_2g[3], 0);
724 + nvram_read_u16(prefix, postfix, "pa5gw3a",
725 + &pwr_info->pa_5g[3], 0);
726 + nvram_read_u16(prefix, postfix, "pa5glw3a",
727 + &pwr_info->pa_5gl[3], 0);
728 + nvram_read_u16(prefix, postfix, "pa5ghw3a",
729 + &pwr_info->pa_5gh[3], 0);
730 + }
731 +}
732 +
733 +void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix)
734 +{
735 + nvram_read_macaddr(prefix, "et0macaddr", &sprom->et0mac);
736 + nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0);
737 + nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
738 +
739 + nvram_read_macaddr(prefix, "et1macaddr", &sprom->et1mac);
740 + nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0);
741 + nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
742 +
743 + nvram_read_macaddr(prefix, "macaddr", &sprom->il0mac);
744 + nvram_read_macaddr(prefix, "il0macaddr", &sprom->il0mac);
745 +}
746 +
747 +void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
748 +{
749 + memset(sprom, 0, sizeof(struct ssb_sprom));
750 +
751 + bcm47xx_fill_sprom_ethernet(sprom, prefix);
752 +
753 + nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0);
754 +
755 + switch (sprom->revision) {
756 + case 1:
757 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
758 + bcm47xx_fill_sprom_r12389(sprom, prefix);
759 + bcm47xx_fill_sprom_r1(sprom, prefix);
760 + break;
761 + case 2:
762 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
763 + bcm47xx_fill_sprom_r12389(sprom, prefix);
764 + bcm47xx_fill_sprom_r2389(sprom, prefix);
765 + bcm47xx_fill_sprom_r2(sprom, prefix);
766 + break;
767 + case 3:
768 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
769 + bcm47xx_fill_sprom_r12389(sprom, prefix);
770 + bcm47xx_fill_sprom_r2389(sprom, prefix);
771 + bcm47xx_fill_sprom_r389(sprom, prefix);
772 + bcm47xx_fill_sprom_r3(sprom, prefix);
773 + break;
774 + case 4:
775 + case 5:
776 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
777 + bcm47xx_fill_sprom_r4589(sprom, prefix);
778 + bcm47xx_fill_sprom_r458(sprom, prefix);
779 + bcm47xx_fill_sprom_r45(sprom, prefix);
780 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
781 + bcm47xx_fill_sprom_path_r45(sprom, prefix);
782 + break;
783 + case 8:
784 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
785 + bcm47xx_fill_sprom_r12389(sprom, prefix);
786 + bcm47xx_fill_sprom_r2389(sprom, prefix);
787 + bcm47xx_fill_sprom_r389(sprom, prefix);
788 + bcm47xx_fill_sprom_r4589(sprom, prefix);
789 + bcm47xx_fill_sprom_r458(sprom, prefix);
790 + bcm47xx_fill_sprom_r89(sprom, prefix);
791 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
792 + break;
793 + case 9:
794 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
795 + bcm47xx_fill_sprom_r12389(sprom, prefix);
796 + bcm47xx_fill_sprom_r2389(sprom, prefix);
797 + bcm47xx_fill_sprom_r389(sprom, prefix);
798 + bcm47xx_fill_sprom_r4589(sprom, prefix);
799 + bcm47xx_fill_sprom_r89(sprom, prefix);
800 + bcm47xx_fill_sprom_r9(sprom, prefix);
801 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
802 + break;
803 + default:
804 + pr_warn("Unsupported SPROM revision %d detected. Will extract"
805 + " v1\n", sprom->revision);
806 + sprom->revision = 1;
807 + bcm47xx_fill_sprom_r1(sprom, prefix);
808 + }
809 +}
810 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
811 +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
812 @@ -44,4 +44,7 @@ union bcm47xx_bus {
813 extern union bcm47xx_bus bcm47xx_bus;
814 extern enum bcm47xx_bus_type bcm47xx_bus_type;
815
816 +void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix);
817 +void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix);
818 +
819 #endif /* __ASM_BCM47XX_H */