brcm47xx: update sprom patches like they are in the mainline kernel
[openwrt/svn-archive/archive.git] / target / linux / brcm47xx / patches-3.2 / 199-MIPS-BCM47XX-move-and-extend-sprom-parsing.patch
1 --- a/arch/mips/bcm47xx/Makefile
2 +++ b/arch/mips/bcm47xx/Makefile
3 @@ -3,5 +3,5 @@
4 # under Linux.
5 #
6
7 -obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o bus.o
8 +obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o bus.o sprom.o
9 obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o
10 --- a/arch/mips/bcm47xx/setup.c
11 +++ b/arch/mips/bcm47xx/setup.c
12 @@ -93,156 +93,7 @@ static void bcm47xx_machine_halt(void)
13 }
14
15 #ifdef CONFIG_BCM47XX_SSB
16 -#define READ_FROM_NVRAM(_outvar, name, buf) \
17 - if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
18 - sprom->_outvar = simple_strtoul(buf, NULL, 0);
19 -
20 -#define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
21 - if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
22 - nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
23 - sprom->_outvar = simple_strtoul(buf, NULL, 0);
24 -
25 -static inline int nvram_getprefix(const char *prefix, char *name,
26 - char *buf, int len)
27 -{
28 - if (prefix) {
29 - char key[100];
30 -
31 - snprintf(key, sizeof(key), "%s%s", prefix, name);
32 - return nvram_getenv(key, buf, len);
33 - }
34 -
35 - return nvram_getenv(name, buf, len);
36 -}
37 -
38 -static u32 nvram_getu32(const char *name, char *buf, int len)
39 -{
40 - int rv;
41 - char key[100];
42 - u16 var0, var1;
43 -
44 - snprintf(key, sizeof(key), "%s0", name);
45 - rv = nvram_getenv(key, buf, len);
46 - /* return 0 here so this looks like unset */
47 - if (rv < 0)
48 - return 0;
49 - var0 = simple_strtoul(buf, NULL, 0);
50 -
51 - snprintf(key, sizeof(key), "%s1", name);
52 - rv = nvram_getenv(key, buf, len);
53 - if (rv < 0)
54 - return 0;
55 - var1 = simple_strtoul(buf, NULL, 0);
56 - return var1 << 16 | var0;
57 -}
58 -
59 -static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
60 -{
61 - char buf[100];
62 - u32 boardflags;
63 -
64 - memset(sprom, 0, sizeof(struct ssb_sprom));
65 -
66 - sprom->revision = 1; /* Fallback: Old hardware does not define this. */
67 - READ_FROM_NVRAM(revision, "sromrev", buf);
68 - if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
69 - nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
70 - nvram_parse_macaddr(buf, sprom->il0mac);
71 - if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
72 - nvram_parse_macaddr(buf, sprom->et0mac);
73 - if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
74 - nvram_parse_macaddr(buf, sprom->et1mac);
75 - READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
76 - READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
77 - READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
78 - READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
79 - READ_FROM_NVRAM(board_rev, "boardrev", buf);
80 - READ_FROM_NVRAM(country_code, "ccode", buf);
81 - READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
82 - READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
83 - READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
84 - READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
85 - READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
86 - READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
87 - READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
88 - READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
89 - READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
90 - READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
91 - READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
92 - READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
93 - READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
94 - READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
95 - READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
96 - READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
97 - READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
98 - READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
99 - READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
100 - READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
101 - READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
102 - READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
103 - READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
104 - READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
105 - READ_FROM_NVRAM(tri2g, "tri2g", buf);
106 - READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
107 - READ_FROM_NVRAM(tri5g, "tri5g", buf);
108 - READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
109 - READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
110 - READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
111 - READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
112 - READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
113 - READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
114 - READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
115 - READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
116 - READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
117 - READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
118 - READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
119 - READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
120 - READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
121 - READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
122 - READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
123 - READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
124 - READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
125 - READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
126 - READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
127 - READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
128 - READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
129 - READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
130 - READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
131 - READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
132 - READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
133 - READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
134 - READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
135 - READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
136 -
137 - sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
138 - sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
139 - sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
140 - sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
141 -
142 - READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
143 - READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
144 - READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
145 - READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
146 - memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
147 - sizeof(sprom->antenna_gain.ghz5));
148 -
149 - if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
150 - boardflags = simple_strtoul(buf, NULL, 0);
151 - if (boardflags) {
152 - sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
153 - sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
154 - }
155 - }
156 - if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
157 - boardflags = simple_strtoul(buf, NULL, 0);
158 - if (boardflags) {
159 - sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
160 - sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
161 - }
162 - }
163 -}
164 -
165 -int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
166 +static int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
167 {
168 char prefix[10];
169
170 --- /dev/null
171 +++ b/arch/mips/bcm47xx/sprom.c
172 @@ -0,0 +1,620 @@
173 +/*
174 + * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
175 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
176 + * Copyright (C) 2006 Michael Buesch <m@bues.ch>
177 + * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
178 + * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
179 + *
180 + * This program is free software; you can redistribute it and/or modify it
181 + * under the terms of the GNU General Public License as published by the
182 + * Free Software Foundation; either version 2 of the License, or (at your
183 + * option) any later version.
184 + *
185 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
186 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
187 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
188 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
189 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
190 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
191 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
192 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
193 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
194 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
195 + *
196 + * You should have received a copy of the GNU General Public License along
197 + * with this program; if not, write to the Free Software Foundation, Inc.,
198 + * 675 Mass Ave, Cambridge, MA 02139, USA.
199 + */
200 +
201 +#include <bcm47xx.h>
202 +#include <nvram.h>
203 +
204 +static void create_key(const char *prefix, const char *postfix,
205 + const char *name, char *buf, int len)
206 +{
207 + if (prefix && postfix)
208 + snprintf(buf, len, "%s%s%s", prefix, name, postfix);
209 + else if (prefix)
210 + snprintf(buf, len, "%s%s", prefix, name);
211 + else if (postfix)
212 + snprintf(buf, len, "%s%s", name, postfix);
213 + else
214 + snprintf(buf, len, "%s", name);
215 +}
216 +
217 +#define NVRAM_READ_VAL(type) \
218 +static void nvram_read_ ## type (const char *prefix, \
219 + const char *postfix, const char *name, \
220 + type *val, type allset) \
221 +{ \
222 + char buf[100]; \
223 + char key[40]; \
224 + int err; \
225 + type var; \
226 + \
227 + create_key(prefix, postfix, name, key, sizeof(key)); \
228 + \
229 + err = nvram_getenv(key, buf, sizeof(buf)); \
230 + if (err < 0) \
231 + return; \
232 + err = kstrto ## type (buf, 0, &var); \
233 + if (err) { \
234 + pr_warn("can not parse nvram name %s with value %s" \
235 + " got %i", key, buf, err); \
236 + return; \
237 + } \
238 + if (allset && var == allset) \
239 + return; \
240 + *val = var; \
241 +}
242 +
243 +NVRAM_READ_VAL(u8)
244 +NVRAM_READ_VAL(s8)
245 +NVRAM_READ_VAL(u16)
246 +NVRAM_READ_VAL(u32)
247 +
248 +#undef NVRAM_READ_VAL
249 +
250 +static void nvram_read_u32_2(const char *prefix, const char *name,
251 + u16 *val_lo, u16 *val_hi)
252 +{
253 + char buf[100];
254 + char key[40];
255 + int err;
256 + u32 val;
257 +
258 + create_key(prefix, NULL, name, key, sizeof(key));
259 +
260 + err = nvram_getenv(key, buf, sizeof(buf));
261 + if (err < 0)
262 + return;
263 + err = kstrtou32(buf, 0, &val);
264 + if (err) {
265 + pr_warn("can not parse nvram name %s with value %s got %i",
266 + key, buf, err);
267 + return;
268 + }
269 + *val_lo = (val & 0x0000FFFFU);
270 + *val_hi = (val & 0xFFFF0000U) >> 16;
271 +}
272 +
273 +static void nvram_read_leddc(const char *prefix, const char *name,
274 + u8 *leddc_on_time, u8 *leddc_off_time)
275 +{
276 + char buf[100];
277 + char key[40];
278 + int err;
279 + u32 val;
280 +
281 + create_key(prefix, NULL, name, key, sizeof(key));
282 +
283 + err = nvram_getenv(key, buf, sizeof(buf));
284 + if (err < 0)
285 + return;
286 + err = kstrtou32(buf, 0, &val);
287 + if (err) {
288 + pr_warn("can not parse nvram name %s with value %s got %i",
289 + key, buf, err);
290 + return;
291 + }
292 +
293 + if (val == 0xffff || val == 0xffffffff)
294 + return;
295 +
296 + *leddc_on_time = val & 0xff;
297 + *leddc_off_time = (val >> 16) & 0xff;
298 +}
299 +
300 +static void nvram_read_macaddr(const char *prefix, const char *name,
301 + u8 (*val)[6])
302 +{
303 + char buf[100];
304 + char key[40];
305 + int err;
306 +
307 + create_key(prefix, NULL, name, key, sizeof(key));
308 +
309 + err = nvram_getenv(key, buf, sizeof(buf));
310 + if (err < 0)
311 + return;
312 + nvram_parse_macaddr(buf, *val);
313 +}
314 +
315 +static void nvram_read_alpha2(const char *prefix, const char *name,
316 + char (*val)[2])
317 +{
318 + char buf[10];
319 + char key[40];
320 + int err;
321 +
322 + create_key(prefix, NULL, name, key, sizeof(key));
323 +
324 + err = nvram_getenv(key, buf, sizeof(buf));
325 + if (err < 0)
326 + return;
327 + if (buf[0] == '0')
328 + return;
329 + if (strlen(buf) > 2) {
330 + pr_warn("alpha2 is too long %s", buf);
331 + return;
332 + }
333 + memcpy(val, buf, sizeof(val));
334 +}
335 +
336 +static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
337 + const char *prefix)
338 +{
339 + nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0);
340 + nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0);
341 + nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff);
342 + nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff);
343 + nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff);
344 + nvram_read_u8(prefix, NULL, "ledbh3", &sprom->gpio3, 0xff);
345 + nvram_read_u8(prefix, NULL, "aa2g", &sprom->ant_available_bg, 0);
346 + nvram_read_u8(prefix, NULL, "aa5g", &sprom->ant_available_a, 0);
347 + nvram_read_s8(prefix, NULL, "ag0", &sprom->antenna_gain.ghz24.a0, 0);
348 + nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.ghz24.a1, 0);
349 + nvram_read_alpha2(prefix, "ccode", &sprom->alpha2);
350 +}
351 +
352 +static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
353 + const char *prefix)
354 +{
355 + nvram_read_u16(prefix, NULL, "pa0b0", &sprom->pa0b0, 0);
356 + nvram_read_u16(prefix, NULL, "pa0b1", &sprom->pa0b1, 0);
357 + nvram_read_u16(prefix, NULL, "pa0b2", &sprom->pa0b2, 0);
358 + nvram_read_u8(prefix, NULL, "pa0itssit", &sprom->itssi_bg, 0);
359 + nvram_read_u8(prefix, NULL, "pa0maxpwr", &sprom->maxpwr_bg, 0);
360 + nvram_read_u16(prefix, NULL, "pa1b0", &sprom->pa1b0, 0);
361 + nvram_read_u16(prefix, NULL, "pa1b1", &sprom->pa1b1, 0);
362 + nvram_read_u16(prefix, NULL, "pa1b2", &sprom->pa1b2, 0);
363 + nvram_read_u8(prefix, NULL, "pa1itssit", &sprom->itssi_a, 0);
364 + nvram_read_u8(prefix, NULL, "pa1maxpwr", &sprom->maxpwr_a, 0);
365 +}
366 +
367 +static void bcm47xx_fill_sprom_r1(struct ssb_sprom *sprom, const char *prefix)
368 +{
369 + nvram_read_u16(prefix, NULL, "boardflags", &sprom->boardflags_lo, 0);
370 + nvram_read_u8(prefix, NULL, "cc", &sprom->country_code, 0);
371 +}
372 +
373 +static void bcm47xx_fill_sprom_r2389(struct ssb_sprom *sprom,
374 + const char *prefix)
375 +{
376 + nvram_read_u8(prefix, NULL, "opo", &sprom->opo, 0);
377 + nvram_read_u16(prefix, NULL, "pa1lob0", &sprom->pa1lob0, 0);
378 + nvram_read_u16(prefix, NULL, "pa1lob1", &sprom->pa1lob1, 0);
379 + nvram_read_u16(prefix, NULL, "pa1lob2", &sprom->pa1lob2, 0);
380 + nvram_read_u16(prefix, NULL, "pa1hib0", &sprom->pa1hib0, 0);
381 + nvram_read_u16(prefix, NULL, "pa1hib1", &sprom->pa1hib1, 0);
382 + nvram_read_u16(prefix, NULL, "pa1hib2", &sprom->pa1hib2, 0);
383 + nvram_read_u8(prefix, NULL, "pa1lomaxpwr", &sprom->maxpwr_al, 0);
384 + nvram_read_u8(prefix, NULL, "pa1himaxpwr", &sprom->maxpwr_ah, 0);
385 +}
386 +
387 +static void bcm47xx_fill_sprom_r2(struct ssb_sprom *sprom, const char *prefix)
388 +{
389 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
390 + &sprom->boardflags_hi);
391 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
392 +}
393 +
394 +static void bcm47xx_fill_sprom_r389(struct ssb_sprom *sprom, const char *prefix)
395 +{
396 + nvram_read_u8(prefix, NULL, "bxa2g", &sprom->bxa2g, 0);
397 + nvram_read_u8(prefix, NULL, "rssisav2g", &sprom->rssisav2g, 0);
398 + nvram_read_u8(prefix, NULL, "rssismc2g", &sprom->rssismc2g, 0);
399 + nvram_read_u8(prefix, NULL, "rssismf2g", &sprom->rssismf2g, 0);
400 + nvram_read_u8(prefix, NULL, "bxa5g", &sprom->bxa5g, 0);
401 + nvram_read_u8(prefix, NULL, "rssisav5g", &sprom->rssisav5g, 0);
402 + nvram_read_u8(prefix, NULL, "rssismc5g", &sprom->rssismc5g, 0);
403 + nvram_read_u8(prefix, NULL, "rssismf5g", &sprom->rssismf5g, 0);
404 + nvram_read_u8(prefix, NULL, "tri2g", &sprom->tri2g, 0);
405 + nvram_read_u8(prefix, NULL, "tri5g", &sprom->tri5g, 0);
406 + nvram_read_u8(prefix, NULL, "tri5gl", &sprom->tri5gl, 0);
407 + nvram_read_u8(prefix, NULL, "tri5gh", &sprom->tri5gh, 0);
408 + nvram_read_s8(prefix, NULL, "rxpo2g", &sprom->rxpo2g, 0);
409 + nvram_read_s8(prefix, NULL, "rxpo5g", &sprom->rxpo5g, 0);
410 +}
411 +
412 +static void bcm47xx_fill_sprom_r3(struct ssb_sprom *sprom, const char *prefix)
413 +{
414 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
415 + &sprom->boardflags_hi);
416 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
417 + nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
418 + nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
419 + &sprom->leddc_off_time);
420 +}
421 +
422 +static void bcm47xx_fill_sprom_r4589(struct ssb_sprom *sprom,
423 + const char *prefix)
424 +{
425 + nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
426 + &sprom->boardflags_hi);
427 + nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
428 + &sprom->boardflags2_hi);
429 + nvram_read_u16(prefix, NULL, "boardtype", &sprom->board_type, 0);
430 + nvram_read_u8(prefix, NULL, "regrev", &sprom->regrev, 0);
431 + nvram_read_s8(prefix, NULL, "ag2", &sprom->antenna_gain.ghz24.a2, 0);
432 + nvram_read_s8(prefix, NULL, "ag3", &sprom->antenna_gain.ghz24.a3, 0);
433 + nvram_read_u8(prefix, NULL, "txchain", &sprom->txchain, 0xf);
434 + nvram_read_u8(prefix, NULL, "rxchain", &sprom->rxchain, 0xf);
435 + nvram_read_u8(prefix, NULL, "antswitch", &sprom->antswitch, 0xff);
436 + nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
437 + &sprom->leddc_off_time);
438 +}
439 +
440 +static void bcm47xx_fill_sprom_r458(struct ssb_sprom *sprom, const char *prefix)
441 +{
442 + nvram_read_u16(prefix, NULL, "cck2gpo", &sprom->cck2gpo, 0);
443 + nvram_read_u32(prefix, NULL, "ofdm2gpo", &sprom->ofdm2gpo, 0);
444 + nvram_read_u32(prefix, NULL, "ofdm5gpo", &sprom->ofdm5gpo, 0);
445 + nvram_read_u32(prefix, NULL, "ofdm5glpo", &sprom->ofdm5glpo, 0);
446 + nvram_read_u32(prefix, NULL, "ofdm5ghpo", &sprom->ofdm5ghpo, 0);
447 + nvram_read_u16(prefix, NULL, "cddpo", &sprom->cddpo, 0);
448 + nvram_read_u16(prefix, NULL, "stbcpo", &sprom->stbcpo, 0);
449 + nvram_read_u16(prefix, NULL, "bw40po", &sprom->bw40po, 0);
450 + nvram_read_u16(prefix, NULL, "bwduppo", &sprom->bwduppo, 0);
451 + nvram_read_u16(prefix, NULL, "mcs2gpo0", &sprom->mcs2gpo[0], 0);
452 + nvram_read_u16(prefix, NULL, "mcs2gpo1", &sprom->mcs2gpo[1], 0);
453 + nvram_read_u16(prefix, NULL, "mcs2gpo2", &sprom->mcs2gpo[2], 0);
454 + nvram_read_u16(prefix, NULL, "mcs2gpo3", &sprom->mcs2gpo[3], 0);
455 + nvram_read_u16(prefix, NULL, "mcs2gpo4", &sprom->mcs2gpo[4], 0);
456 + nvram_read_u16(prefix, NULL, "mcs2gpo5", &sprom->mcs2gpo[5], 0);
457 + nvram_read_u16(prefix, NULL, "mcs2gpo6", &sprom->mcs2gpo[6], 0);
458 + nvram_read_u16(prefix, NULL, "mcs2gpo7", &sprom->mcs2gpo[7], 0);
459 + nvram_read_u16(prefix, NULL, "mcs5gpo0", &sprom->mcs5gpo[0], 0);
460 + nvram_read_u16(prefix, NULL, "mcs5gpo1", &sprom->mcs5gpo[1], 0);
461 + nvram_read_u16(prefix, NULL, "mcs5gpo2", &sprom->mcs5gpo[2], 0);
462 + nvram_read_u16(prefix, NULL, "mcs5gpo3", &sprom->mcs5gpo[3], 0);
463 + nvram_read_u16(prefix, NULL, "mcs5gpo4", &sprom->mcs5gpo[4], 0);
464 + nvram_read_u16(prefix, NULL, "mcs5gpo5", &sprom->mcs5gpo[5], 0);
465 + nvram_read_u16(prefix, NULL, "mcs5gpo6", &sprom->mcs5gpo[6], 0);
466 + nvram_read_u16(prefix, NULL, "mcs5gpo7", &sprom->mcs5gpo[7], 0);
467 + nvram_read_u16(prefix, NULL, "mcs5glpo0", &sprom->mcs5glpo[0], 0);
468 + nvram_read_u16(prefix, NULL, "mcs5glpo1", &sprom->mcs5glpo[1], 0);
469 + nvram_read_u16(prefix, NULL, "mcs5glpo2", &sprom->mcs5glpo[2], 0);
470 + nvram_read_u16(prefix, NULL, "mcs5glpo3", &sprom->mcs5glpo[3], 0);
471 + nvram_read_u16(prefix, NULL, "mcs5glpo4", &sprom->mcs5glpo[4], 0);
472 + nvram_read_u16(prefix, NULL, "mcs5glpo5", &sprom->mcs5glpo[5], 0);
473 + nvram_read_u16(prefix, NULL, "mcs5glpo6", &sprom->mcs5glpo[6], 0);
474 + nvram_read_u16(prefix, NULL, "mcs5glpo7", &sprom->mcs5glpo[7], 0);
475 + nvram_read_u16(prefix, NULL, "mcs5ghpo0", &sprom->mcs5ghpo[0], 0);
476 + nvram_read_u16(prefix, NULL, "mcs5ghpo1", &sprom->mcs5ghpo[1], 0);
477 + nvram_read_u16(prefix, NULL, "mcs5ghpo2", &sprom->mcs5ghpo[2], 0);
478 + nvram_read_u16(prefix, NULL, "mcs5ghpo3", &sprom->mcs5ghpo[3], 0);
479 + nvram_read_u16(prefix, NULL, "mcs5ghpo4", &sprom->mcs5ghpo[4], 0);
480 + nvram_read_u16(prefix, NULL, "mcs5ghpo5", &sprom->mcs5ghpo[5], 0);
481 + nvram_read_u16(prefix, NULL, "mcs5ghpo6", &sprom->mcs5ghpo[6], 0);
482 + nvram_read_u16(prefix, NULL, "mcs5ghpo7", &sprom->mcs5ghpo[7], 0);
483 +}
484 +
485 +static void bcm47xx_fill_sprom_r45(struct ssb_sprom *sprom, const char *prefix)
486 +{
487 + nvram_read_u8(prefix, NULL, "txpid2ga0", &sprom->txpid2g[0], 0);
488 + nvram_read_u8(prefix, NULL, "txpid2ga1", &sprom->txpid2g[1], 0);
489 + nvram_read_u8(prefix, NULL, "txpid2ga2", &sprom->txpid2g[2], 0);
490 + nvram_read_u8(prefix, NULL, "txpid2ga3", &sprom->txpid2g[3], 0);
491 + nvram_read_u8(prefix, NULL, "txpid5ga0", &sprom->txpid5g[0], 0);
492 + nvram_read_u8(prefix, NULL, "txpid5ga1", &sprom->txpid5g[1], 0);
493 + nvram_read_u8(prefix, NULL, "txpid5ga2", &sprom->txpid5g[2], 0);
494 + nvram_read_u8(prefix, NULL, "txpid5ga3", &sprom->txpid5g[3], 0);
495 + nvram_read_u8(prefix, NULL, "txpid5gla0", &sprom->txpid5gl[0], 0);
496 + nvram_read_u8(prefix, NULL, "txpid5gla1", &sprom->txpid5gl[1], 0);
497 + nvram_read_u8(prefix, NULL, "txpid5gla2", &sprom->txpid5gl[2], 0);
498 + nvram_read_u8(prefix, NULL, "txpid5gla3", &sprom->txpid5gl[3], 0);
499 + nvram_read_u8(prefix, NULL, "txpid5gha0", &sprom->txpid5gh[0], 0);
500 + nvram_read_u8(prefix, NULL, "txpid5gha1", &sprom->txpid5gh[1], 0);
501 + nvram_read_u8(prefix, NULL, "txpid5gha2", &sprom->txpid5gh[2], 0);
502 + nvram_read_u8(prefix, NULL, "txpid5gha3", &sprom->txpid5gh[3], 0);
503 +}
504 +
505 +static void bcm47xx_fill_sprom_r89(struct ssb_sprom *sprom, const char *prefix)
506 +{
507 + nvram_read_u8(prefix, NULL, "tssipos2g", &sprom->fem.ghz2.tssipos, 0);
508 + nvram_read_u8(prefix, NULL, "extpagain2g",
509 + &sprom->fem.ghz2.extpa_gain, 0);
510 + nvram_read_u8(prefix, NULL, "pdetrange2g",
511 + &sprom->fem.ghz2.pdet_range, 0);
512 + nvram_read_u8(prefix, NULL, "triso2g", &sprom->fem.ghz2.tr_iso, 0);
513 + nvram_read_u8(prefix, NULL, "antswctl2g", &sprom->fem.ghz2.antswlut, 0);
514 + nvram_read_u8(prefix, NULL, "tssipos5g", &sprom->fem.ghz5.tssipos, 0);
515 + nvram_read_u8(prefix, NULL, "extpagain5g",
516 + &sprom->fem.ghz5.extpa_gain, 0);
517 + nvram_read_u8(prefix, NULL, "pdetrange5g",
518 + &sprom->fem.ghz5.pdet_range, 0);
519 + nvram_read_u8(prefix, NULL, "triso5g", &sprom->fem.ghz5.tr_iso, 0);
520 + nvram_read_u8(prefix, NULL, "antswctl5g", &sprom->fem.ghz5.antswlut, 0);
521 + nvram_read_u8(prefix, NULL, "tempthresh", &sprom->tempthresh, 0);
522 + nvram_read_u8(prefix, NULL, "tempoffset", &sprom->tempoffset, 0);
523 + nvram_read_u16(prefix, NULL, "rawtempsense", &sprom->rawtempsense, 0);
524 + nvram_read_u8(prefix, NULL, "measpower", &sprom->measpower, 0);
525 + nvram_read_u8(prefix, NULL, "tempsense_slope",
526 + &sprom->tempsense_slope, 0);
527 + nvram_read_u8(prefix, NULL, "tempcorrx", &sprom->tempcorrx, 0);
528 + nvram_read_u8(prefix, NULL, "tempsense_option",
529 + &sprom->tempsense_option, 0);
530 + nvram_read_u8(prefix, NULL, "freqoffset_corr",
531 + &sprom->freqoffset_corr, 0);
532 + nvram_read_u8(prefix, NULL, "iqcal_swp_dis", &sprom->iqcal_swp_dis, 0);
533 + nvram_read_u8(prefix, NULL, "hw_iqcal_en", &sprom->hw_iqcal_en, 0);
534 + nvram_read_u8(prefix, NULL, "elna2g", &sprom->elna2g, 0);
535 + nvram_read_u8(prefix, NULL, "elna5g", &sprom->elna5g, 0);
536 + nvram_read_u8(prefix, NULL, "phycal_tempdelta",
537 + &sprom->phycal_tempdelta, 0);
538 + nvram_read_u8(prefix, NULL, "temps_period", &sprom->temps_period, 0);
539 + nvram_read_u8(prefix, NULL, "temps_hysteresis",
540 + &sprom->temps_hysteresis, 0);
541 + nvram_read_u8(prefix, NULL, "measpower1", &sprom->measpower1, 0);
542 + nvram_read_u8(prefix, NULL, "measpower2", &sprom->measpower2, 0);
543 + nvram_read_u8(prefix, NULL, "rxgainerr2ga0",
544 + &sprom->rxgainerr2ga[0], 0);
545 + nvram_read_u8(prefix, NULL, "rxgainerr2ga1",
546 + &sprom->rxgainerr2ga[1], 0);
547 + nvram_read_u8(prefix, NULL, "rxgainerr2ga2",
548 + &sprom->rxgainerr2ga[2], 0);
549 + nvram_read_u8(prefix, NULL, "rxgainerr5gla0",
550 + &sprom->rxgainerr5gla[0], 0);
551 + nvram_read_u8(prefix, NULL, "rxgainerr5gla1",
552 + &sprom->rxgainerr5gla[1], 0);
553 + nvram_read_u8(prefix, NULL, "rxgainerr5gla2",
554 + &sprom->rxgainerr5gla[2], 0);
555 + nvram_read_u8(prefix, NULL, "rxgainerr5gma0",
556 + &sprom->rxgainerr5gma[0], 0);
557 + nvram_read_u8(prefix, NULL, "rxgainerr5gma1",
558 + &sprom->rxgainerr5gma[1], 0);
559 + nvram_read_u8(prefix, NULL, "rxgainerr5gma2",
560 + &sprom->rxgainerr5gma[2], 0);
561 + nvram_read_u8(prefix, NULL, "rxgainerr5gha0",
562 + &sprom->rxgainerr5gha[0], 0);
563 + nvram_read_u8(prefix, NULL, "rxgainerr5gha1",
564 + &sprom->rxgainerr5gha[1], 0);
565 + nvram_read_u8(prefix, NULL, "rxgainerr5gha2",
566 + &sprom->rxgainerr5gha[2], 0);
567 + nvram_read_u8(prefix, NULL, "rxgainerr5gua0",
568 + &sprom->rxgainerr5gua[0], 0);
569 + nvram_read_u8(prefix, NULL, "rxgainerr5gua1",
570 + &sprom->rxgainerr5gua[1], 0);
571 + nvram_read_u8(prefix, NULL, "rxgainerr5gua2",
572 + &sprom->rxgainerr5gua[2], 0);
573 + nvram_read_u8(prefix, NULL, "noiselvl2ga0", &sprom->noiselvl2ga[0], 0);
574 + nvram_read_u8(prefix, NULL, "noiselvl2ga1", &sprom->noiselvl2ga[1], 0);
575 + nvram_read_u8(prefix, NULL, "noiselvl2ga2", &sprom->noiselvl2ga[2], 0);
576 + nvram_read_u8(prefix, NULL, "noiselvl5gla0",
577 + &sprom->noiselvl5gla[0], 0);
578 + nvram_read_u8(prefix, NULL, "noiselvl5gla1",
579 + &sprom->noiselvl5gla[1], 0);
580 + nvram_read_u8(prefix, NULL, "noiselvl5gla2",
581 + &sprom->noiselvl5gla[2], 0);
582 + nvram_read_u8(prefix, NULL, "noiselvl5gma0",
583 + &sprom->noiselvl5gma[0], 0);
584 + nvram_read_u8(prefix, NULL, "noiselvl5gma1",
585 + &sprom->noiselvl5gma[1], 0);
586 + nvram_read_u8(prefix, NULL, "noiselvl5gma2",
587 + &sprom->noiselvl5gma[2], 0);
588 + nvram_read_u8(prefix, NULL, "noiselvl5gha0",
589 + &sprom->noiselvl5gha[0], 0);
590 + nvram_read_u8(prefix, NULL, "noiselvl5gha1",
591 + &sprom->noiselvl5gha[1], 0);
592 + nvram_read_u8(prefix, NULL, "noiselvl5gha2",
593 + &sprom->noiselvl5gha[2], 0);
594 + nvram_read_u8(prefix, NULL, "noiselvl5gua0",
595 + &sprom->noiselvl5gua[0], 0);
596 + nvram_read_u8(prefix, NULL, "noiselvl5gua1",
597 + &sprom->noiselvl5gua[1], 0);
598 + nvram_read_u8(prefix, NULL, "noiselvl5gua2",
599 + &sprom->noiselvl5gua[2], 0);
600 + nvram_read_u8(prefix, NULL, "pcieingress_war",
601 + &sprom->pcieingress_war, 0);
602 +}
603 +
604 +static void bcm47xx_fill_sprom_r9(struct ssb_sprom *sprom, const char *prefix)
605 +{
606 + nvram_read_u16(prefix, NULL, "cckbw202gpo", &sprom->cckbw202gpo, 0);
607 + nvram_read_u16(prefix, NULL, "cckbw20ul2gpo", &sprom->cckbw20ul2gpo, 0);
608 + nvram_read_u32(prefix, NULL, "legofdmbw202gpo",
609 + &sprom->legofdmbw202gpo, 0);
610 + nvram_read_u32(prefix, NULL, "legofdmbw20ul2gpo",
611 + &sprom->legofdmbw20ul2gpo, 0);
612 + nvram_read_u32(prefix, NULL, "legofdmbw205glpo",
613 + &sprom->legofdmbw205glpo, 0);
614 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5glpo",
615 + &sprom->legofdmbw20ul5glpo, 0);
616 + nvram_read_u32(prefix, NULL, "legofdmbw205gmpo",
617 + &sprom->legofdmbw205gmpo, 0);
618 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5gmpo",
619 + &sprom->legofdmbw20ul5gmpo, 0);
620 + nvram_read_u32(prefix, NULL, "legofdmbw205ghpo",
621 + &sprom->legofdmbw205ghpo, 0);
622 + nvram_read_u32(prefix, NULL, "legofdmbw20ul5ghpo",
623 + &sprom->legofdmbw20ul5ghpo, 0);
624 + nvram_read_u32(prefix, NULL, "mcsbw202gpo", &sprom->mcsbw202gpo, 0);
625 + nvram_read_u32(prefix, NULL, "mcsbw20ul2gpo", &sprom->mcsbw20ul2gpo, 0);
626 + nvram_read_u32(prefix, NULL, "mcsbw402gpo", &sprom->mcsbw402gpo, 0);
627 + nvram_read_u32(prefix, NULL, "mcsbw205glpo", &sprom->mcsbw205glpo, 0);
628 + nvram_read_u32(prefix, NULL, "mcsbw20ul5glpo",
629 + &sprom->mcsbw20ul5glpo, 0);
630 + nvram_read_u32(prefix, NULL, "mcsbw405glpo", &sprom->mcsbw405glpo, 0);
631 + nvram_read_u32(prefix, NULL, "mcsbw205gmpo", &sprom->mcsbw205gmpo, 0);
632 + nvram_read_u32(prefix, NULL, "mcsbw20ul5gmpo",
633 + &sprom->mcsbw20ul5gmpo, 0);
634 + nvram_read_u32(prefix, NULL, "mcsbw405gmpo", &sprom->mcsbw405gmpo, 0);
635 + nvram_read_u32(prefix, NULL, "mcsbw205ghpo", &sprom->mcsbw205ghpo, 0);
636 + nvram_read_u32(prefix, NULL, "mcsbw20ul5ghpo",
637 + &sprom->mcsbw20ul5ghpo, 0);
638 + nvram_read_u32(prefix, NULL, "mcsbw405ghpo", &sprom->mcsbw405ghpo, 0);
639 + nvram_read_u16(prefix, NULL, "mcs32po", &sprom->mcs32po, 0);
640 + nvram_read_u16(prefix, NULL, "legofdm40duppo",
641 + &sprom->legofdm40duppo, 0);
642 + nvram_read_u8(prefix, NULL, "sar2g", &sprom->sar2g, 0);
643 + nvram_read_u8(prefix, NULL, "sar5g", &sprom->sar5g, 0);
644 +}
645 +
646 +static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
647 + const char *prefix)
648 +{
649 + char postfix[2];
650 + int i;
651 +
652 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
653 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
654 + snprintf(postfix, sizeof(postfix), "%i", i);
655 + nvram_read_u8(prefix, postfix, "maxp2ga",
656 + &pwr_info->maxpwr_2g, 0);
657 + nvram_read_u8(prefix, postfix, "itt2ga",
658 + &pwr_info->itssi_2g, 0);
659 + nvram_read_u8(prefix, postfix, "itt5ga",
660 + &pwr_info->itssi_5g, 0);
661 + nvram_read_u16(prefix, postfix, "pa2gw0a",
662 + &pwr_info->pa_2g[0], 0);
663 + nvram_read_u16(prefix, postfix, "pa2gw1a",
664 + &pwr_info->pa_2g[1], 0);
665 + nvram_read_u16(prefix, postfix, "pa2gw2a",
666 + &pwr_info->pa_2g[2], 0);
667 + nvram_read_u8(prefix, postfix, "maxp5ga",
668 + &pwr_info->maxpwr_5g, 0);
669 + nvram_read_u8(prefix, postfix, "maxp5gha",
670 + &pwr_info->maxpwr_5gh, 0);
671 + nvram_read_u8(prefix, postfix, "maxp5gla",
672 + &pwr_info->maxpwr_5gl, 0);
673 + nvram_read_u16(prefix, postfix, "pa5gw0a",
674 + &pwr_info->pa_5g[0], 0);
675 + nvram_read_u16(prefix, postfix, "pa5gw1a",
676 + &pwr_info->pa_5g[1], 0);
677 + nvram_read_u16(prefix, postfix, "pa5gw2a",
678 + &pwr_info->pa_5g[2], 0);
679 + nvram_read_u16(prefix, postfix, "pa5glw0a",
680 + &pwr_info->pa_5gl[0], 0);
681 + nvram_read_u16(prefix, postfix, "pa5glw1a",
682 + &pwr_info->pa_5gl[1], 0);
683 + nvram_read_u16(prefix, postfix, "pa5glw2a",
684 + &pwr_info->pa_5gl[2], 0);
685 + nvram_read_u16(prefix, postfix, "pa5ghw0a",
686 + &pwr_info->pa_5gh[0], 0);
687 + nvram_read_u16(prefix, postfix, "pa5ghw1a",
688 + &pwr_info->pa_5gh[1], 0);
689 + nvram_read_u16(prefix, postfix, "pa5ghw2a",
690 + &pwr_info->pa_5gh[2], 0);
691 + }
692 +}
693 +
694 +static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
695 + const char *prefix)
696 +{
697 + char postfix[2];
698 + int i;
699 +
700 + for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
701 + struct ssb_sprom_core_pwr_info *pwr_info = &sprom->core_pwr_info[i];
702 + snprintf(postfix, sizeof(postfix), "%i", i);
703 + nvram_read_u16(prefix, postfix, "pa2gw3a",
704 + &pwr_info->pa_2g[3], 0);
705 + nvram_read_u16(prefix, postfix, "pa5gw3a",
706 + &pwr_info->pa_5g[3], 0);
707 + nvram_read_u16(prefix, postfix, "pa5glw3a",
708 + &pwr_info->pa_5gl[3], 0);
709 + nvram_read_u16(prefix, postfix, "pa5ghw3a",
710 + &pwr_info->pa_5gh[3], 0);
711 + }
712 +}
713 +
714 +void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix)
715 +{
716 + nvram_read_macaddr(prefix, "et0macaddr", &sprom->et0mac);
717 + nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0);
718 + nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0);
719 +
720 + nvram_read_macaddr(prefix, "et1macaddr", &sprom->et1mac);
721 + nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0);
722 + nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0);
723 +
724 + nvram_read_macaddr(prefix, "macaddr", &sprom->il0mac);
725 + nvram_read_macaddr(prefix, "il0macaddr", &sprom->il0mac);
726 +}
727 +
728 +void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
729 +{
730 + memset(sprom, 0, sizeof(struct ssb_sprom));
731 +
732 + bcm47xx_fill_sprom_ethernet(sprom, prefix);
733 +
734 + nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0);
735 +
736 + switch (sprom->revision) {
737 + case 1:
738 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
739 + bcm47xx_fill_sprom_r12389(sprom, prefix);
740 + bcm47xx_fill_sprom_r1(sprom, prefix);
741 + break;
742 + case 2:
743 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
744 + bcm47xx_fill_sprom_r12389(sprom, prefix);
745 + bcm47xx_fill_sprom_r2389(sprom, prefix);
746 + bcm47xx_fill_sprom_r2(sprom, prefix);
747 + break;
748 + case 3:
749 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
750 + bcm47xx_fill_sprom_r12389(sprom, prefix);
751 + bcm47xx_fill_sprom_r2389(sprom, prefix);
752 + bcm47xx_fill_sprom_r389(sprom, prefix);
753 + bcm47xx_fill_sprom_r3(sprom, prefix);
754 + break;
755 + case 4:
756 + case 5:
757 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
758 + bcm47xx_fill_sprom_r4589(sprom, prefix);
759 + bcm47xx_fill_sprom_r458(sprom, prefix);
760 + bcm47xx_fill_sprom_r45(sprom, prefix);
761 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
762 + bcm47xx_fill_sprom_path_r45(sprom, prefix);
763 + break;
764 + case 8:
765 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
766 + bcm47xx_fill_sprom_r12389(sprom, prefix);
767 + bcm47xx_fill_sprom_r2389(sprom, prefix);
768 + bcm47xx_fill_sprom_r389(sprom, prefix);
769 + bcm47xx_fill_sprom_r4589(sprom, prefix);
770 + bcm47xx_fill_sprom_r458(sprom, prefix);
771 + bcm47xx_fill_sprom_r89(sprom, prefix);
772 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
773 + break;
774 + case 9:
775 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
776 + bcm47xx_fill_sprom_r12389(sprom, prefix);
777 + bcm47xx_fill_sprom_r2389(sprom, prefix);
778 + bcm47xx_fill_sprom_r389(sprom, prefix);
779 + bcm47xx_fill_sprom_r4589(sprom, prefix);
780 + bcm47xx_fill_sprom_r89(sprom, prefix);
781 + bcm47xx_fill_sprom_r9(sprom, prefix);
782 + bcm47xx_fill_sprom_path_r4589(sprom, prefix);
783 + break;
784 + default:
785 + pr_warn("Unsupported SPROM revision %d detected. Will extract"
786 + " v1\n", sprom->revision);
787 + sprom->revision = 1;
788 + bcm47xx_fill_sprom_r1234589(sprom, prefix);
789 + bcm47xx_fill_sprom_r12389(sprom, prefix);
790 + bcm47xx_fill_sprom_r1(sprom, prefix);
791 + }
792 +}
793 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
794 +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
795 @@ -44,4 +44,7 @@ union bcm47xx_bus {
796 extern union bcm47xx_bus bcm47xx_bus;
797 extern enum bcm47xx_bus_type bcm47xx_bus_type;
798
799 +void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix);
800 +void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix);
801 +
802 #endif /* __ASM_BCM47XX_H */