target/linux/brcm47xx/patches-3.6/549-ssb-get-alp-clock-from-devices-with-PMU.patch

   1 --- a/drivers/ssb/driver_chipcommon.c
   2 +++ b/drivers/ssb/driver_chipcommon.c
   3 @@ -280,6 +280,14 @@ static void calc_fast_powerup_delay(stru
   4         cc->fast_pwrup_delay = tmp;
   5  }
   6
   7 +static u32 ssb_chipco_alp_clock(struct ssb_chipcommon *cc)
   8 +{
   9 +       if (cc->capabilities & SSB_CHIPCO_CAP_PMU)
  10 +               return ssb_pmu_get_alp_clock(cc);
  11 +
  12 +       return 20000000;
  13 +}
  14 +
  15  void ssb_chipcommon_init(struct ssb_chipcommon *cc)
  16  {
  17         if (!cc->dev)
  18 @@ -474,11 +482,7 @@ int ssb_chipco_serial_init(struct ssb_ch
  19                                        | SSB_CHIPCO_CORECTL_UARTCLK0);
  20                 } else if ((ccrev >= 11) && (ccrev != 15)) {
  21                         /* Fixed ALP clock */
  22 -                       baud_base = 20000000;
  23 -                       if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
  24 -                               /* FIXME: baud_base is different for devices with a PMU */
  25 -                               SSB_WARN_ON(1);
  26 -                       }
  27 +                       baud_base = ssb_chipco_alp_clock(cc);
  28                         div = 1;
  29                         if (ccrev >= 21) {
  30                                 /* Turn off UART clock before switching clocksource. */
  31 --- a/drivers/ssb/driver_chipcommon_pmu.c
  32 +++ b/drivers/ssb/driver_chipcommon_pmu.c
  33 @@ -618,6 +618,33 @@ void ssb_pmu_set_ldo_paref(struct ssb_ch
  34  EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
  35  EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
  36
  37 +static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc)
  38 +{
  39 +       u32 crystalfreq;
  40 +       const struct pmu0_plltab_entry *e = NULL;
  41 +
  42 +       crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
  43 +                     SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
  44 +       e = pmu0_plltab_find_entry(crystalfreq);
  45 +       BUG_ON(!e);
  46 +       return e->freq * 1000;
  47 +}
  48 +
  49 +u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
  50 +{
  51 +       struct ssb_bus *bus = cc->dev->bus;
  52 +
  53 +       switch (bus->chip_id) {
  54 +       case 0x5354:
  55 +               ssb_pmu_get_alp_clock_clk0(cc);
  56 +       default:
  57 +               ssb_printk(KERN_ERR PFX
  58 +                          "ERROR: PMU alp clock unknown for device %04X\n",
  59 +                          bus->chip_id);
  60 +               return 0;
  61 +       }
  62 +}
  63 +
  64  u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
  65  {
  66         struct ssb_bus *bus = cc->dev->bus;
  67 --- a/drivers/ssb/ssb_private.h
  68 +++ b/drivers/ssb/ssb_private.h
  69 @@ -210,6 +210,7 @@ static inline void b43_pci_ssb_bridge_ex
  70  /* driver_chipcommon_pmu.c */
  71  extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc);
  72  extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc);
  73 +extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc);
  74
  75  #ifdef CONFIG_SSB_SFLASH
  76  /* driver_chipcommon_sflash.c */