brcm63xx: register interrupt-controllers through DT when possible
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / dts / bcm6362.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6362";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 cpu@0 {
11 compatible = "brcm,bmips4350", "mips,mips4Kc";
12 device_type = "cpu";
13 reg = <0>;
14 };
15
16 cpu@1 {
17 compatible = "brcm,bmips4350", "mips,mips4Kc";
18 device_type = "cpu";
19 reg = <1>;
20 };
21 };
22
23 cpu_intc: interrupt-controller {
24 #address-cells = <0>;
25 compatible = "mti,cpu-interrupt-controller";
26
27 interrupt-controller;
28 #interrupt-cells = <1>;
29 };
30
31 memory { device_type = "memory"; reg = <0 0>; };
32
33 ubus@10000000 {
34 #address-cells = <1>;
35 #size-cells = <1>;
36 ranges;
37 compatible = "simple-bus";
38
39 ext_intc: interrupt-controller@10000018 {
40 compatible = "brcm,bcm6345-ext-intc";
41 reg = <0x10000018 0x4>;
42
43 interrupt-controller;
44 #interrupt-cells = <2>;
45
46 interrupt-parent = <&periph_intc>;
47 interrupts = <40>, <41>, <42>, <43>;
48 };
49
50 periph_intc: interrupt-controller@10000020 {
51 compatible = "brcm,bcm6345-l2-intc";
52 reg = <0x10000020 0x10>,
53 <0x10000030 0x10>;
54
55 interrupt-controller;
56 #interrupt-cells = <1>;
57
58 interrupt-parent = <&cpu_intc>;
59 interrupts = <2>, <3>;
60 };
61 };
62 };