76dd54013f5c1b5b1eb13aa80918abf0a1b84237
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / files / arch / mips / bcm63xx / boards / board_bcm963xx.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/string.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/mtd/physmap.h>
16 #include <asm/addrspace.h>
17 #include <bcm63xx_board.h>
18 #include <bcm63xx_cpu.h>
19 #include <bcm63xx_regs.h>
20 #include <bcm63xx_io.h>
21 #include <bcm63xx_board.h>
22 #include <bcm63xx_dev_pci.h>
23 #include <bcm63xx_dev_uart.h>
24 #include <bcm63xx_dev_wdt.h>
25 #include <bcm63xx_dev_enet.h>
26 #include <bcm63xx_dev_pcmcia.h>
27 #include <bcm63xx_dev_usb_ohci.h>
28 #include <bcm63xx_dev_usb_ehci.h>
29 #include <board_bcm963xx.h>
30
31 #define PFX "board_bcm963xx: "
32
33 static struct bcm963xx_nvram nvram;
34 static unsigned int mac_addr_used = 0;
35 static struct board_info board;
36
37 /*
38 * known 6338 boards
39 */
40
41 #ifdef CONFIG_BCM63XX_CPU_6338
42 static struct board_info __initdata board_96338gw = {
43 .name = "96338GW",
44 .expected_cpu_id = 0x6338,
45
46 .has_enet0 = 1,
47 .enet0 = {
48 .has_phy = 1,
49 .use_internal_phy = 1,
50 },
51
52 .has_ohci0 = 1,
53 };
54 #endif
55
56 /*
57 * known 6348 boards
58 */
59 #ifdef CONFIG_BCM63XX_CPU_6348
60 static struct board_info __initdata board_96348r = {
61 .name = "96348R",
62 .expected_cpu_id = 0x6348,
63
64 .has_enet0 = 1,
65 .has_pci = 1,
66
67 .enet0 = {
68 .has_phy = 1,
69 .use_internal_phy = 1,
70 },
71 };
72
73 static struct board_info __initdata board_96348gw_10 = {
74 .name = "96348GW-10",
75 .expected_cpu_id = 0x6348,
76
77 .has_enet0 = 1,
78 .has_enet1 = 1,
79 .has_pci = 1,
80
81 .enet0 = {
82 .has_phy = 1,
83 .use_internal_phy = 1,
84 },
85 .enet1 = {
86 .force_speed_100 = 1,
87 .force_duplex_full = 1,
88 },
89
90 .has_ohci0 = 1,
91 .has_pccard = 1,
92 .has_ehci0 = 1,
93 };
94
95 static struct board_info __initdata board_96348gw_11 = {
96 .name = "96348GW-11",
97 .expected_cpu_id = 0x6348,
98
99 .has_enet0 = 1,
100 .has_enet1 = 1,
101 .has_pci = 1,
102
103 .enet0 = {
104 .has_phy = 1,
105 .use_internal_phy = 1,
106 },
107
108 .enet1 = {
109 .force_speed_100 = 1,
110 .force_duplex_full = 1,
111 },
112
113
114 .has_ohci0 = 1,
115 .has_pccard = 1,
116 .has_ehci0 = 1,
117 };
118
119 static struct board_info __initdata board_96348gw = {
120 .name = "96348GW",
121 .expected_cpu_id = 0x6348,
122
123 .has_enet0 = 1,
124 .has_enet1 = 1,
125 .has_pci = 1,
126
127 .enet0 = {
128 .has_phy = 1,
129 .use_internal_phy = 1,
130 },
131 .enet1 = {
132 .force_speed_100 = 1,
133 .force_duplex_full = 1,
134 },
135
136 .has_ohci0 = 1,
137 };
138
139 static struct board_info __initdata board_FAST2404 = {
140 .name = "F@ST2404",
141 .expected_cpu_id = 0x6348,
142
143 .has_enet0 = 1,
144 .has_enet1 = 1,
145 .has_pci = 1,
146
147 .enet0 = {
148 .has_phy = 1,
149 .use_internal_phy = 1,
150 },
151
152 .enet1 = {
153 .force_speed_100 = 1,
154 .force_duplex_full = 1,
155 },
156
157
158 .has_ohci0 = 1,
159 .has_pccard = 1,
160 .has_ehci0 = 1,
161 };
162
163 static struct board_info __initdata board_DV201AMR = {
164 .name = "DV201AMR",
165 .expected_cpu_id = 0x6348,
166
167 .has_enet0 = 1,
168 .has_enet1 = 1,
169 .has_pci = 1,
170
171 .enet0 = {
172 .has_phy = 1,
173 .use_internal_phy = 1,
174 },
175
176 .enet1 = {
177 .force_speed_100 = 1,
178 .force_duplex_full = 1,
179 },
180
181
182 .has_ohci0 = 1,
183 .has_pccard = 1,
184 .has_ehci0 = 1,
185 };
186
187 static struct board_info __initdata board_96348gw_a = {
188 .name = "96348GW-A",
189 .expected_cpu_id = 0x6348,
190
191 .has_enet0 = 1,
192 .has_enet1 = 1,
193 .has_pci = 1,
194
195 .enet0 = {
196 .has_phy = 1,
197 .use_internal_phy = 1,
198 },
199 .enet1 = {
200 .force_speed_100 = 1,
201 .force_duplex_full = 1,
202 },
203
204 .has_ohci0 = 1,
205 };
206
207
208 #endif
209
210 /*
211 * known 6358 boards
212 */
213 #ifdef CONFIG_BCM63XX_CPU_6358
214 static struct board_info __initdata board_96358vw = {
215 .name = "96358VW",
216 .expected_cpu_id = 0x6358,
217
218 .has_enet0 = 1,
219 .has_enet1 = 1,
220 .has_pci = 1,
221
222 .enet0 = {
223 .has_phy = 1,
224 .use_internal_phy = 1,
225 },
226
227 .enet1 = {
228 .force_speed_100 = 1,
229 .force_duplex_full = 1,
230 },
231
232
233 .has_ohci0 = 1,
234 .has_pccard = 1,
235 .has_ehci0 = 1,
236 };
237
238 static struct board_info __initdata board_96358vw2 = {
239 .name = "96358VW2",
240 .expected_cpu_id = 0x6358,
241
242 .has_enet0 = 1,
243 .has_enet1 = 1,
244 .has_pci = 1,
245
246 .enet0 = {
247 .has_phy = 1,
248 .use_internal_phy = 1,
249 },
250
251 .enet1 = {
252 .force_speed_100 = 1,
253 .force_duplex_full = 1,
254 },
255
256
257 .has_ohci0 = 1,
258 .has_pccard = 1,
259 .has_ehci0 = 1,
260 };
261 #endif
262
263 /*
264 * all boards
265 */
266 static const struct board_info __initdata *bcm963xx_boards[] = {
267 #ifdef CONFIG_BCM63XX_CPU_6338
268 &board_96338gw,
269 #endif
270 #ifdef CONFIG_BCM63XX_CPU_6348
271 &board_96348r,
272 &board_96348gw,
273 &board_96348gw_10,
274 &board_96348gw_11,
275 &board_FAST2404,
276 &board_DV201AMR,
277 &board_96348gw_a,
278 #endif
279
280 #ifdef CONFIG_BCM63XX_CPU_6358
281 &board_96358vw,
282 &board_96358vw2,
283 #endif
284 };
285
286 /*
287 * early init callback, read nvram data from flash and checksum it
288 */
289 void __init board_prom_init(void)
290 {
291 unsigned int check_len, i;
292 u8 *boot_addr, *cfe, *p;
293 char cfe_version[32];
294 u32 val;
295
296 /* read base address of boot chip select (0) */
297 val = bcm_mpi_readl(MPI_CSBASE_REG(0));
298 val &= MPI_CSBASE_BASE_MASK;
299 boot_addr = (u8 *)KSEG1ADDR(val);
300
301 /* dump cfe version */
302 cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
303 if (!memcmp(cfe, "cfe-v", 5))
304 snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
305 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
306 else
307 strcpy(cfe_version, "unknown");
308 printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
309
310 /* extract nvram data */
311 memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
312
313 /* check checksum before using data */
314 if (nvram.version <= 4)
315 check_len = offsetof(struct bcm963xx_nvram, checksum_old);
316 else
317 check_len = sizeof(nvram);
318 val = 0;
319 p = (u8 *)&nvram;
320 while (check_len--)
321 val += *p;
322 if (val) {
323 printk(KERN_ERR PFX "invalid nvram checksum\n");
324 return;
325 }
326
327 /* find board by name */
328 for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
329 if (strncmp(nvram.name, bcm963xx_boards[i]->name,
330 sizeof(nvram.name)))
331 continue;
332 /* copy, board desc array is marked initdata */
333 memcpy(&board, bcm963xx_boards[i], sizeof(board));
334 break;
335 }
336
337 /* bail out if board is not found, will complain later */
338 if (!board.name[0]) {
339 char name[17];
340 memcpy(name, nvram.name, 16);
341 name[16] = 0;
342 printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
343 name);
344 return;
345 }
346
347 /* setup pin multiplexing depending on board enabled device,
348 * this has to be done this early since PCI init is done
349 * inside arch_initcall */
350 val = 0;
351
352 if (board.has_pci) {
353 bcm63xx_pci_enabled = 1;
354 if (BCMCPU_IS_6348())
355 val |= GPIO_MODE_6348_G2_PCI;
356 }
357
358 if (board.has_pccard) {
359 if (BCMCPU_IS_6348())
360 val |= GPIO_MODE_6348_G1_MII_PCCARD;
361 }
362
363 if (board.has_enet0 && !board.enet0.use_internal_phy) {
364 if (BCMCPU_IS_6348())
365 val |= GPIO_MODE_6348_G3_EXT_MII |
366 GPIO_MODE_6348_G0_EXT_MII;
367 }
368
369 if (board.has_enet1 && !board.enet1.use_internal_phy) {
370 if (BCMCPU_IS_6348())
371 val |= GPIO_MODE_6348_G3_EXT_MII |
372 GPIO_MODE_6348_G0_EXT_MII;
373 }
374
375 bcm_gpio_writel(val, GPIO_MODE_REG);
376 }
377
378 /*
379 * second stage init callback, good time to panic if we couldn't
380 * identify on which board we're running since early printk is working
381 */
382 void __init board_setup(void)
383 {
384 if (!board.name[0])
385 panic("unable to detect bcm963xx board");
386 printk(KERN_INFO PFX "board name: %s\n", board.name);
387
388 /* make sure we're running on expected cpu */
389 if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
390 panic("unexpected CPU for bcm963xx board");
391 }
392
393 /*
394 * return board name for /proc/cpuinfo
395 */
396 const char *board_get_name(void)
397 {
398 return board.name;
399 }
400
401 /*
402 * register & return a new board mac address
403 */
404 static int board_get_mac_address(u8 *mac)
405 {
406 u8 *p;
407 int count;
408
409 if (mac_addr_used >= nvram.mac_addr_count) {
410 printk(KERN_ERR PFX "not enough mac address\n");
411 return -ENODEV;
412 }
413
414 memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
415 p = mac + ETH_ALEN - 1;
416 count = mac_addr_used;
417
418 while (count--) {
419 do {
420 (*p)++;
421 if (*p != 0)
422 break;
423 p--;
424 } while (p != mac);
425 }
426
427 if (p == mac) {
428 printk(KERN_ERR PFX "unable to fetch mac address\n");
429 return -ENODEV;
430 }
431
432 mac_addr_used++;
433 return 0;
434 }
435
436 static struct resource mtd_resources[] = {
437 {
438 .start = 0, /* filled at runtime */
439 .end = 0, /* filled at runtime */
440 .flags = IORESOURCE_MEM,
441 }
442 };
443
444 static struct platform_device mtd_dev = {
445 .name = "bcm963xx-flash",
446 .resource = mtd_resources,
447 .num_resources = ARRAY_SIZE(mtd_resources),
448 };
449
450 /*
451 * third stage init callback, register all board devices.
452 */
453 int __init board_register_devices(void)
454 {
455 u32 val;
456
457 bcm63xx_uart_register();
458 bcm63xx_wdt_register();
459
460 if (board.has_pccard)
461 bcm63xx_pcmcia_register();
462
463 if (board.has_enet0 &&
464 !board_get_mac_address(board.enet0.mac_addr))
465 bcm63xx_enet_register(0, &board.enet0);
466
467 if (board.has_enet1 &&
468 !board_get_mac_address(board.enet1.mac_addr))
469 bcm63xx_enet_register(1, &board.enet1);
470
471 if (board.has_ohci0)
472 bcm63xx_ohci_register();
473
474 if (board.has_ehci0)
475 bcm63xx_ehci_register();
476
477
478 /* read base address of boot chip select (0) */
479 val = bcm_mpi_readl(MPI_CSBASE_REG(0));
480 val &= MPI_CSBASE_BASE_MASK;
481 mtd_resources[0].start = val;
482 mtd_resources[0].end = 0x1FFFFFFF;
483
484 platform_device_register(&mtd_dev);
485
486 return 0;
487 }
488