[brcm63xx] add experimental support for bcm6338
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / files / arch / mips / bcm63xx / setup.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */
8
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/bootmem.h>
13 #include <linux/ioport.h>
14 #include <linux/pm.h>
15 #include <asm/bootinfo.h>
16 #include <asm/time.h>
17 #include <asm/reboot.h>
18 #include <asm/cacheflush.h>
19 #include <bcm63xx_board.h>
20 #include <bcm63xx_cpu.h>
21 #include <bcm63xx_regs.h>
22 #include <bcm63xx_io.h>
23
24 void bcm63xx_machine_halt(void)
25 {
26 printk(KERN_INFO "System halted\n");
27 while (1);
28 }
29
30 static void bcm6348_a1_reboot(void)
31 {
32 u32 reg;
33
34 /* soft reset all blocks */
35 printk(KERN_INFO "soft-reseting all blocks ...\n");
36 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
37 reg &= ~SOFTRESET_6348_ALL;
38 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
39 mdelay(10);
40
41 reg = bcm_perf_readl(PERF_SOFTRESET_REG);
42 reg |= SOFTRESET_6348_ALL;
43 bcm_perf_writel(reg, PERF_SOFTRESET_REG);
44 mdelay(10);
45
46 /* Jump to the power on address. */
47 printk(KERN_INFO "jumping to reset vector.\n");
48 /* set high vectors (base at 0xbfc00000 */
49 set_c0_status(ST0_BEV | ST0_ERL);
50 /* run uncached in kseg0 */
51 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
52 __flush_cache_all();
53 /* remove all wired TLB entries */
54 write_c0_wired(0);
55 __asm__ __volatile__(
56 "jr\t%0"
57 :
58 : "r" (0xbfc00000));
59 while (1);
60 }
61
62 void bcm63xx_machine_reboot(void)
63 {
64 u32 reg;
65
66 /* mask and clear all external irq */
67 reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
68 reg &= ~EXTIRQ_CFG_MASK_ALL;
69 reg |= EXTIRQ_CFG_CLEAR_ALL;
70 bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
71
72 if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
73 bcm6348_a1_reboot();
74
75 printk(KERN_INFO "triggering watchdog soft-reset...\n");
76 bcm_perf_writel(SYS_PLL_SOFT_RESET, PERF_SYS_PLL_CTL_REG);
77 while (1);
78 }
79
80 static void __bcm63xx_machine_reboot(char *p)
81 {
82 bcm63xx_machine_reboot();
83 }
84
85 /*
86 * return system type in /proc/cpuinfo
87 */
88 const char *get_system_type(void)
89 {
90 static char buf[128];
91 snprintf(buf, sizeof (buf), "bcm63xx/%s (0x%04x/0x%04X)",
92 board_get_name(),
93 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
94 return buf;
95 }
96
97 void __init plat_time_init(void)
98 {
99 mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
100 }
101
102 void __init plat_mem_setup(void)
103 {
104 add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
105
106 _machine_halt = bcm63xx_machine_halt;
107 _machine_restart = __bcm63xx_machine_reboot;
108 pm_power_off = bcm63xx_machine_halt;
109
110 set_io_port_base(0);
111 ioport_resource.start = 0;
112 ioport_resource.end = ~0;
113
114 board_setup();
115 }
116
117 int __init bcm63xx_register_devices(void)
118 {
119 return board_register_devices();
120 }
121
122 device_initcall(bcm63xx_register_devices);