target/linux/brcm63xx/patches-3.13/003-MIPS-BCM63XX-setup-the-HSSPI-clock-rate.patch

   1 From c8b7d2630d907025ce30989bddd01f4f0f13c103 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Wed, 20 Nov 2013 17:22:40 +0100
   4 Subject: [PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate
   5
   6 Properly set up the HSSPI clock rate depending on the SoC's PLL rate.
   7
   8 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
   9 ---
  10  arch/mips/bcm63xx/clk.c | 18 ++++++++++++++++++
  11  1 file changed, 18 insertions(+)
  12
  13 --- a/arch/mips/bcm63xx/clk.c
  14 +++ b/arch/mips/bcm63xx/clk.c
  15 @@ -390,3 +390,21 @@ void clk_put(struct clk *clk)
  16  }
  17
  18  EXPORT_SYMBOL(clk_put);
  19 +
  20 +#define HSSPI_PLL_HZ_6328      133333333
  21 +#define HSSPI_PLL_HZ_6362      400000000
  22 +
  23 +static int __init bcm63xx_clk_init(void)
  24 +{
  25 +       switch (bcm63xx_get_cpu_id()) {
  26 +       case BCM6328_CPU_ID:
  27 +               clk_hsspi.rate = HSSPI_PLL_HZ_6328;
  28 +               break;
  29 +       case BCM6362_CPU_ID:
  30 +               clk_hsspi.rate = HSSPI_PLL_HZ_6362;
  31 +               break;
  32 +       }
  33 +
  34 +       return 0;
  35 +}
  36 +arch_initcall(bcm63xx_clk_init);