brcm63xx: add preliminary support for 3.13
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.13 / 311-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-irq-setup-co.patch
1 From 07d0224576cbb2e6ac680b4ade4bba7a49bd0a07 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Mon, 2 Dec 2013 12:34:11 +0100
4 Subject: [PATCH 2/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from irq setup code
5
6 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
7 ---
8 arch/mips/bcm63xx/irq.c | 109 ------------------------------------------------
9 1 file changed, 109 deletions(-)
10
11 --- a/arch/mips/bcm63xx/irq.c
12 +++ b/arch/mips/bcm63xx/irq.c
13 @@ -26,114 +26,6 @@ static void __internal_irq_mask_64(unsig
14 static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
15 static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
16
17 -#ifndef BCMCPU_RUNTIME_DETECT
18 -#ifdef CONFIG_BCM63XX_CPU_3368
19 -#define irq_stat_reg PERF_IRQSTAT_3368_REG
20 -#define irq_mask_reg PERF_IRQMASK_3368_REG
21 -#define irq_bits 32
22 -#define is_ext_irq_cascaded 0
23 -#define ext_irq_start 0
24 -#define ext_irq_end 0
25 -#define ext_irq_count 4
26 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_3368
27 -#define ext_irq_cfg_reg2 0
28 -#endif
29 -#ifdef CONFIG_BCM63XX_CPU_6328
30 -#define irq_stat_reg PERF_IRQSTAT_6328_REG
31 -#define irq_mask_reg PERF_IRQMASK_6328_REG
32 -#define irq_bits 64
33 -#define is_ext_irq_cascaded 1
34 -#define ext_irq_start (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
35 -#define ext_irq_end (BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
36 -#define ext_irq_count 4
37 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6328
38 -#define ext_irq_cfg_reg2 0
39 -#endif
40 -#ifdef CONFIG_BCM63XX_CPU_6338
41 -#define irq_stat_reg PERF_IRQSTAT_6338_REG
42 -#define irq_mask_reg PERF_IRQMASK_6338_REG
43 -#define irq_bits 32
44 -#define is_ext_irq_cascaded 0
45 -#define ext_irq_start 0
46 -#define ext_irq_end 0
47 -#define ext_irq_count 4
48 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6338
49 -#define ext_irq_cfg_reg2 0
50 -#endif
51 -#ifdef CONFIG_BCM63XX_CPU_6345
52 -#define irq_stat_reg PERF_IRQSTAT_6345_REG
53 -#define irq_mask_reg PERF_IRQMASK_6345_REG
54 -#define irq_bits 32
55 -#define is_ext_irq_cascaded 0
56 -#define ext_irq_start 0
57 -#define ext_irq_end 0
58 -#define ext_irq_count 4
59 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6345
60 -#define ext_irq_cfg_reg2 0
61 -#endif
62 -#ifdef CONFIG_BCM63XX_CPU_6348
63 -#define irq_stat_reg PERF_IRQSTAT_6348_REG
64 -#define irq_mask_reg PERF_IRQMASK_6348_REG
65 -#define irq_bits 32
66 -#define is_ext_irq_cascaded 0
67 -#define ext_irq_start 0
68 -#define ext_irq_end 0
69 -#define ext_irq_count 4
70 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6348
71 -#define ext_irq_cfg_reg2 0
72 -#endif
73 -#ifdef CONFIG_BCM63XX_CPU_6358
74 -#define irq_stat_reg PERF_IRQSTAT_6358_REG
75 -#define irq_mask_reg PERF_IRQMASK_6358_REG
76 -#define irq_bits 32
77 -#define is_ext_irq_cascaded 1
78 -#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE)
79 -#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE)
80 -#define ext_irq_count 4
81 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358
82 -#define ext_irq_cfg_reg2 0
83 -#endif
84 -#ifdef CONFIG_BCM63XX_CPU_6362
85 -#define irq_stat_reg PERF_IRQSTAT_6362_REG
86 -#define irq_mask_reg PERF_IRQMASK_6362_REG
87 -#define irq_bits 64
88 -#define is_ext_irq_cascaded 1
89 -#define ext_irq_start (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE)
90 -#define ext_irq_end (BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE)
91 -#define ext_irq_count 4
92 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6362
93 -#define ext_irq_cfg_reg2 0
94 -#endif
95 -#ifdef CONFIG_BCM63XX_CPU_6368
96 -#define irq_stat_reg PERF_IRQSTAT_6368_REG
97 -#define irq_mask_reg PERF_IRQMASK_6368_REG
98 -#define irq_bits 64
99 -#define is_ext_irq_cascaded 1
100 -#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
101 -#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE)
102 -#define ext_irq_count 6
103 -#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6368
104 -#define ext_irq_cfg_reg2 PERF_EXTIRQ_CFG_REG2_6368
105 -#endif
106 -
107 -#if irq_bits == 32
108 -#define dispatch_internal __dispatch_internal
109 -#define internal_irq_mask __internal_irq_mask_32
110 -#define internal_irq_unmask __internal_irq_unmask_32
111 -#else
112 -#define dispatch_internal __dispatch_internal_64
113 -#define internal_irq_mask __internal_irq_mask_64
114 -#define internal_irq_unmask __internal_irq_unmask_64
115 -#endif
116 -
117 -#define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg)
118 -#define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg)
119 -
120 -static inline void bcm63xx_init_irq(void)
121 -{
122 -}
123 -#else /* ! BCMCPU_RUNTIME_DETECT */
124 -
125 static u32 irq_stat_addr, irq_mask_addr;
126 static void (*dispatch_internal)(void);
127 static int is_ext_irq_cascaded;
128 @@ -234,7 +126,6 @@ static void bcm63xx_init_irq(void)
129 internal_irq_unmask = __internal_irq_unmask_64;
130 }
131 }
132 -#endif /* ! BCMCPU_RUNTIME_DETECT */
133
134 static inline u32 get_ext_irq_perf_reg(int irq)
135 {