brcm63xx: add preliminary support for 3.13
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.13 / 327-MIPS-BCM63XX-allow-setting-affinity-for-IPIC.patch
1 From 9249f2f6a309e3f45c35d16decdcc5b2cadcadb8 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Fri, 26 Apr 2013 12:06:03 +0200
4 Subject: [PATCH 38/53] MIPS: BCM63XX: allow setting affinity for IPIC
5
6 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
7 ---
8 arch/mips/bcm63xx/irq.c | 43 +++++++++++++++++++++++++++++++++++++------
9 1 file changed, 37 insertions(+), 6 deletions(-)
10
11 --- a/arch/mips/bcm63xx/irq.c
12 +++ b/arch/mips/bcm63xx/irq.c
13 @@ -32,7 +32,7 @@ static unsigned int ext_irq_count;
14 static unsigned int ext_irq_start, ext_irq_end;
15 static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
16 static void (*internal_irq_mask)(struct irq_data *d);
17 -static void (*internal_irq_unmask)(struct irq_data *d);
18 +static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
19
20
21 static inline u32 get_ext_irq_perf_reg(int irq)
22 @@ -51,6 +51,20 @@ static inline void handle_internal(int i
23 do_IRQ(intbit + IRQ_INTERNAL_BASE);
24 }
25
26 +static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
27 + const struct cpumask *m)
28 +{
29 + bool enable = cpu_online(cpu);
30 +#ifdef CONFIG_SMP
31 +
32 + if (m)
33 + enable &= cpu_isset(cpu, *m);
34 + else if (irqd_affinity_was_set(d))
35 + enable &= cpu_isset(cpu, *d->affinity);
36 +#endif
37 + return enable;
38 +}
39 +
40 /*
41 * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
42 * prioritize any interrupt relatively to another. the static counter
43 @@ -117,7 +131,8 @@ static void __internal_irq_mask_##width(
44 spin_unlock_irqrestore(&ipic_lock, flags); \
45 } \
46 \
47 -static void __internal_irq_unmask_##width(struct irq_data *d) \
48 +static void __internal_irq_unmask_##width(struct irq_data *d, \
49 + const struct cpumask *m) \
50 { \
51 u32 val; \
52 unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
53 @@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
54 break; \
55 \
56 val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
57 - if (cpu_online(cpu)) \
58 + if (enable_irq_for_cpu(cpu, d, m)) \
59 val |= (1 << bit); \
60 else \
61 val &= ~(1 << bit); \
62 @@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
63
64 static void bcm63xx_internal_irq_unmask(struct irq_data *d)
65 {
66 - internal_irq_unmask(d);
67 + internal_irq_unmask(d, NULL);
68 }
69
70 /*
71 @@ -237,7 +252,8 @@ static void bcm63xx_external_irq_unmask(
72 spin_unlock_irqrestore(&epic_lock, flags);
73
74 if (is_ext_irq_cascaded)
75 - internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
76 + internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
77 + NULL);
78 }
79
80 static void bcm63xx_external_irq_clear(struct irq_data *d)
81 @@ -356,6 +372,18 @@ static int bcm63xx_external_irq_set_type
82 return IRQ_SET_MASK_OK_NOCOPY;
83 }
84
85 +#ifdef CONFIG_SMP
86 +static int bcm63xx_internal_set_affinity(struct irq_data *data,
87 + const struct cpumask *dest,
88 + bool force)
89 +{
90 + if (!irqd_irq_disabled(data))
91 + internal_irq_unmask(data, dest);
92 +
93 + return 0;
94 +}
95 +#endif
96 +
97 static struct irq_chip bcm63xx_internal_irq_chip = {
98 .name = "bcm63xx_ipic",
99 .irq_mask = bcm63xx_internal_irq_mask,
100 @@ -523,7 +551,10 @@ void __init arch_init_irq(void)
101
102 setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
103 #ifdef CONFIG_SMP
104 - if (is_ext_irq_cascaded)
105 + if (is_ext_irq_cascaded) {
106 setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
107 + bcm63xx_internal_irq_chip.irq_set_affinity =
108 + bcm63xx_internal_set_affinity;
109 + }
110 #endif
111 }