brcm63xx: update development kernel to linux 3.14
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.14 / 319-MIPS-BCM63XX-move-bcm63xx_init_irq-down.patch
1 From c28c639b031385ecf965eecf3bfb532e88044c89 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Sun, 15 Dec 2013 20:52:53 +0100
4 Subject: [PATCH 30/53] MIPS: BCM63XX: move bcm63xx_init_irq down
5
6 Allows up to drop the prototypes from the top.
7 ---
8 arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
9 1 file changed, 92 insertions(+), 98 deletions(-)
10
11 --- a/arch/mips/bcm63xx/irq.c
12 +++ b/arch/mips/bcm63xx/irq.c
13 @@ -19,13 +19,6 @@
14 #include <bcm63xx_io.h>
15 #include <bcm63xx_irq.h>
16
17 -static void __dispatch_internal_32(void) __maybe_unused;
18 -static void __dispatch_internal_64(void) __maybe_unused;
19 -static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
20 -static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
21 -static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
22 -static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
23 -
24 static u32 irq_stat_addr, irq_mask_addr;
25 static void (*dispatch_internal)(void);
26 static int is_ext_irq_cascaded;
27 @@ -35,97 +28,6 @@ static unsigned int ext_irq_cfg_reg1, ex
28 static void (*internal_irq_mask)(unsigned int irq);
29 static void (*internal_irq_unmask)(unsigned int irq);
30
31 -static void bcm63xx_init_irq(void)
32 -{
33 - int irq_bits;
34 -
35 - irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
36 - irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
37 -
38 - switch (bcm63xx_get_cpu_id()) {
39 - case BCM3368_CPU_ID:
40 - irq_stat_addr += PERF_IRQSTAT_3368_REG;
41 - irq_mask_addr += PERF_IRQMASK_3368_REG;
42 - irq_bits = 32;
43 - ext_irq_count = 4;
44 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
45 - break;
46 - case BCM6328_CPU_ID:
47 - irq_stat_addr += PERF_IRQSTAT_6328_REG;
48 - irq_mask_addr += PERF_IRQMASK_6328_REG;
49 - irq_bits = 64;
50 - ext_irq_count = 4;
51 - is_ext_irq_cascaded = 1;
52 - ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
53 - ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
54 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
55 - break;
56 - case BCM6338_CPU_ID:
57 - irq_stat_addr += PERF_IRQSTAT_6338_REG;
58 - irq_mask_addr += PERF_IRQMASK_6338_REG;
59 - irq_bits = 32;
60 - ext_irq_count = 4;
61 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
62 - break;
63 - case BCM6345_CPU_ID:
64 - irq_stat_addr += PERF_IRQSTAT_6345_REG;
65 - irq_mask_addr += PERF_IRQMASK_6345_REG;
66 - irq_bits = 32;
67 - ext_irq_count = 4;
68 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
69 - break;
70 - case BCM6348_CPU_ID:
71 - irq_stat_addr += PERF_IRQSTAT_6348_REG;
72 - irq_mask_addr += PERF_IRQMASK_6348_REG;
73 - irq_bits = 32;
74 - ext_irq_count = 4;
75 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
76 - break;
77 - case BCM6358_CPU_ID:
78 - irq_stat_addr += PERF_IRQSTAT_6358_REG;
79 - irq_mask_addr += PERF_IRQMASK_6358_REG;
80 - irq_bits = 32;
81 - ext_irq_count = 4;
82 - is_ext_irq_cascaded = 1;
83 - ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
84 - ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
85 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
86 - break;
87 - case BCM6362_CPU_ID:
88 - irq_stat_addr += PERF_IRQSTAT_6362_REG;
89 - irq_mask_addr += PERF_IRQMASK_6362_REG;
90 - irq_bits = 64;
91 - ext_irq_count = 4;
92 - is_ext_irq_cascaded = 1;
93 - ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
94 - ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
95 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
96 - break;
97 - case BCM6368_CPU_ID:
98 - irq_stat_addr += PERF_IRQSTAT_6368_REG;
99 - irq_mask_addr += PERF_IRQMASK_6368_REG;
100 - irq_bits = 64;
101 - ext_irq_count = 6;
102 - is_ext_irq_cascaded = 1;
103 - ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
104 - ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
105 - ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
106 - ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
107 - break;
108 - default:
109 - BUG();
110 - }
111 -
112 - if (irq_bits == 32) {
113 - dispatch_internal = __dispatch_internal_32;
114 - internal_irq_mask = __internal_irq_mask_32;
115 - internal_irq_unmask = __internal_irq_unmask_32;
116 - } else {
117 - dispatch_internal = __dispatch_internal_64;
118 - internal_irq_mask = __internal_irq_mask_64;
119 - internal_irq_unmask = __internal_irq_unmask_64;
120 - }
121 -}
122
123 static inline u32 get_ext_irq_perf_reg(int irq)
124 {
125 @@ -451,6 +353,98 @@ static struct irqaction cpu_ext_cascade_
126 .flags = IRQF_NO_THREAD,
127 };
128
129 +static void bcm63xx_init_irq(void)
130 +{
131 + int irq_bits;
132 +
133 + irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
134 + irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
135 +
136 + switch (bcm63xx_get_cpu_id()) {
137 + case BCM3368_CPU_ID:
138 + irq_stat_addr += PERF_IRQSTAT_3368_REG;
139 + irq_mask_addr += PERF_IRQMASK_3368_REG;
140 + irq_bits = 32;
141 + ext_irq_count = 4;
142 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
143 + break;
144 + case BCM6328_CPU_ID:
145 + irq_stat_addr += PERF_IRQSTAT_6328_REG;
146 + irq_mask_addr += PERF_IRQMASK_6328_REG;
147 + irq_bits = 64;
148 + ext_irq_count = 4;
149 + is_ext_irq_cascaded = 1;
150 + ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
151 + ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
152 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
153 + break;
154 + case BCM6338_CPU_ID:
155 + irq_stat_addr += PERF_IRQSTAT_6338_REG;
156 + irq_mask_addr += PERF_IRQMASK_6338_REG;
157 + irq_bits = 32;
158 + ext_irq_count = 4;
159 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
160 + break;
161 + case BCM6345_CPU_ID:
162 + irq_stat_addr += PERF_IRQSTAT_6345_REG;
163 + irq_mask_addr += PERF_IRQMASK_6345_REG;
164 + irq_bits = 32;
165 + ext_irq_count = 4;
166 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
167 + break;
168 + case BCM6348_CPU_ID:
169 + irq_stat_addr += PERF_IRQSTAT_6348_REG;
170 + irq_mask_addr += PERF_IRQMASK_6348_REG;
171 + irq_bits = 32;
172 + ext_irq_count = 4;
173 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
174 + break;
175 + case BCM6358_CPU_ID:
176 + irq_stat_addr += PERF_IRQSTAT_6358_REG;
177 + irq_mask_addr += PERF_IRQMASK_6358_REG;
178 + irq_bits = 32;
179 + ext_irq_count = 4;
180 + is_ext_irq_cascaded = 1;
181 + ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
182 + ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
183 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
184 + break;
185 + case BCM6362_CPU_ID:
186 + irq_stat_addr += PERF_IRQSTAT_6362_REG;
187 + irq_mask_addr += PERF_IRQMASK_6362_REG;
188 + irq_bits = 64;
189 + ext_irq_count = 4;
190 + is_ext_irq_cascaded = 1;
191 + ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
192 + ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
193 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
194 + break;
195 + case BCM6368_CPU_ID:
196 + irq_stat_addr += PERF_IRQSTAT_6368_REG;
197 + irq_mask_addr += PERF_IRQMASK_6368_REG;
198 + irq_bits = 64;
199 + ext_irq_count = 6;
200 + is_ext_irq_cascaded = 1;
201 + ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
202 + ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
203 + ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
204 + ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
205 + break;
206 + default:
207 + BUG();
208 + }
209 +
210 + if (irq_bits == 32) {
211 + dispatch_internal = __dispatch_internal_32;
212 + internal_irq_mask = __internal_irq_mask_32;
213 + internal_irq_unmask = __internal_irq_unmask_32;
214 + } else {
215 + dispatch_internal = __dispatch_internal_64;
216 + internal_irq_mask = __internal_irq_mask_64;
217 + internal_irq_unmask = __internal_irq_unmask_64;
218 + }
219 +}
220 +
221 void __init arch_init_irq(void)
222 {
223 int i;