brcm63xx: update development kernel to linux 3.14
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.14 / 330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
1 From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Sat, 7 Dec 2013 14:08:36 +0100
4 Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
5
6 ---
7 arch/mips/bcm63xx/cpu.c | 10 ++++++++++
8 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
9 2 files changed, 28 insertions(+)
10
11 --- a/arch/mips/bcm63xx/cpu.c
12 +++ b/arch/mips/bcm63xx/cpu.c
13 @@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
14 u16 bcm63xx_cpu_id __read_mostly;
15 EXPORT_SYMBOL(bcm63xx_cpu_id);
16
17 +static u32 bcm63xx_cpu_variant __read_mostly;
18 +
19 static u8 bcm63xx_cpu_rev;
20 static unsigned int bcm63xx_cpu_freq;
21 static unsigned int bcm63xx_memory_size;
22 @@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
23
24 };
25
26 +u32 bcm63xx_get_cpu_variant(void)
27 +{
28 + return bcm63xx_cpu_variant;
29 +}
30 +
31 +EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
32 +
33 u8 bcm63xx_get_cpu_rev(void)
34 {
35 return bcm63xx_cpu_rev;
36 @@ -334,6 +343,7 @@ void __init bcm63xx_cpu_init(void)
37 /* read out CPU type */
38 tmp = bcm_readl(chipid_reg);
39 bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
40 + bcm63xx_cpu_variant = bcm63xx_cpu_id;
41 bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
42
43 switch (bcm63xx_cpu_id) {
44 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
45 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
46 @@ -19,6 +19,7 @@
47 #define BCM6368_CPU_ID 0x6368
48
49 void __init bcm63xx_cpu_init(void);
50 +u32 bcm63xx_get_cpu_variant(void);
51 u8 bcm63xx_get_cpu_rev(void);
52 unsigned int bcm63xx_get_cpu_freq(void);
53
54 @@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
55 #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
56 #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
57
58 +#define BCMCPU_VARIANT_IS_3368() \
59 + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
60 +#define BCMCPU_VARIANT_IS_6328() \
61 + (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
62 +#define BCMCPU_VARIANT_IS_6338() \
63 + (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
64 +#define BCMCPU_VARIANT_IS_6345() \
65 + (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
66 +#define BCMCPU_VARIANT_IS_6348() \
67 + (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
68 +#define BCMCPU_VARIANT_IS_6358() \
69 + (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
70 +#define BCMCPU_VARIANT_IS_6362() \
71 + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
72 +#define BCMCPU_VARIANT_IS_6368() \
73 + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
74 +
75 /*
76 * While registers sets are (mostly) the same across 63xx CPU, base
77 * address of these sets do change.