brcm63xx: update development kernel to linux 3.14
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.14 / 416-BCM63XX-add-a-fixup-for-ath9k-devices.patch
1 From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Thu, 3 May 2012 14:36:11 +0200
4 Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
5
6 ---
7 arch/mips/bcm63xx/Makefile | 3 +-
8 arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
9 .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
10 3 files changed, 199 insertions(+), 1 deletion(-)
11 create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
12 create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
13
14 --- a/arch/mips/bcm63xx/Makefile
15 +++ b/arch/mips/bcm63xx/Makefile
16 @@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
17 setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
18 dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
19 dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
20 - usb-common.o
21 + pci-ath9k-fixup.o usb-common.o
22 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
23
24 obj-y += boards/
25 --- /dev/null
26 +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
27 @@ -0,0 +1,192 @@
28 +/*
29 + * Broadcom BCM63XX Ath9k EEPROM fixup helper.
30 + *
31 + * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
32 + *
33 + * Based on
34 + *
35 + * Atheros AP94 reference board PCI initialization
36 + *
37 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
38 + *
39 + * This program is free software; you can redistribute it and/or modify it
40 + * under the terms of the GNU General Public License version 2 as published
41 + * by the Free Software Foundation.
42 + */
43 +
44 +#include <linux/pci.h>
45 +#include <linux/delay.h>
46 +#include <linux/ath9k_platform.h>
47 +
48 +#include <bcm63xx_cpu.h>
49 +#include <bcm63xx_io.h>
50 +#include <bcm63xx_nvram.h>
51 +#include <bcm63xx_dev_pci.h>
52 +#include <bcm63xx_dev_flash.h>
53 +#include <bcm63xx_dev_hsspi.h>
54 +#include <pci_ath9k_fixup.h>
55 +
56 +#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
57 +
58 +struct ath9k_fixup {
59 + unsigned slot;
60 + u8 mac[ETH_ALEN];
61 + struct ath9k_platform_data pdata;
62 +};
63 +
64 +static int ath9k_num_fixups;
65 +static struct ath9k_fixup ath9k_fixups[2] = {
66 + {
67 + .slot = 255,
68 + .pdata = {
69 + .led_pin = -1,
70 + },
71 + },
72 + {
73 + .slot = 255,
74 + .pdata = {
75 + .led_pin = -1,
76 + },
77 + },
78 +};
79 +
80 +static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
81 +{
82 + u32 addr;
83 +
84 + if (BCMCPU_IS_6328()) {
85 + addr = 0x18000000;
86 + } else {
87 + addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
88 + addr &= MPI_CSBASE_BASE_MASK;
89 + }
90 +
91 + switch (bcm63xx_flash_get_type()) {
92 + case BCM63XX_FLASH_TYPE_PARALLEL:
93 + memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
94 + return eeprom;
95 + case BCM63XX_FLASH_TYPE_SERIAL:
96 + /* the first megabyte is memory mapped */
97 + if (offset < 0x100000) {
98 + memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
99 + return eeprom;
100 + }
101 +
102 + if (BCMCPU_IS_6328()) {
103 + /* we can change the memory mapped megabyte */
104 + bcm_hsspi_writel(offset & 0xf00000, 0x18);
105 + memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
106 + bcm_hsspi_writel(0, 0x18);
107 + return eeprom;
108 + }
109 + /* can't do anything here without talking to the SPI controller. */
110 + case BCM63XX_FLASH_TYPE_NAND:
111 + default:
112 + return NULL;
113 + }
114 +}
115 +
116 +static void ath9k_pci_fixup(struct pci_dev *dev)
117 +{
118 + void __iomem *mem;
119 + struct ath9k_platform_data *pdata = NULL;
120 + u16 *cal_data = NULL;
121 + u16 cmd;
122 + u32 bar0;
123 + u32 val;
124 + unsigned i;
125 +
126 + for (i = 0; i < ath9k_num_fixups; i++) {
127 + if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
128 + continue;
129 +
130 + cal_data = ath9k_fixups[i].pdata.eeprom_data;
131 + pdata = &ath9k_fixups[i].pdata;
132 + break;
133 + }
134 +
135 + if (cal_data == NULL)
136 + return;
137 +
138 + if (*cal_data != 0xa55a) {
139 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
140 + return;
141 + }
142 +
143 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
144 +
145 + switch (bcm63xx_get_cpu_id()) {
146 + case BCM6328_CPU_ID:
147 + val = BCM_PCIE_MEM_BASE_PA_6328;
148 + break;
149 + case BCM6348_CPU_ID:
150 + case BCM6358_CPU_ID:
151 + case BCM6368_CPU_ID:
152 + val = BCM_PCI_MEM_BASE_PA;
153 + break;
154 + default:
155 + BUG();
156 + }
157 +
158 + mem = ioremap(val, 0x10000);
159 + if (!mem) {
160 + pr_err("pci %s: ioremap error\n", pci_name(dev));
161 + return;
162 + }
163 +
164 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
165 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
166 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
167 +
168 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
169 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
170 + pci_write_config_word(dev, PCI_COMMAND, cmd);
171 +
172 + /* set offset to first reg address */
173 + cal_data += 3;
174 + while(*cal_data != 0xffff) {
175 + u32 reg;
176 + reg = *cal_data++;
177 + val = *cal_data++;
178 + val |= (*cal_data++) << 16;
179 +
180 + writel(val, mem + reg);
181 + udelay(100);
182 + }
183 +
184 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
185 + dev->vendor = val & 0xffff;
186 + dev->device = (val >> 16) & 0xffff;
187 +
188 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
189 + dev->revision = val & 0xff;
190 + dev->class = val >> 8; /* upper 3 bytes */
191 +
192 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
193 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
194 + pci_write_config_word(dev, PCI_COMMAND, cmd);
195 +
196 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
197 +
198 + iounmap(mem);
199 +
200 + dev->dev.platform_data = pdata;
201 +}
202 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
203 +
204 +void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
205 +{
206 + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
207 + return;
208 +
209 + ath9k_fixups[ath9k_num_fixups].slot = slot;
210 +
211 + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
212 + return;
213 +
214 + if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
215 + return;
216 +
217 + ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
218 + ath9k_num_fixups++;
219 +}
220 --- /dev/null
221 +++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
222 @@ -0,0 +1,7 @@
223 +#ifndef _PCI_ATH9K_FIXUP
224 +#define _PCI_ATH9K_FIXUP
225 +
226 +
227 +void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
228 +
229 +#endif /* _PCI_ATH9K_FIXUP */