bcm63xx: add support for the HSSPI controller
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.3 / 420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
1 From a1e3ef9af3e3a7283ced5fd079ef7e8bc4e2deca Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sun, 3 Jul 2011 15:00:38 +0200
4 Subject: [PATCH 55/79] MIPS: BCM63XX: Register SPI flash if present
5
6 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
7 ---
8 arch/mips/bcm63xx/dev-flash.c | 29 +++++++++++++++++++--
9 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
10 2 files changed, 28 insertions(+), 2 deletions(-)
11
12 --- a/arch/mips/bcm63xx/dev-flash.c
13 +++ b/arch/mips/bcm63xx/dev-flash.c
14 @@ -15,9 +15,12 @@
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/mtd/physmap.h>
18 +#include <linux/spi/spi.h>
19 +#include <linux/spi/flash.h>
20
21 #include <bcm63xx_cpu.h>
22 #include <bcm63xx_dev_flash.h>
23 +#include <bcm63xx_dev_hsspi.h>
24 #include <bcm63xx_regs.h>
25 #include <bcm63xx_io.h>
26
27 @@ -54,12 +57,28 @@ static struct platform_device mtd_dev =
28 },
29 };
30
31 +static struct flash_platform_data bcm63xx_flash_data = {
32 + .part_probe_types = bcm63xx_part_types,
33 +};
34 +
35 +static struct spi_board_info bcm63xx_spi_flash_info[] = {
36 + {
37 + .bus_num = 0,
38 + .chip_select = 0,
39 + .mode = 0,
40 + .max_speed_hz = 781000,
41 + .modalias = "m25p80",
42 + .platform_data = &bcm63xx_flash_data,
43 + },
44 +};
45 +
46 static int __init bcm63xx_detect_flash_type(void)
47 {
48 u32 val;
49
50 switch (bcm63xx_get_cpu_id()) {
51 case BCM6328_CPU_ID:
52 + bcm63xx_spi_flash_info[0].max_speed_hz = 40000000;
53 val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
54 if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
55 return BCM63XX_FLASH_TYPE_SERIAL;
56 @@ -78,6 +97,9 @@ static int __init bcm63xx_detect_flash_t
57 return BCM63XX_FLASH_TYPE_SERIAL;
58 case BCM6368_CPU_ID:
59 val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
60 + if (val & STRAPBUS_6368_SPI_CLK_FAST)
61 + bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
62 +
63 switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
64 case STRAPBUS_6368_BOOT_SEL_NAND:
65 return BCM63XX_FLASH_TYPE_NAND;
66 @@ -109,8 +131,11 @@ int __init bcm63xx_flash_register(void)
67
68 return platform_device_register(&mtd_dev);
69 case BCM63XX_FLASH_TYPE_SERIAL:
70 - pr_warn("unsupported serial flash detected\n");
71 - return -ENODEV;
72 + if (BCMCPU_IS_6328())
73 + bcm63xx_flash_data.max_transfer_len = HS_SPI_BUFFER_LEN;
74 +
75 + return spi_register_board_info(bcm63xx_spi_flash_info,
76 + ARRAY_SIZE(bcm63xx_spi_flash_info));
77 case BCM63XX_FLASH_TYPE_NAND:
78 pr_warn("unsupported NAND flash detected\n");
79 return -ENODEV;
80 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
81 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
82 @@ -555,6 +555,7 @@
83 #define GPIO_STRAPBUS_REG 0x40
84 #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
85 #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
86 +#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
87 #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
88 #define STRAPBUS_6368_BOOT_SEL_NAND 0
89 #define STRAPBUS_6368_BOOT_SEL_SERIAL 1