target/linux/brcm63xx/patches-3.6/313-MIPS-BCM63XX-enable-pcie-for-BCM6362.patch

   1 From e49546bf3f255f028d0877ceeb7ed6466fe37d8a Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Mon, 21 Nov 2011 00:53:26 +0100
   4 Subject: [PATCH 56/84] MIPS: BCM63XX: enable pcie for BCM6362
   5
   6 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
   7 ---
   8  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    3 +-
   9  arch/mips/pci/pci-bcm63xx.c                       |   57 +++++++++++++++------
  10  2 files changed, 44 insertions(+), 16 deletions(-)
  11
  12 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  13 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  14 @@ -1231,7 +1231,8 @@
  15  /*************************************************************************
  16   * _REG relative to RSET_MISC
  17   *************************************************************************/
  18 -#define MISC_SERDES_CTRL_REG           0x0
  19 +#define MISC_SERDES_CTRL_6328_REG      0x0
  20 +#define MISC_SERDES_CTRL_6362_REG      0x4
  21  #define SERDES_PCIE_EN                 (1 << 0)
  22  #define SERDES_PCIE_EXD_EN             (1 << 15)
  23
  24 --- a/arch/mips/pci/pci-bcm63xx.c
  25 +++ b/arch/mips/pci/pci-bcm63xx.c
  26 @@ -118,35 +118,61 @@ void __iomem *pci_iospace_start;
  27  static void __init bcm63xx_reset_pcie(void)
  28  {
  29         u32 val;
  30 +       u32 reg;
  31 +       u32 mask;
  32
  33         /* enable clock */
  34 +
  35 +       if (BCMCPU_IS_6328())
  36 +               mask = CKCTL_6328_PCIE_EN;
  37 +       else
  38 +               mask = CKCTL_6362_PCIE_EN;
  39 +
  40         val = bcm_perf_readl(PERF_CKCTL_REG);
  41 -       val |= CKCTL_6328_PCIE_EN;
  42 +       val |= mask;
  43         bcm_perf_writel(val, PERF_CKCTL_REG);
  44
  45         /* enable SERDES */
  46 -       val = bcm_misc_readl(MISC_SERDES_CTRL_REG);
  47 +
  48 +       if (BCMCPU_IS_6328())
  49 +               reg = MISC_SERDES_CTRL_6328_REG;
  50 +       else
  51 +               reg = MISC_SERDES_CTRL_6362_REG;
  52 +
  53 +       val = bcm_misc_readl(reg);
  54         val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;
  55 -       bcm_misc_writel(val, MISC_SERDES_CTRL_REG);
  56 +       bcm_misc_writel(val, reg);
  57
  58         /* reset the PCIe core */
  59 -       val = bcm_perf_readl(PERF_SOFTRESET_6328_REG);
  60 +       if (BCMCPU_IS_6328()) {
  61 +               reg = PERF_SOFTRESET_6328_REG;
  62 +               mask = SOFTRESET_6328_PCIE_MASK | SOFTRESET_6328_PCIE_CORE_MASK
  63 +                               | SOFTRESET_6328_PCIE_HARD_MASK;
  64 +       } else {
  65 +               reg = PERF_SOFTRESET_6362_REG;
  66 +               mask = SOFTRESET_6362_PCIE_MASK | SOFTRESET_6362_PCIE_CORE_MASK;
  67 +       }
  68 +       val = bcm_perf_readl(reg);
  69 +       val &= ~mask;
  70 +
  71 +       if (BCMCPU_IS_6328())
  72 +               val &= ~SOFTRESET_6328_PCIE_EXT_MASK;
  73 +       else
  74 +               val &= ~SOFTRESET_6362_PCIE_EXT_MASK;
  75
  76 -       val &= ~SOFTRESET_6328_PCIE_MASK;
  77 -       val &= ~SOFTRESET_6328_PCIE_CORE_MASK;
  78 -       val &= ~SOFTRESET_6328_PCIE_HARD_MASK;
  79 -       val &= ~SOFTRESET_6328_PCIE_EXT_MASK;
  80 -       bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
  81 +       bcm_perf_writel(val, reg);
  82         mdelay(10);
  83
  84 -       val |= SOFTRESET_6328_PCIE_MASK;
  85 -       val |= SOFTRESET_6328_PCIE_CORE_MASK;
  86 -       val |= SOFTRESET_6328_PCIE_HARD_MASK;
  87 -       bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
  88 +       val |= mask;
  89 +       bcm_perf_writel(val, reg);
  90         mdelay(10);
  91
  92 -       val |= SOFTRESET_6328_PCIE_EXT_MASK;
  93 -       bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
  94 +       if (BCMCPU_IS_6328())
  95 +               val |= SOFTRESET_6328_PCIE_EXT_MASK;
  96 +       else
  97 +               val |= SOFTRESET_6362_PCIE_EXT_MASK;
  98 +
  99 +       bcm_perf_writel(val, reg);
 100         mdelay(200);
 101  }
 102
 103 @@ -332,6 +358,7 @@ static int __init bcm63xx_pci_init(void)
 104
 105         switch (bcm63xx_get_cpu_id()) {
 106         case BCM6328_CPU_ID:
 107 +       case BCM6362_CPU_ID:
 108                 return bcm63xx_register_pcie();
 109         case BCM6348_CPU_ID:
 110         case BCM6358_CPU_ID: