bcm63xx: add 3.9 support
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.9 / 023-MIPS-BCM63XX-fix-revision-ID-width.patch
1 From 609c69339a24bd034f5359dad14087276ce5a83f Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Sun, 15 Jan 2012 14:41:22 +0100
4 Subject: [PATCH 2/7] MIPS: BCM63XX: fix revision ID width
5
6 The REVID is only 8 bit wide.
7
8 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
9 ---
10 arch/mips/bcm63xx/cpu.c | 4 ++--
11 arch/mips/bcm63xx/setup.c | 2 +-
12 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 +-
13 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +-
14 4 files changed, 5 insertions(+), 5 deletions(-)
15
16 --- a/arch/mips/bcm63xx/cpu.c
17 +++ b/arch/mips/bcm63xx/cpu.c
18 @@ -25,7 +25,7 @@ const int *bcm63xx_irqs;
19 EXPORT_SYMBOL(bcm63xx_irqs);
20
21 static u16 bcm63xx_cpu_id;
22 -static u16 bcm63xx_cpu_rev;
23 +static u8 bcm63xx_cpu_rev;
24 static unsigned int bcm63xx_cpu_freq;
25 static unsigned int bcm63xx_memory_size;
26
27 @@ -87,7 +87,7 @@ u16 __bcm63xx_get_cpu_id(void)
28
29 EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
30
31 -u16 bcm63xx_get_cpu_rev(void)
32 +u8 bcm63xx_get_cpu_rev(void)
33 {
34 return bcm63xx_cpu_rev;
35 }
36 --- a/arch/mips/bcm63xx/setup.c
37 +++ b/arch/mips/bcm63xx/setup.c
38 @@ -126,7 +126,7 @@ static void __bcm63xx_machine_reboot(cha
39 const char *get_system_type(void)
40 {
41 static char buf[128];
42 - snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
43 + snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)",
44 board_get_name(),
45 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
46 return buf;
47 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
48 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
49 @@ -18,7 +18,7 @@
50
51 void __init bcm63xx_cpu_init(void);
52 u16 __bcm63xx_get_cpu_id(void);
53 -u16 bcm63xx_get_cpu_rev(void);
54 +u8 bcm63xx_get_cpu_rev(void);
55 unsigned int bcm63xx_get_cpu_freq(void);
56
57 #ifdef CONFIG_BCM63XX_CPU_6328
58 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
59 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
60 @@ -10,7 +10,7 @@
61 #define REV_CHIPID_SHIFT 16
62 #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
63 #define REV_REVID_SHIFT 0
64 -#define REV_REVID_MASK (0xffff << REV_REVID_SHIFT)
65 +#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
66
67 /* Clock Control register */
68 #define PERF_CKCTL_REG 0x4