bcm63xx: add 3.9 support
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / patches-3.9 / 409-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch
1 From 261ee140e75615351128eee497e6bbd76686784b Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sat, 12 Nov 2011 12:18:26 +0100
4 Subject: [PATCH 51/72] MIPS: BCM63XX: add HS SPI platform device and register
5 it
6
7 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
8 ---
9 arch/mips/bcm63xx/Makefile | 4 +-
10 arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +
11 arch/mips/bcm63xx/dev-hsspi.c | 57 ++++++++++++++++++++
12 .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 20 +++++++
13 4 files changed, 81 insertions(+), 2 deletions(-)
14 create mode 100644 arch/mips/bcm63xx/dev-hsspi.c
15 create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
16
17 --- a/arch/mips/bcm63xx/Makefile
18 +++ b/arch/mips/bcm63xx/Makefile
19 @@ -1,7 +1,8 @@
20 obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
21 setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
22 - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
23 - dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
24 + dev-hsspi.o dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o \
25 + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
26 + usb-common.o
27 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
28
29 obj-y += boards/
30 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
31 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
32 @@ -26,6 +26,7 @@
33 #include <bcm63xx_dev_enet.h>
34 #include <bcm63xx_dev_dsp.h>
35 #include <bcm63xx_dev_flash.h>
36 +#include <bcm63xx_dev_hsspi.h>
37 #include <bcm63xx_dev_pcmcia.h>
38 #include <bcm63xx_dev_spi.h>
39 #include <bcm63xx_dev_usb_ehci.h>
40 @@ -952,6 +953,7 @@ int __init board_register_devices(void)
41 pr_err(PFX "failed to register fallback SPROM\n");
42 }
43 #endif
44 + bcm63xx_hsspi_register();
45
46 bcm63xx_spi_register();
47
48 --- /dev/null
49 +++ b/arch/mips/bcm63xx/dev-hsspi.c
50 @@ -0,0 +1,60 @@
51 +/*
52 + * This file is subject to the terms and conditions of the GNU General Public
53 + * License. See the file "COPYING" in the main directory of this archive
54 + * for more details.
55 + *
56 + * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
57 + */
58 +
59 +#include <linux/init.h>
60 +#include <linux/kernel.h>
61 +#include <linux/platform_device.h>
62 +
63 +#include <bcm63xx_cpu.h>
64 +#include <bcm63xx_dev_hsspi.h>
65 +#include <bcm63xx_regs.h>
66 +
67 +static struct resource spi_resources[] = {
68 + {
69 + .start = -1, /* filled at runtime */
70 + .end = -1, /* filled at runtime */
71 + .flags = IORESOURCE_MEM,
72 + },
73 + {
74 + .start = -1, /* filled at runtime */
75 + .flags = IORESOURCE_IRQ,
76 + },
77 +};
78 +
79 +static struct bcm63xx_hsspi_pdata spi_pdata = {
80 + .bus_num = 1,
81 +};
82 +
83 +static struct platform_device bcm63xx_hsspi_device = {
84 + .name = "bcm63xx-hsspi",
85 + .id = 0,
86 + .num_resources = ARRAY_SIZE(spi_resources),
87 + .resource = spi_resources,
88 + .dev = {
89 + .platform_data = &spi_pdata,
90 + },
91 +};
92 +
93 +int __init bcm63xx_hsspi_register(void)
94 +{
95 +
96 + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
97 + return -ENODEV;
98 +
99 + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
100 + spi_resources[0].end = spi_resources[0].start;
101 + spi_resources[0].end += RSET_HSSPI_SIZE - 1;
102 + spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
103 +
104 + if (BCMCPU_IS_6328())
105 + spi_pdata.speed_hz = HSSPI_PLL_HZ_6328;
106 + else if (BCMCPU_IS_6362())
107 + spi_pdata.speed_hz = HSSPI_PLL_HZ_6362;
108 +
109 + return platform_device_register(&bcm63xx_hsspi_device);
110 +}
111 --- /dev/null
112 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
113 @@ -0,0 +1,21 @@
114 +#ifndef BCM63XX_DEV_HSSPI_H
115 +#define BCM63XX_DEV_HSSPI_H
116 +
117 +#include <linux/types.h>
118 +#include <bcm63xx_io.h>
119 +#include <bcm63xx_regs.h>
120 +
121 +int __init bcm63xx_hsspi_register(void);
122 +
123 +struct bcm63xx_hsspi_pdata {
124 + int bus_num;
125 + u32 speed_hz;
126 +};
127 +
128 +#define bcm_hsspi_readl(o) bcm_rset_readl(RSET_HSSPI, (o))
129 +#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
130 +
131 +#define HSSPI_PLL_HZ_6328 133333333
132 +#define HSSPI_PLL_HZ_6362 400000000
133 +
134 +#endif /* BCM63XX_DEV_HSSPI_H */