add original danube gpio driver ... already did some minor cleanup
[openwrt/svn-archive/archive.git] / target / linux / danube / files / drivers / char / danube_gpio.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2005 infineon
17 * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/errno.h>
24 #include <linux/proc_fs.h>
25 #include <linux/init.h>
26 #include <linux/ioctl.h>
27 #include <asm/semaphore.h>
28 #include <asm/uaccess.h>
29 #include <asm/danube/danube.h>
30 #include <asm/danube/port.h>
31 #include "port_defs.h"
32
33 #define MAX_PORTS 2 // Number of ports in system
34 #define PINS_PER_PORT 16 // Number of available pins per port
35
36 static int port_major = 0;
37 static int danube_port_pin_usage[MAX_PORTS][PINS_PER_PORT]; // Map for pin usage
38 static u32 danube_port_bases[MAX_PORTS]
39 = { DANUBE_GPIO,
40 DANUBE_GPIO + 0x00000030
41 }; // Base addresses for ports
42
43 static struct semaphore port_sem;
44
45 int
46 danube_port_reserve_pin (int port, int pin, int module_id)
47 {
48 if (port < 0 || pin < 0)
49 return -EINVAL;
50 if (port > MAX_PORTS || pin > PINS_PER_PORT)
51 return -EINVAL;
52
53 if (danube_port_pin_usage[port][pin] == 0) {
54 danube_port_pin_usage[port][pin] = module_id;
55 }
56 else {
57 return -EBUSY;
58 }
59
60 return OK;
61 }
62
63 int
64 danube_port_free_pin (int port, int pin, int module_id)
65 {
66
67 if (port < 0 || pin < 0)
68 return -EINVAL;
69 if (port > MAX_PORTS || pin > PINS_PER_PORT)
70 return -EINVAL;
71
72 if (danube_port_pin_usage[port][pin] != module_id)
73 return -EBUSY;
74 danube_port_pin_usage[port][pin] = 0;
75
76 return OK;
77 }
78
79 int
80 danube_port_set_open_drain (int port, int pin, int module_id)
81 {
82 u32 reg;
83
84 if (port < 0 || pin < 0)
85 return -EINVAL;
86 if (port > MAX_PORTS || pin > PINS_PER_PORT)
87 return -EINVAL;
88
89 if (danube_port_pin_usage[port][pin] != module_id)
90 return -EBUSY;
91
92 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
93 reg |= (1 << pin);
94 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
95
96 return OK;
97 }
98
99 int
100 danube_port_clear_open_drain (int port, int pin, int module_id)
101 {
102 u32 reg;
103
104 if (port < 0 || pin < 0)
105 return -EINVAL;
106 if (port > MAX_PORTS || pin > PINS_PER_PORT)
107 return -EINVAL;
108
109 if (danube_port_pin_usage[port][pin] != module_id)
110 return -EBUSY;
111
112 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
113 reg &= ~(1 << pin);
114 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
115
116 return OK;
117 }
118
119 int
120 danube_port_set_pudsel (int port, int pin, int module_id)
121 {
122 u32 reg;
123
124 if (port < 0 || pin < 0)
125 return -EINVAL;
126 if (port > MAX_PORTS || pin > PINS_PER_PORT)
127 return -EINVAL;
128
129 if (danube_port_pin_usage[port][pin] != module_id)
130 return -EBUSY;
131
132 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG, reg);
133 reg |= (1 << pin);
134 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG,
135 reg);
136
137 return OK;
138 }
139
140 int
141 danube_port_clear_pudsel (int port, int pin, int module_id)
142 {
143 u32 reg;
144
145 if (port < 0 || pin < 0)
146 return -EINVAL;
147 if (port > MAX_PORTS || pin > PINS_PER_PORT)
148 return -EINVAL;
149
150 if (danube_port_pin_usage[port][pin] != module_id)
151 return -EBUSY;
152
153 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG, reg);
154 reg &= ~(1 << pin);
155 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG,
156 reg);
157
158 return OK;
159 }
160
161 int
162 danube_port_set_puden (int port, int pin, int module_id)
163 {
164 u32 reg;
165
166 if (port < 0 || pin < 0)
167 return -EINVAL;
168 if (port > MAX_PORTS || pin > PINS_PER_PORT)
169 return -EINVAL;
170
171 if (danube_port_pin_usage[port][pin] != module_id)
172 return -EBUSY;
173
174 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
175 reg |= (1 << pin);
176 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
177
178 return OK;
179 }
180
181 int
182 danube_port_clear_puden (int port, int pin, int module_id)
183 {
184 u32 reg;
185
186 if (port < 0 || pin < 0)
187 return -EINVAL;
188 if (port > MAX_PORTS || pin > PINS_PER_PORT)
189 return -EINVAL;
190
191 if (danube_port_pin_usage[port][pin] != module_id)
192 return -EBUSY;
193
194 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
195 reg &= ~(1 << pin);
196 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
197
198 return OK;
199 }
200
201 int
202 danube_port_set_stoff (int port, int pin, int module_id)
203 {
204 u32 reg;
205
206 if (port < 0 || pin < 0)
207 return -EINVAL;
208 if (port > MAX_PORTS || pin > PINS_PER_PORT)
209 return -EINVAL;
210
211 if (danube_port_pin_usage[port][pin] != module_id)
212 return -EBUSY;
213
214 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
215 reg |= (1 << pin);
216 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
217
218 return OK;
219 }
220
221 int
222 danube_port_clear_stoff (int port, int pin, int module_id)
223 {
224 u32 reg;
225
226 if (port < 0 || pin < 0)
227 return -EINVAL;
228 if (port > MAX_PORTS || pin > PINS_PER_PORT)
229 return -EINVAL;
230
231 if (danube_port_pin_usage[port][pin] != module_id)
232 return -EBUSY;
233
234 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
235 reg &= ~(1 << pin);
236 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
237
238 return OK;
239 }
240
241 int
242 danube_port_set_dir_out (int port, int pin, int module_id)
243 {
244 u32 reg;
245
246 if (port < 0 || pin < 0)
247 return -EINVAL;
248 if (port > MAX_PORTS || pin > PINS_PER_PORT)
249 return -EINVAL;
250
251 if (danube_port_pin_usage[port][pin] != module_id)
252 return -EBUSY;
253
254 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
255 reg |= (1 << pin);
256 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
257
258 return OK;
259 }
260
261 int
262 danube_port_set_dir_in (int port, int pin, int module_id)
263 {
264 u32 reg;
265
266 if (port < 0 || pin < 0)
267 return -EINVAL;
268 if (port > MAX_PORTS || pin > PINS_PER_PORT)
269 return -EINVAL;
270
271 if (danube_port_pin_usage[port][pin] != module_id)
272 return -EBUSY;
273
274 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
275 reg &= ~(1 << pin);
276 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
277
278 return OK;
279 }
280
281 int
282 danube_port_set_output (int port, int pin, int module_id)
283 {
284 u32 reg;
285
286 if (port < 0 || pin < 0)
287 return -EINVAL;
288 if (port > MAX_PORTS || pin > PINS_PER_PORT)
289 return -EINVAL;
290
291 if (danube_port_pin_usage[port][pin] != module_id)
292 return -EBUSY;
293
294 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
295 reg |= (1 << pin);
296 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
297
298 return OK;
299 }
300
301 int
302 danube_port_clear_output (int port, int pin, int module_id)
303 {
304 u32 reg;
305
306 if (port < 0 || pin < 0)
307 return -EINVAL;
308 if (port > MAX_PORTS || pin > PINS_PER_PORT)
309 return -EINVAL;
310
311 if (danube_port_pin_usage[port][pin] != module_id)
312 return -EBUSY;
313
314 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
315 reg &= ~(1 << pin);
316 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
317
318 return OK;
319 }
320
321 int
322 danube_port_get_input (int port, int pin, int module_id)
323 {
324 u32 reg;
325
326 if (port < 0 || pin < 0)
327 return -EINVAL;
328 if (port > MAX_PORTS || pin > PINS_PER_PORT)
329 return -EINVAL;
330
331 if (danube_port_pin_usage[port][pin] != module_id)
332 return -EBUSY;
333
334 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_IN_REG, reg);
335 reg &= (1 << pin);
336 if (reg == 0x00)
337 return 0;
338 else
339 return 1;
340 }
341
342 int
343 danube_port_set_altsel0 (int port, int pin, int module_id)
344 {
345 u32 reg;
346
347 if (port < 0 || pin < 0)
348 return -EINVAL;
349 if (port > MAX_PORTS || pin > PINS_PER_PORT)
350 return -EINVAL;
351
352 if (danube_port_pin_usage[port][pin] != module_id)
353 return -EBUSY;
354
355 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
356 reg);
357 reg |= (1 << pin);
358 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
359 reg);
360
361 return OK;
362 }
363
364 int
365 danube_port_clear_altsel0 (int port, int pin, int module_id)
366 {
367 u32 reg;
368
369 if (port < 0 || pin < 0)
370 return -EINVAL;
371 if (port > MAX_PORTS || pin > PINS_PER_PORT)
372 return -EINVAL;
373
374 if (danube_port_pin_usage[port][pin] != module_id)
375 return -EBUSY;
376
377 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
378 reg);
379 reg &= ~(1 << pin);
380 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
381 reg);
382
383 return OK;
384 }
385
386 int
387 danube_port_set_altsel1 (int port, int pin, int module_id)
388 {
389 u32 reg;
390
391 if (port < 0 || pin < 0)
392 return -EINVAL;
393 if (port > MAX_PORTS || pin > PINS_PER_PORT)
394 return -EINVAL;
395
396 if (danube_port_pin_usage[port][pin] != module_id)
397 return -EBUSY;
398
399 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
400 reg);
401 reg |= (1 << pin);
402 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
403 reg);
404
405 return OK;
406 }
407
408 int
409 danube_port_clear_altsel1 (int port, int pin, int module_id)
410 {
411 u32 reg;
412
413 if (port < 0 || pin < 0)
414 return -EINVAL;
415 if (port > MAX_PORTS || pin > PINS_PER_PORT)
416 return -EINVAL;
417
418 if (danube_port_pin_usage[port][pin] != module_id)
419 return -EBUSY;
420
421 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
422 reg);
423 reg &= ~(1 << pin);
424 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
425 reg);
426
427 return OK;
428 }
429
430 int
431 danube_port_read_procmem (char *buf, char **start, off_t offset, int count,
432 int *eof, void *data)
433 {
434 long len = 0;
435 int t = 0;
436 u32 bit = 0;
437 u32 reg = 0;
438
439 len = sprintf (buf, "\nDanube Port Settings\n");
440
441 len = len + sprintf (buf + len,
442 " 3 2 1 0\n");
443 len = len + sprintf (buf + len,
444 " 10987654321098765432109876543210\n");
445 len = len + sprintf (buf + len,
446 "----------------------------------------\n");
447
448 len = len + sprintf (buf + len, "\nP0-OUT: ");
449 PORT_READ_REG (DANUBE_GPIO_P0_OUT, reg);
450 bit = 0x80000000;
451 for (t = 0; t < 32; t++) {
452 if ((reg & bit) > 0)
453 len = len + sprintf (buf + len, "X");
454 else
455 len = len + sprintf (buf + len, " ");
456 bit = bit >> 1;
457 }
458
459 len = len + sprintf (buf + len, "\nP1-OUT: ");
460 PORT_READ_REG (DANUBE_GPIO_P1_OUT, reg);
461 bit = 0x80000000;
462 for (t = 0; t < 32; t++) {
463 if ((reg & bit) > 0)
464 len = len + sprintf (buf + len, "X");
465 else
466 len = len + sprintf (buf + len, " ");
467 bit = bit >> 1;
468 }
469
470 len = len + sprintf (buf + len, "\nP0-IN: ");
471 PORT_READ_REG (DANUBE_GPIO_P0_IN, reg);
472 bit = 0x80000000;
473 for (t = 0; t < 32; t++) {
474 if ((reg & bit) > 0)
475 len = len + sprintf (buf + len, "X");
476 else
477 len = len + sprintf (buf + len, " ");
478 bit = bit >> 1;
479 }
480
481 len = len + sprintf (buf + len, "\nP1-IN: ");
482 PORT_READ_REG (DANUBE_GPIO_P1_IN, reg);
483 bit = 0x80000000;
484 for (t = 0; t < 32; t++) {
485 if ((reg & bit) > 0)
486 len = len + sprintf (buf + len, "X");
487 else
488 len = len + sprintf (buf + len, " ");
489 bit = bit >> 1;
490 }
491
492 len = len + sprintf (buf + len, "\nP0-DIR: ");
493 PORT_READ_REG (DANUBE_GPIO_P0_DIR, reg);
494 bit = 0x80000000;
495 for (t = 0; t < 32; t++) {
496 if ((reg & bit) > 0)
497 len = len + sprintf (buf + len, "X");
498 else
499 len = len + sprintf (buf + len, " ");
500 bit = bit >> 1;
501 }
502
503 len = len + sprintf (buf + len, "\nP1-DIR: ");
504 PORT_READ_REG (DANUBE_GPIO_P1_DIR, reg);
505 bit = 0x80000000;
506 for (t = 0; t < 32; t++) {
507 if ((reg & bit) > 0)
508 len = len + sprintf (buf + len, "X");
509 else
510 len = len + sprintf (buf + len, " ");
511 bit = bit >> 1;
512 }
513
514 len = len + sprintf (buf + len, "\nP0-STO: ");
515 PORT_READ_REG (DANUBE_GPIO_P0_STOFF, reg);
516 bit = 0x80000000;
517 for (t = 0; t < 32; t++) {
518 if ((reg & bit) > 0)
519 len = len + sprintf (buf + len, "X");
520 else
521 len = len + sprintf (buf + len, " ");
522 bit = bit >> 1;
523 }
524
525 len = len + sprintf (buf + len, "\nP1-STO: ");
526 PORT_READ_REG (DANUBE_GPIO_P1_STOFF, reg);
527 bit = 0x80000000;
528 for (t = 0; t < 32; t++) {
529 if ((reg & bit) > 0)
530 len = len + sprintf (buf + len, "X");
531 else
532 len = len + sprintf (buf + len, " ");
533 bit = bit >> 1;
534 }
535
536 len = len + sprintf (buf + len, "\nP0-PUDE:");
537 PORT_READ_REG (DANUBE_GPIO_P0_PUDEN, reg);
538 bit = 0x80000000;
539 for (t = 0; t < 32; t++) {
540 if ((reg & bit) > 0)
541 len = len + sprintf (buf + len, "X");
542 else
543 len = len + sprintf (buf + len, " ");
544 bit = bit >> 1;
545 }
546
547 len = len + sprintf (buf + len, "\nP1-PUDE:");
548 PORT_READ_REG (DANUBE_GPIO_P1_PUDEN, reg);
549 bit = 0x80000000;
550 for (t = 0; t < 32; t++) {
551 if ((reg & bit) > 0)
552 len = len + sprintf (buf + len, "X");
553 else
554 len = len + sprintf (buf + len, " ");
555 bit = bit >> 1;
556 }
557
558 len = len + sprintf (buf + len, "\nP0-OD: ");
559 PORT_READ_REG (DANUBE_GPIO_P0_OD, reg);
560 bit = 0x80000000;
561 for (t = 0; t < 32; t++) {
562 if ((reg & bit) > 0)
563 len = len + sprintf (buf + len, "X");
564 else
565 len = len + sprintf (buf + len, " ");
566 bit = bit >> 1;
567 }
568
569 len = len + sprintf (buf + len, "\nP1-OD: ");
570 PORT_READ_REG (DANUBE_GPIO_P1_OD, reg);
571 bit = 0x80000000;
572 for (t = 0; t < 32; t++) {
573 if ((reg & bit) > 0)
574 len = len + sprintf (buf + len, "X");
575 else
576 len = len + sprintf (buf + len, " ");
577 bit = bit >> 1;
578 }
579
580 len = len + sprintf (buf + len, "\nP0-PUDS:");
581 PORT_READ_REG (DANUBE_GPIO_P0_PUDSEL, reg);
582 bit = 0x80000000;
583 for (t = 0; t < 32; t++) {
584 if ((reg & bit) > 0)
585 len = len + sprintf (buf + len, "X");
586 else
587 len = len + sprintf (buf + len, " ");
588 bit = bit >> 1;
589 }
590
591 len = len + sprintf (buf + len, "\nP1-PUDS:");
592 PORT_READ_REG (DANUBE_GPIO_P1_PUDSEL, reg);
593 bit = 0x80000000;
594 for (t = 0; t < 32; t++) {
595 if ((reg & bit) > 0)
596 len = len + sprintf (buf + len, "X");
597 else
598 len = len + sprintf (buf + len, " ");
599 bit = bit >> 1;
600 }
601
602 len = len + sprintf (buf + len, "\nP0_ALT0:");
603 PORT_READ_REG (DANUBE_GPIO_P0_ALTSEL0, reg);
604 bit = 0x80000000;
605 for (t = 0; t < 32; t++) {
606 if ((reg & bit) > 0)
607 len = len + sprintf (buf + len, "X");
608 else
609 len = len + sprintf (buf + len, " ");
610 bit = bit >> 1;
611 }
612
613 len = len + sprintf (buf + len, "\nP0_ALT1:");
614 PORT_READ_REG (DANUBE_GPIO_P0_ALTSEL1, reg);
615 bit = 0x80000000;
616 for (t = 0; t < 32; t++) {
617 if ((reg & bit) > 0)
618 len = len + sprintf (buf + len, "X");
619 else
620 len = len + sprintf (buf + len, " ");
621 bit = bit >> 1;
622 }
623
624 len = len + sprintf (buf + len, "\nP1_ALT0:");
625 PORT_READ_REG (DANUBE_GPIO_P1_ALTSEL0, reg);
626 bit = 0x80000000;
627 for (t = 0; t < 32; t++) {
628 if ((reg & bit) > 0)
629 len = len + sprintf (buf + len, "X");
630 else
631 len = len + sprintf (buf + len, " ");
632 bit = bit >> 1;
633 }
634
635 len = len + sprintf (buf + len, "\nP1_ALT1:");
636 PORT_READ_REG (DANUBE_GPIO_P1_ALTSEL1, reg);
637 bit = 0x80000000;
638 for (t = 0; t < 32; t++) {
639 if ((reg & bit) > 0)
640 len = len + sprintf (buf + len, "X");
641 else
642 len = len + sprintf (buf + len, " ");
643 bit = bit >> 1;
644 }
645
646 len = len + sprintf (buf + len, "\n\n");
647
648 *eof = 1; // No more data available
649 return len;
650 }
651
652 static int
653 danube_port_open (struct inode *inode, struct file *filep)
654 {
655 return OK;
656 }
657
658 static int
659 danube_port_release (struct inode *inode, struct file *filelp)
660 {
661 return OK;
662 }
663
664 static int
665 danube_port_ioctl (struct inode *inode, struct file *filp,
666 unsigned int cmd, unsigned long arg)
667 {
668 int ret = 0;
669 volatile struct danube_port_ioctl_parm parm;
670
671 if (_IOC_TYPE (cmd) != DANUBE_PORT_IOC_MAGIC)
672 return -EINVAL;
673
674 if (_IOC_DIR (cmd) & _IOC_WRITE) {
675 if (!access_ok
676 (VERIFY_READ, arg,
677 sizeof (struct danube_port_ioctl_parm)))
678 return -EFAULT;
679 ret = copy_from_user ((void *) &parm, (void *) arg,
680 sizeof (struct danube_port_ioctl_parm));
681 }
682 if (_IOC_DIR (cmd) & _IOC_READ) {
683 if (!access_ok
684 (VERIFY_WRITE, arg,
685 sizeof (struct danube_port_ioctl_parm)))
686 return -EFAULT;
687 }
688
689 if (down_trylock (&port_sem) != 0)
690 return -EBUSY;
691
692 switch (cmd) {
693 case DANUBE_PORT_IOCOD:
694 if (parm.value == 0x00) {
695 PORT_IOC_CALL (ret, parm.port, parm.pin,
696 danube_port_clear_open_drain);
697 }
698 else {
699 PORT_IOC_CALL (ret, parm.port, parm.pin,
700 danube_port_set_open_drain);
701 }
702 break;
703 case DANUBE_PORT_IOCPUDSEL:
704 if (parm.value == 0x00) {
705 PORT_IOC_CALL (ret, parm.port, parm.pin,
706 danube_port_clear_pudsel);
707 }
708 else {
709 PORT_IOC_CALL (ret, parm.port, parm.pin,
710 danube_port_set_pudsel);
711 }
712 break;
713 case DANUBE_PORT_IOCPUDEN:
714 if (parm.value == 0x00) {
715 PORT_IOC_CALL (ret, parm.port, parm.pin,
716 danube_port_clear_puden);
717 }
718 else {
719 PORT_IOC_CALL (ret, parm.port, parm.pin,
720 danube_port_set_puden);
721 }
722 break;
723 case DANUBE_PORT_IOCSTOFF:
724 if (parm.value == 0x00) {
725 PORT_IOC_CALL (ret, parm.port, parm.pin,
726 danube_port_clear_stoff);
727 }
728 else {
729 PORT_IOC_CALL (ret, parm.port, parm.pin,
730 danube_port_set_stoff);
731 }
732 break;
733 case DANUBE_PORT_IOCDIR:
734 if (parm.value == 0x00) {
735 PORT_IOC_CALL (ret, parm.port, parm.pin,
736 danube_port_set_dir_in);
737 }
738 else {
739 PORT_IOC_CALL (ret, parm.port, parm.pin,
740 danube_port_set_dir_out);
741 }
742 break;
743 case DANUBE_PORT_IOCOUTPUT:
744 if (parm.value == 0x00) {
745 PORT_IOC_CALL (ret, parm.port, parm.pin,
746 danube_port_clear_output);
747 }
748 else {
749 PORT_IOC_CALL (ret, parm.port, parm.pin,
750 danube_port_set_output);
751 }
752 break;
753 case DANUBE_PORT_IOCALTSEL0:
754 if (parm.value == 0x00) {
755 PORT_IOC_CALL (ret, parm.port, parm.pin,
756 danube_port_clear_altsel0);
757 }
758 else {
759 PORT_IOC_CALL (ret, parm.port, parm.pin,
760 danube_port_set_altsel0);
761 }
762 break;
763 case DANUBE_PORT_IOCALTSEL1:
764 if (parm.value == 0x00) {
765 PORT_IOC_CALL (ret, parm.port, parm.pin,
766 danube_port_clear_altsel1);
767 }
768 else {
769 PORT_IOC_CALL (ret, parm.port, parm.pin,
770 danube_port_set_altsel1);
771 }
772 break;
773 case DANUBE_PORT_IOCINPUT:
774 ret = danube_port_reserve_pin (parm.port, parm.pin,
775 PORT_MODULE_ID);
776 if (ret == 0)
777 parm.value =
778 danube_port_get_input (parm.port, parm.pin,
779 PORT_MODULE_ID);
780 ret = danube_port_free_pin (parm.port, parm.pin,
781 PORT_MODULE_ID);
782 copy_to_user ((void *) arg, (void *) &parm,
783 sizeof (struct danube_port_ioctl_parm));
784 break;
785 default:
786 ret = -EINVAL;
787 }
788
789 up (&port_sem);
790
791 return ret;
792 }
793
794 static struct file_operations port_fops = {
795 open:danube_port_open,
796 release:danube_port_release,
797 ioctl:danube_port_ioctl
798 };
799
800 int __init
801 danube_port_init (void)
802 {
803 int t = 0;
804 int i = 0;
805 int err = 0;
806 u32 pins = 0;
807
808 printk ("Danube Port Initialization\n");
809
810 sema_init (&port_sem, 1);
811
812 /* Check ports for available pins */
813 for (t = 0; t < MAX_PORTS; t++) {
814 for (i = 0; i < PINS_PER_PORT; i++)
815 danube_port_pin_usage[t][i] = 0;
816 }
817
818 /* register port device */
819 err = register_chrdev (0, "danube-port", &port_fops);
820 if (err > 0)
821 port_major = err;
822 else {
823 printk ("danube-port: Error! Could not register port device. #%d\n", err);
824 return err;
825 }
826
827 /* Create proc file */
828 create_proc_read_entry ("driver/danube_port", 0, NULL,
829 danube_port_read_procmem, NULL);
830
831 return OK;
832 }
833
834 module_init (danube_port_init);
835
836 EXPORT_SYMBOL (danube_port_reserve_pin);
837 EXPORT_SYMBOL (danube_port_free_pin);
838 EXPORT_SYMBOL (danube_port_set_open_drain);
839 EXPORT_SYMBOL (danube_port_clear_open_drain);
840 EXPORT_SYMBOL (danube_port_set_pudsel);
841 EXPORT_SYMBOL (danube_port_clear_pudsel);
842 EXPORT_SYMBOL (danube_port_set_puden);
843 EXPORT_SYMBOL (danube_port_clear_puden);
844 EXPORT_SYMBOL (danube_port_set_stoff);
845 EXPORT_SYMBOL (danube_port_clear_stoff);
846 EXPORT_SYMBOL (danube_port_set_dir_out);
847 EXPORT_SYMBOL (danube_port_set_dir_in);
848 EXPORT_SYMBOL (danube_port_set_output);
849 EXPORT_SYMBOL (danube_port_clear_output);
850 EXPORT_SYMBOL (danube_port_get_input);
851
852 EXPORT_SYMBOL (danube_port_set_altsel0);
853 EXPORT_SYMBOL (danube_port_clear_altsel0);
854 EXPORT_SYMBOL (danube_port_set_altsel1);
855 EXPORT_SYMBOL (danube_port_clear_altsel1);