gemini: add 3.18 support
[openwrt/svn-archive/archive.git] / target / linux / gemini / patches-3.18 / 130-usb-ehci-fot2g.patch
1 --- a/arch/arm/mach-gemini/devices.c 2011-04-23 01:00:16.738137491 +0200
2 +++ b/arch/arm/mach-gemini/devices.c 2011-04-23 01:06:55.539299920 +0200
3 @@ -188,3 +188,64 @@
4
5 return platform_device_register(&ethernet_device);
6 }
7 +
8 +static struct resource usb0_resources[] = {
9 + {
10 + .start = GEMINI_USB0_BASE,
11 + .end = GEMINI_USB0_BASE + 0xfff,
12 + .flags = IORESOURCE_MEM,
13 + },
14 + {
15 + .start = IRQ_USB0,
16 + .end = IRQ_USB0,
17 + .flags = IORESOURCE_IRQ,
18 + },
19 +};
20 +
21 +static struct resource usb1_resources[] = {
22 + {
23 + .start = GEMINI_USB1_BASE,
24 + .end = GEMINI_USB1_BASE + 0xfff,
25 + .flags = IORESOURCE_MEM,
26 + },
27 + {
28 + .start = IRQ_USB1,
29 + .end = IRQ_USB1,
30 + .flags = IORESOURCE_IRQ,
31 + },
32 +};
33 +
34 +static u64 usb0_dmamask = 0xffffffffUL;
35 +static u64 usb1_dmamask = 0xffffffffUL;
36 +
37 +static struct platform_device usb_device[] = {
38 + {
39 + .name = "ehci-fotg2",
40 + .id = 0,
41 + .dev = {
42 + .dma_mask = &usb0_dmamask,
43 + .coherent_dma_mask = 0xffffffff,
44 + },
45 + .num_resources = ARRAY_SIZE(usb0_resources),
46 + .resource = usb0_resources,
47 + },
48 + {
49 + .name = "ehci-fotg2",
50 + .id = 1,
51 + .dev = {
52 + .dma_mask = &usb1_dmamask,
53 + .coherent_dma_mask = 0xffffffff,
54 + },
55 + .num_resources = ARRAY_SIZE(usb1_resources),
56 + .resource = usb1_resources,
57 + },
58 +};
59 +
60 +int __init platform_register_usb(unsigned int id)
61 +{
62 + if (id > 1)
63 + return -EINVAL;
64 +
65 + return platform_device_register(&usb_device[id]);
66 +}
67 +
68 --- a/arch/arm/mach-gemini/common.h 2011-04-23 01:09:31.413161153 +0200
69 +++ b/arch/arm/mach-gemini/common.h 2011-04-23 01:09:52.426358514 +0200
70 @@ -28,6 +28,7 @@
71 unsigned int nr_parts);
72 extern int platform_register_watchdog(void);
73 extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
74 +extern int platform_register_usb(unsigned int id);
75
76 extern void gemini_restart(enum reboot_mode mode, const char *cmd);
77
78 --- a/drivers/usb/host/ehci-hcd.c
79 +++ b/drivers/usb/host/ehci-hcd.c
80 @@ -345,12 +345,14 @@ static void ehci_silence_controller(struct ehci_hcd *ehci)
81 spin_lock_irq(&ehci->lock);
82 ehci->rh_state = EHCI_RH_HALTED;
83 ehci_turn_off_all_ports(ehci);
84
85 +#ifndef CONFIG_ARCH_GEMINI
86 /* make BIOS/etc use companion controller during reboot */
87 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
88
89 /* unblock posted writes */
90 ehci_readl(ehci, &ehci->regs->configured_flag);
91 +#endif
92 spin_unlock_irq(&ehci->lock);
93 }
94
95 @@ -602,7 +604,9 @@ static int ehci_run (struct usb_hcd *hcd)
96 // Philips, Intel, and maybe others need CMD_RUN before the
97 // root hub will detect new devices (why?); NEC doesn't
98 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
99 +#ifndef CONFIG_ARCH_GEMINI
100 ehci->command |= CMD_RUN;
101 +#endif
102 ehci_writel(ehci, ehci->command, &ehci->regs->command);
103 dbg_cmd (ehci, "init", ehci->command);
104
105 @@ -622,9 +626,11 @@ static int ehci_run (struct usb_hcd *hcd)
106 */
107 down_write(&ehci_cf_port_reset_rwsem);
108 ehci->rh_state = EHCI_RH_RUNNING;
109 +#ifndef CONFIG_ARCH_GEMINI
110 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
111 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
112 msleep(5);
113 +#endif
114 up_write(&ehci_cf_port_reset_rwsem);
115 ehci->last_periodic_enable = ktime_get_real();
116
117 @@ -762,9 +768,10 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
118 pcd_status = status;
119
120 /* resume root hub? */
121 +#ifndef CONFIG_ARCH_GEMINI
122 if (ehci->rh_state == EHCI_RH_SUSPENDED)
123 usb_hcd_resume_root_hub(hcd);
124 -
125 +#endif
126 /* get per-port change detect bits */
127 if (ehci->has_ppcd)
128 ppcd = status >> 16;
129 @@ -1243,6 +1250,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
130 MODULE_AUTHOR (DRIVER_AUTHOR);
131 MODULE_LICENSE ("GPL");
132
133 +#ifdef CONFIG_ARCH_GEMINI
134 +#include "ehci-fotg2.c"
135 +#define PLATFORM_DRIVER ehci_fotg2_driver
136 +#endif
137 +
138 #ifdef CONFIG_USB_EHCI_FSL
139 #include "ehci-fsl.c"
140 #define PLATFORM_DRIVER ehci_fsl_driver
141 --- a/drivers/usb/host/ehci-timer.c 2012-12-24 18:35:19.695560879 +0100
142 +++ b/drivers/usb/host/ehci-timer.c 2012-12-24 18:39:39.813308000 +0100
143 @@ -208,7 +208,9 @@
144
145 /* Clean up the mess */
146 ehci->rh_state = EHCI_RH_HALTED;
147 +#ifndef CONFIG_ARCH_GEMINI
148 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
149 +#endif
150 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
151 ehci_work(ehci);
152 end_unlink_async(ehci);
153 --- a/drivers/usb/host/ehci.h
154 +++ b/drivers/usb/host/ehci.h
155 @@ -656,7 +656,12 @@ static inline unsigned int
156 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
157 {
158 if (ehci_is_TDI(ehci)) {
159 - switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
160 +#ifdef CONFIG_ARCH_GEMINI
161 + portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
162 + switch ((portsc>>22)&3) {
163 +#else
164 + switch ((portsc>>26)&3) {
165 +#endif
166 case 0:
167 return 0;
168 case 1:
169 --- a/drivers/usb/host/ehci-hub.c
170 +++ b/drivers/usb/host/ehci-hub.c
171 @@ -1072,6 +1072,11 @@ static int ehci_hub_control (
172 /* see what we found out */
173 temp = check_reset_complete (ehci, wIndex, status_reg,
174 ehci_readl(ehci, status_reg));
175 +#ifdef CONFIG_ARCH_GEMINI
176 + /* restart schedule */
177 + ehci->command |= CMD_RUN;
178 + ehci_writel(ehci, ehci->command, &ehci->regs->command);
179 +#endif
180 }
181
182 /* transfer dedicated ports to the companion hc */
183 --- a/include/linux/usb/ehci_def.h 2012-12-24 15:01:10.168320497 +0100
184 +++ b/include/linux/usb/ehci_def.h 2012-12-24 15:11:43.335575000 +0100
185 @@ -110,9 +110,14 @@
186 u32 frame_list; /* points to periodic list */
187 /* ASYNCLISTADDR: offset 0x18 */
188 u32 async_next; /* address of next async queue head */
189 -
190 +#ifndef CONFIG_ARCH_GEMINI
191 u32 reserved1[2];
192 -
193 +#else
194 + u32 reserved1;
195 + /* PORTSC: offset 0x20 for Faraday OTG */
196 + u32 port_status[1];
197 +#endif
198 +
199 /* TXFILLTUNING: offset 0x24 */
200 u32 txfill_tuning; /* TX FIFO Tuning register */
201 #define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
202 @@ -123,8 +128,11 @@
203 u32 configured_flag;
204 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
205
206 +#ifndef CONFIG_ARCH_GEMINI
207 /* PORTSC: offset 0x44 */
208 u32 port_status[0]; /* up to N_PORTS */
209 +#endif
210 +
211 /* EHCI 1.1 addendum */
212 #define PORTSC_SUSPEND_STS_ACK 0
213 #define PORTSC_SUSPEND_STS_NYET 1