80fb4d40f893b6ff277cdee58203ef330925de45
[openwrt/svn-archive/archive.git] / target / linux / generic-2.6 / patches-2.6.25 / 009-revert_intel_flash_breakage.patch
1 Index: linux-2.6.23-rc6/drivers/mtd/chips/cfi_cmdset_0001.c
2 ===================================================================
3 --- linux-2.6.23-rc6.orig/drivers/mtd/chips/cfi_cmdset_0001.c 2007-09-21 16:23:54.000000000 +0800
4 +++ linux-2.6.23-rc6/drivers/mtd/chips/cfi_cmdset_0001.c 2007-09-21 16:23:57.000000000 +0800
5 @@ -933,7 +933,7 @@
6
7 static int __xipram xip_wait_for_operation(
8 struct map_info *map, struct flchip *chip,
9 - unsigned long adr, unsigned int chip_op_time )
10 + unsigned long adr, int *chip_op_time )
11 {
12 struct cfi_private *cfi = map->fldrv_priv;
13 struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
14 @@ -942,7 +942,7 @@
15 flstate_t oldstate, newstate;
16
17 start = xip_currtime();
18 - usec = chip_op_time * 8;
19 + usec = *chip_op_time * 8;
20 if (usec == 0)
21 usec = 500000;
22 done = 0;
23 @@ -1052,8 +1052,8 @@
24 #define XIP_INVAL_CACHED_RANGE(map, from, size) \
25 INVALIDATE_CACHED_RANGE(map, from, size)
26
27 -#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \
28 - xip_wait_for_operation(map, chip, cmd_adr, usec)
29 +#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
30 + xip_wait_for_operation(map, chip, cmd_adr, p_usec)
31
32 #else
33
34 @@ -1065,65 +1065,65 @@
35 static int inval_cache_and_wait_for_operation(
36 struct map_info *map, struct flchip *chip,
37 unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
38 - unsigned int chip_op_time)
39 + int *chip_op_time )
40 {
41 struct cfi_private *cfi = map->fldrv_priv;
42 map_word status, status_OK = CMD(0x80);
43 - int chip_state = chip->state;
44 - unsigned int timeo, sleep_time;
45 + int z, chip_state = chip->state;
46 + unsigned long timeo;
47
48 spin_unlock(chip->mutex);
49 if (inval_len)
50 INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
51 + if (*chip_op_time)
52 + cfi_udelay(*chip_op_time);
53 spin_lock(chip->mutex);
54
55 - /* set our timeout to 8 times the expected delay */
56 - timeo = chip_op_time * 8;
57 - if (!timeo)
58 - timeo = 500000;
59 - sleep_time = chip_op_time / 2;
60 + timeo = *chip_op_time * 8 * HZ / 1000000;
61 + if (timeo < HZ/2)
62 + timeo = HZ/2;
63 + timeo += jiffies;
64
65 + z = 0;
66 for (;;) {
67 + if (chip->state != chip_state) {
68 + /* Someone's suspended the operation: sleep */
69 + DECLARE_WAITQUEUE(wait, current);
70 +
71 + set_current_state(TASK_UNINTERRUPTIBLE);
72 + add_wait_queue(&chip->wq, &wait);
73 + spin_unlock(chip->mutex);
74 + schedule();
75 + remove_wait_queue(&chip->wq, &wait);
76 + timeo = jiffies + (HZ / 2); /* FIXME */
77 + spin_lock(chip->mutex);
78 + continue;
79 + }
80 +
81 status = map_read(map, cmd_adr);
82 if (map_word_andequal(map, status, status_OK, status_OK))
83 break;
84
85 - if (!timeo) {
86 + /* OK Still waiting */
87 + if (time_after(jiffies, timeo)) {
88 map_write(map, CMD(0x70), cmd_adr);
89 chip->state = FL_STATUS;
90 return -ETIME;
91 }
92
93 - /* OK Still waiting. Drop the lock, wait a while and retry. */
94 + /* Latency issues. Drop the lock, wait a while and retry */
95 + z++;
96 spin_unlock(chip->mutex);
97 - if (sleep_time >= 1000000/HZ) {
98 - /*
99 - * Half of the normal delay still remaining
100 - * can be performed with a sleeping delay instead
101 - * of busy waiting.
102 - */
103 - msleep(sleep_time/1000);
104 - timeo -= sleep_time;
105 - sleep_time = 1000000/HZ;
106 - } else {
107 - udelay(1);
108 - cond_resched();
109 - timeo--;
110 - }
111 + cfi_udelay(1);
112 spin_lock(chip->mutex);
113 -
114 - while (chip->state != chip_state) {
115 - /* Someone's suspended the operation: sleep */
116 - DECLARE_WAITQUEUE(wait, current);
117 - set_current_state(TASK_UNINTERRUPTIBLE);
118 - add_wait_queue(&chip->wq, &wait);
119 - spin_unlock(chip->mutex);
120 - schedule();
121 - remove_wait_queue(&chip->wq, &wait);
122 - spin_lock(chip->mutex);
123 - }
124 }
125
126 + if (!z) {
127 + if (!--(*chip_op_time))
128 + *chip_op_time = 1;
129 + } else if (z > 1)
130 + ++(*chip_op_time);
131 +
132 /* Done and happy. */
133 chip->state = FL_STATUS;
134 return 0;
135 @@ -1132,7 +1132,8 @@
136 #endif
137
138 #define WAIT_TIMEOUT(map, chip, adr, udelay) \
139 - INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay);
140 + ({ int __udelay = (udelay); \
141 + INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
142
143
144 static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
145 @@ -1356,7 +1357,7 @@
146
147 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
148 adr, map_bankwidth(map),
149 - chip->word_write_time);
150 + &chip->word_write_time);
151 if (ret) {
152 xip_enable(map, chip, adr);
153 printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
154 @@ -1593,7 +1594,7 @@
155
156 ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
157 initial_adr, initial_len,
158 - chip->buffer_write_time);
159 + &chip->buffer_write_time);
160 if (ret) {
161 map_write(map, CMD(0x70), cmd_adr);
162 chip->state = FL_STATUS;
163 @@ -1728,7 +1729,7 @@
164
165 ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
166 adr, len,
167 - chip->erase_time);
168 + &chip->erase_time);
169 if (ret) {
170 map_write(map, CMD(0x70), adr);
171 chip->state = FL_STATUS;