[8.09] kernel: refresh patches
[openwrt/svn-archive/archive.git] / target / linux / generic-2.6 / patches-2.6.25 / 700-powerpc_git.patch
1 --- a/Documentation/kernel-parameters.txt
2 +++ b/Documentation/kernel-parameters.txt
3 @@ -930,6 +930,8 @@ and is between 256 and 4096 characters.
4
5 l2cr= [PPC]
6
7 + l3cr= [PPC]
8 +
9 lapic [X86-32,APIC] Enable the local APIC even if BIOS
10 disabled it.
11
12 --- a/Documentation/powerpc/booting-without-of.txt
13 +++ b/Documentation/powerpc/booting-without-of.txt
14 @@ -59,12 +59,39 @@ Table of Contents
15 p) Freescale Synchronous Serial Interface
16 q) USB EHCI controllers
17
18 - VII - Specifying interrupt information for devices
19 + VII - Marvell Discovery mv64[345]6x System Controller chips
20 + 1) The /system-controller node
21 + 2) Child nodes of /system-controller
22 + a) Marvell Discovery MDIO bus
23 + b) Marvell Discovery ethernet controller
24 + c) Marvell Discovery PHY nodes
25 + d) Marvell Discovery SDMA nodes
26 + e) Marvell Discovery BRG nodes
27 + f) Marvell Discovery CUNIT nodes
28 + g) Marvell Discovery MPSCROUTING nodes
29 + h) Marvell Discovery MPSCINTR nodes
30 + i) Marvell Discovery MPSC nodes
31 + j) Marvell Discovery Watch Dog Timer nodes
32 + k) Marvell Discovery I2C nodes
33 + l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
34 + m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
35 + n) Marvell Discovery GPP (General Purpose Pins) nodes
36 + o) Marvell Discovery PCI host bridge node
37 + p) Marvell Discovery CPU Error nodes
38 + q) Marvell Discovery SRAM Controller nodes
39 + r) Marvell Discovery PCI Error Handler nodes
40 + s) Marvell Discovery Memory Controller nodes
41 +
42 + VIII - Specifying interrupt information for devices
43 1) interrupts property
44 2) interrupt-parent property
45 3) OpenPIC Interrupt Controllers
46 4) ISA Interrupt Controllers
47
48 + VIII - Specifying GPIO information for devices
49 + 1) gpios property
50 + 2) gpio-controller nodes
51 +
52 Appendix A - Sample SOC node for MPC8540
53
54
55 @@ -1269,10 +1296,6 @@ platforms are moved over to use the flat
56
57 Recommended properties:
58
59 - - linux,network-index : This is the intended "index" of this
60 - network device. This is used by the bootwrapper to interpret
61 - MAC addresses passed by the firmware when no information other
62 - than indices is available to associate an address with a device.
63 - phy-connection-type : a string naming the controller/PHY interface type,
64 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
65 "tbi", or "rtbi". This property is only really needed if the connection
66 @@ -1622,8 +1645,7 @@ platforms are moved over to use the flat
67 - device_type : should be "network", "hldc", "uart", "transparent"
68 "bisync", "atm", or "serial".
69 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
70 - - model : should be "UCC".
71 - - device-id : the ucc number(1-8), corresponding to UCCx in UM.
72 + - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
73 - reg : Offset and length of the register set for the device
74 - interrupts : <a b> where a is the interrupt number and b is a
75 field that represents an encoding of the sense and level
76 @@ -1667,10 +1689,6 @@ platforms are moved over to use the flat
77 - phy-handle : The phandle for the PHY connected to this controller.
78
79 Recommended properties:
80 - - linux,network-index : This is the intended "index" of this
81 - network device. This is used by the bootwrapper to interpret
82 - MAC addresses passed by the firmware when no information other
83 - than indices is available to associate an address with a device.
84 - phy-connection-type : a string naming the controller/PHY interface type,
85 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
86 Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
87 @@ -1680,8 +1698,7 @@ platforms are moved over to use the flat
88 ucc@2000 {
89 device_type = "network";
90 compatible = "ucc_geth";
91 - model = "UCC";
92 - device-id = <1>;
93 + cell-index = <1>;
94 reg = <2000 200>;
95 interrupts = <a0 0>;
96 interrupt-parent = <700>;
97 @@ -1995,7 +2012,6 @@ platforms are moved over to use the flat
98 interrupts = <20 8>;
99 interrupt-parent = <&PIC>;
100 phy-handle = <&PHY0>;
101 - linux,network-index = <0>;
102 fsl,cpm-command = <12000300>;
103 };
104
105 @@ -2217,12 +2233,6 @@ platforms are moved over to use the flat
106 EMAC, that is the content of the current (bogus) "phy-port"
107 property.
108
109 - Recommended properties:
110 - - linux,network-index : This is the intended "index" of this
111 - network device. This is used by the bootwrapper to interpret
112 - MAC addresses passed by the firmware when no information other
113 - than indices is available to associate an address with a device.
114 -
115 Optional properties:
116 - phy-address : 1 cell, optional, MDIO address of the PHY. If absent,
117 a search is performed.
118 @@ -2246,7 +2256,6 @@ platforms are moved over to use the flat
119 Example:
120
121 EMAC0: ethernet@40000800 {
122 - linux,network-index = <0>;
123 device_type = "network";
124 compatible = "ibm,emac-440gp", "ibm,emac";
125 interrupt-parent = <&UIC1>;
126 @@ -2817,9 +2826,528 @@ platforms are moved over to use the flat
127 };
128
129
130 - More devices will be defined as this spec matures.
131 +VII - Marvell Discovery mv64[345]6x System Controller chips
132 +===========================================================
133 +
134 +The Marvell mv64[345]60 series of system controller chips contain
135 +many of the peripherals needed to implement a complete computer
136 +system. In this section, we define device tree nodes to describe
137 +the system controller chip itself and each of the peripherals
138 +which it contains. Compatible string values for each node are
139 +prefixed with the string "marvell,", for Marvell Technology Group Ltd.
140 +
141 +1) The /system-controller node
142 +
143 + This node is used to represent the system-controller and must be
144 + present when the system uses a system contller chip. The top-level
145 + system-controller node contains information that is global to all
146 + devices within the system controller chip. The node name begins
147 + with "system-controller" followed by the unit address, which is
148 + the base address of the memory-mapped register set for the system
149 + controller chip.
150 +
151 + Required properties:
152 +
153 + - ranges : Describes the translation of system controller addresses
154 + for memory mapped registers.
155 + - clock-frequency: Contains the main clock frequency for the system
156 + controller chip.
157 + - reg : This property defines the address and size of the
158 + memory-mapped registers contained within the system controller
159 + chip. The address specified in the "reg" property should match
160 + the unit address of the system-controller node.
161 + - #address-cells : Address representation for system controller
162 + devices. This field represents the number of cells needed to
163 + represent the address of the memory-mapped registers of devices
164 + within the system controller chip.
165 + - #size-cells : Size representation for for the memory-mapped
166 + registers within the system controller chip.
167 + - #interrupt-cells : Defines the width of cells used to represent
168 + interrupts.
169 +
170 + Optional properties:
171 +
172 + - model : The specific model of the system controller chip. Such
173 + as, "mv64360", "mv64460", or "mv64560".
174 + - compatible : A string identifying the compatibility identifiers
175 + of the system controller chip.
176 +
177 + The system-controller node contains child nodes for each system
178 + controller device that the platform uses. Nodes should not be created
179 + for devices which exist on the system controller chip but are not used
180 +
181 + Example Marvell Discovery mv64360 system-controller node:
182 +
183 + system-controller@f1000000 { /* Marvell Discovery mv64360 */
184 + #address-cells = <1>;
185 + #size-cells = <1>;
186 + model = "mv64360"; /* Default */
187 + compatible = "marvell,mv64360";
188 + clock-frequency = <133333333>;
189 + reg = <0xf1000000 0x10000>;
190 + virtual-reg = <0xf1000000>;
191 + ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
192 + 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
193 + 0xa0000000 0xa0000000 0x4000000 /* User FLASH */
194 + 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
195 + 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
196 +
197 + [ child node definitions... ]
198 + }
199 +
200 +2) Child nodes of /system-controller
201 +
202 + a) Marvell Discovery MDIO bus
203 +
204 + The MDIO is a bus to which the PHY devices are connected. For each
205 + device that exists on this bus, a child node should be created. See
206 + the definition of the PHY node below for an example of how to define
207 + a PHY.
208 +
209 + Required properties:
210 + - #address-cells : Should be <1>
211 + - #size-cells : Should be <0>
212 + - device_type : Should be "mdio"
213 + - compatible : Should be "marvell,mv64360-mdio"
214 +
215 + Example:
216 +
217 + mdio {
218 + #address-cells = <1>;
219 + #size-cells = <0>;
220 + device_type = "mdio";
221 + compatible = "marvell,mv64360-mdio";
222 +
223 + ethernet-phy@0 {
224 + ......
225 + };
226 + };
227 +
228 +
229 + b) Marvell Discovery ethernet controller
230 +
231 + The Discover ethernet controller is described with two levels
232 + of nodes. The first level describes an ethernet silicon block
233 + and the second level describes up to 3 ethernet nodes within
234 + that block. The reason for the multiple levels is that the
235 + registers for the node are interleaved within a single set
236 + of registers. The "ethernet-block" level describes the
237 + shared register set, and the "ethernet" nodes describe ethernet
238 + port-specific properties.
239 +
240 + Ethernet block node
241 +
242 + Required properties:
243 + - #address-cells : <1>
244 + - #size-cells : <0>
245 + - compatible : "marvell,mv64360-eth-block"
246 + - reg : Offset and length of the register set for this block
247 +
248 + Example Discovery Ethernet block node:
249 + ethernet-block@2000 {
250 + #address-cells = <1>;
251 + #size-cells = <0>;
252 + compatible = "marvell,mv64360-eth-block";
253 + reg = <0x2000 0x2000>;
254 + ethernet@0 {
255 + .......
256 + };
257 + };
258 +
259 + Ethernet port node
260 +
261 + Required properties:
262 + - device_type : Should be "network".
263 + - compatible : Should be "marvell,mv64360-eth".
264 + - reg : Should be <0>, <1>, or <2>, according to which registers
265 + within the silicon block the device uses.
266 + - interrupts : <a> where a is the interrupt number for the port.
267 + - interrupt-parent : the phandle for the interrupt controller
268 + that services interrupts for this device.
269 + - phy : the phandle for the PHY connected to this ethernet
270 + controller.
271 + - local-mac-address : 6 bytes, MAC address
272 +
273 + Example Discovery Ethernet port node:
274 + ethernet@0 {
275 + device_type = "network";
276 + compatible = "marvell,mv64360-eth";
277 + reg = <0>;
278 + interrupts = <32>;
279 + interrupt-parent = <&PIC>;
280 + phy = <&PHY0>;
281 + local-mac-address = [ 00 00 00 00 00 00 ];
282 + };
283 +
284 +
285 +
286 + c) Marvell Discovery PHY nodes
287 +
288 + Required properties:
289 + - device_type : Should be "ethernet-phy"
290 + - interrupts : <a> where a is the interrupt number for this phy.
291 + - interrupt-parent : the phandle for the interrupt controller that
292 + services interrupts for this device.
293 + - reg : The ID number for the phy, usually a small integer
294 +
295 + Example Discovery PHY node:
296 + ethernet-phy@1 {
297 + device_type = "ethernet-phy";
298 + compatible = "broadcom,bcm5421";
299 + interrupts = <76>; /* GPP 12 */
300 + interrupt-parent = <&PIC>;
301 + reg = <1>;
302 + };
303 +
304 +
305 + d) Marvell Discovery SDMA nodes
306 +
307 + Represent DMA hardware associated with the MPSC (multiprotocol
308 + serial controllers).
309 +
310 + Required properties:
311 + - compatible : "marvell,mv64360-sdma"
312 + - reg : Offset and length of the register set for this device
313 + - interrupts : <a> where a is the interrupt number for the DMA
314 + device.
315 + - interrupt-parent : the phandle for the interrupt controller
316 + that services interrupts for this device.
317 +
318 + Example Discovery SDMA node:
319 + sdma@4000 {
320 + compatible = "marvell,mv64360-sdma";
321 + reg = <0x4000 0xc18>;
322 + virtual-reg = <0xf1004000>;
323 + interrupts = <36>;
324 + interrupt-parent = <&PIC>;
325 + };
326 +
327 +
328 + e) Marvell Discovery BRG nodes
329 +
330 + Represent baud rate generator hardware associated with the MPSC
331 + (multiprotocol serial controllers).
332 +
333 + Required properties:
334 + - compatible : "marvell,mv64360-brg"
335 + - reg : Offset and length of the register set for this device
336 + - clock-src : A value from 0 to 15 which selects the clock
337 + source for the baud rate generator. This value corresponds
338 + to the CLKS value in the BRGx configuration register. See
339 + the mv64x60 User's Manual.
340 + - clock-frequence : The frequency (in Hz) of the baud rate
341 + generator's input clock.
342 + - current-speed : The current speed setting (presumably by
343 + firmware) of the baud rate generator.
344 +
345 + Example Discovery BRG node:
346 + brg@b200 {
347 + compatible = "marvell,mv64360-brg";
348 + reg = <0xb200 0x8>;
349 + clock-src = <8>;
350 + clock-frequency = <133333333>;
351 + current-speed = <9600>;
352 + };
353 +
354 +
355 + f) Marvell Discovery CUNIT nodes
356 +
357 + Represent the Serial Communications Unit device hardware.
358 +
359 + Required properties:
360 + - reg : Offset and length of the register set for this device
361 +
362 + Example Discovery CUNIT node:
363 + cunit@f200 {
364 + reg = <0xf200 0x200>;
365 + };
366 +
367 +
368 + g) Marvell Discovery MPSCROUTING nodes
369 +
370 + Represent the Discovery's MPSC routing hardware
371 +
372 + Required properties:
373 + - reg : Offset and length of the register set for this device
374 +
375 + Example Discovery CUNIT node:
376 + mpscrouting@b500 {
377 + reg = <0xb400 0xc>;
378 + };
379 +
380 +
381 + h) Marvell Discovery MPSCINTR nodes
382 +
383 + Represent the Discovery's MPSC DMA interrupt hardware registers
384 + (SDMA cause and mask registers).
385 +
386 + Required properties:
387 + - reg : Offset and length of the register set for this device
388 +
389 + Example Discovery MPSCINTR node:
390 + mpsintr@b800 {
391 + reg = <0xb800 0x100>;
392 + };
393 +
394 +
395 + i) Marvell Discovery MPSC nodes
396 +
397 + Represent the Discovery's MPSC (Multiprotocol Serial Controller)
398 + serial port.
399 +
400 + Required properties:
401 + - device_type : "serial"
402 + - compatible : "marvell,mv64360-mpsc"
403 + - reg : Offset and length of the register set for this device
404 + - sdma : the phandle for the SDMA node used by this port
405 + - brg : the phandle for the BRG node used by this port
406 + - cunit : the phandle for the CUNIT node used by this port
407 + - mpscrouting : the phandle for the MPSCROUTING node used by this port
408 + - mpscintr : the phandle for the MPSCINTR node used by this port
409 + - cell-index : the hardware index of this cell in the MPSC core
410 + - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
411 + register
412 + - interrupts : <a> where a is the interrupt number for the MPSC.
413 + - interrupt-parent : the phandle for the interrupt controller
414 + that services interrupts for this device.
415 +
416 + Example Discovery MPSCINTR node:
417 + mpsc@8000 {
418 + device_type = "serial";
419 + compatible = "marvell,mv64360-mpsc";
420 + reg = <0x8000 0x38>;
421 + virtual-reg = <0xf1008000>;
422 + sdma = <&SDMA0>;
423 + brg = <&BRG0>;
424 + cunit = <&CUNIT>;
425 + mpscrouting = <&MPSCROUTING>;
426 + mpscintr = <&MPSCINTR>;
427 + cell-index = <0>;
428 + max_idle = <40>;
429 + interrupts = <40>;
430 + interrupt-parent = <&PIC>;
431 + };
432 +
433
434 -VII - Specifying interrupt information for devices
435 + j) Marvell Discovery Watch Dog Timer nodes
436 +
437 + Represent the Discovery's watchdog timer hardware
438 +
439 + Required properties:
440 + - compatible : "marvell,mv64360-wdt"
441 + - reg : Offset and length of the register set for this device
442 +
443 + Example Discovery Watch Dog Timer node:
444 + wdt@b410 {
445 + compatible = "marvell,mv64360-wdt";
446 + reg = <0xb410 0x8>;
447 + };
448 +
449 +
450 + k) Marvell Discovery I2C nodes
451 +
452 + Represent the Discovery's I2C hardware
453 +
454 + Required properties:
455 + - device_type : "i2c"
456 + - compatible : "marvell,mv64360-i2c"
457 + - reg : Offset and length of the register set for this device
458 + - interrupts : <a> where a is the interrupt number for the I2C.
459 + - interrupt-parent : the phandle for the interrupt controller
460 + that services interrupts for this device.
461 +
462 + Example Discovery I2C node:
463 + compatible = "marvell,mv64360-i2c";
464 + reg = <0xc000 0x20>;
465 + virtual-reg = <0xf100c000>;
466 + interrupts = <37>;
467 + interrupt-parent = <&PIC>;
468 + };
469 +
470 +
471 + l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
472 +
473 + Represent the Discovery's PIC hardware
474 +
475 + Required properties:
476 + - #interrupt-cells : <1>
477 + - #address-cells : <0>
478 + - compatible : "marvell,mv64360-pic"
479 + - reg : Offset and length of the register set for this device
480 + - interrupt-controller
481 +
482 + Example Discovery PIC node:
483 + pic {
484 + #interrupt-cells = <1>;
485 + #address-cells = <0>;
486 + compatible = "marvell,mv64360-pic";
487 + reg = <0x0 0x88>;
488 + interrupt-controller;
489 + };
490 +
491 +
492 + m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
493 +
494 + Represent the Discovery's MPP hardware
495 +
496 + Required properties:
497 + - compatible : "marvell,mv64360-mpp"
498 + - reg : Offset and length of the register set for this device
499 +
500 + Example Discovery MPP node:
501 + mpp@f000 {
502 + compatible = "marvell,mv64360-mpp";
503 + reg = <0xf000 0x10>;
504 + };
505 +
506 +
507 + n) Marvell Discovery GPP (General Purpose Pins) nodes
508 +
509 + Represent the Discovery's GPP hardware
510 +
511 + Required properties:
512 + - compatible : "marvell,mv64360-gpp"
513 + - reg : Offset and length of the register set for this device
514 +
515 + Example Discovery GPP node:
516 + gpp@f000 {
517 + compatible = "marvell,mv64360-gpp";
518 + reg = <0xf100 0x20>;
519 + };
520 +
521 +
522 + o) Marvell Discovery PCI host bridge node
523 +
524 + Represents the Discovery's PCI host bridge device. The properties
525 + for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
526 + 1275-1994. A typical value for the compatible property is
527 + "marvell,mv64360-pci".
528 +
529 + Example Discovery PCI host bridge node
530 + pci@80000000 {
531 + #address-cells = <3>;
532 + #size-cells = <2>;
533 + #interrupt-cells = <1>;
534 + device_type = "pci";
535 + compatible = "marvell,mv64360-pci";
536 + reg = <0xcf8 0x8>;
537 + ranges = <0x01000000 0x0 0x0
538 + 0x88000000 0x0 0x01000000
539 + 0x02000000 0x0 0x80000000
540 + 0x80000000 0x0 0x08000000>;
541 + bus-range = <0 255>;
542 + clock-frequency = <66000000>;
543 + interrupt-parent = <&PIC>;
544 + interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
545 + interrupt-map = <
546 + /* IDSEL 0x0a */
547 + 0x5000 0 0 1 &PIC 80
548 + 0x5000 0 0 2 &PIC 81
549 + 0x5000 0 0 3 &PIC 91
550 + 0x5000 0 0 4 &PIC 93
551 +
552 + /* IDSEL 0x0b */
553 + 0x5800 0 0 1 &PIC 91
554 + 0x5800 0 0 2 &PIC 93
555 + 0x5800 0 0 3 &PIC 80
556 + 0x5800 0 0 4 &PIC 81
557 +
558 + /* IDSEL 0x0c */
559 + 0x6000 0 0 1 &PIC 91
560 + 0x6000 0 0 2 &PIC 93
561 + 0x6000 0 0 3 &PIC 80
562 + 0x6000 0 0 4 &PIC 81
563 +
564 + /* IDSEL 0x0d */
565 + 0x6800 0 0 1 &PIC 93
566 + 0x6800 0 0 2 &PIC 80
567 + 0x6800 0 0 3 &PIC 81
568 + 0x6800 0 0 4 &PIC 91
569 + >;
570 + };
571 +
572 +
573 + p) Marvell Discovery CPU Error nodes
574 +
575 + Represent the Discovery's CPU error handler device.
576 +
577 + Required properties:
578 + - compatible : "marvell,mv64360-cpu-error"
579 + - reg : Offset and length of the register set for this device
580 + - interrupts : the interrupt number for this device
581 + - interrupt-parent : the phandle for the interrupt controller
582 + that services interrupts for this device.
583 +
584 + Example Discovery CPU Error node:
585 + cpu-error@0070 {
586 + compatible = "marvell,mv64360-cpu-error";
587 + reg = <0x70 0x10 0x128 0x28>;
588 + interrupts = <3>;
589 + interrupt-parent = <&PIC>;
590 + };
591 +
592 +
593 + q) Marvell Discovery SRAM Controller nodes
594 +
595 + Represent the Discovery's SRAM controller device.
596 +
597 + Required properties:
598 + - compatible : "marvell,mv64360-sram-ctrl"
599 + - reg : Offset and length of the register set for this device
600 + - interrupts : the interrupt number for this device
601 + - interrupt-parent : the phandle for the interrupt controller
602 + that services interrupts for this device.
603 +
604 + Example Discovery SRAM Controller node:
605 + sram-ctrl@0380 {
606 + compatible = "marvell,mv64360-sram-ctrl";
607 + reg = <0x380 0x80>;
608 + interrupts = <13>;
609 + interrupt-parent = <&PIC>;
610 + };
611 +
612 +
613 + r) Marvell Discovery PCI Error Handler nodes
614 +
615 + Represent the Discovery's PCI error handler device.
616 +
617 + Required properties:
618 + - compatible : "marvell,mv64360-pci-error"
619 + - reg : Offset and length of the register set for this device
620 + - interrupts : the interrupt number for this device
621 + - interrupt-parent : the phandle for the interrupt controller
622 + that services interrupts for this device.
623 +
624 + Example Discovery PCI Error Handler node:
625 + pci-error@1d40 {
626 + compatible = "marvell,mv64360-pci-error";
627 + reg = <0x1d40 0x40 0xc28 0x4>;
628 + interrupts = <12>;
629 + interrupt-parent = <&PIC>;
630 + };
631 +
632 +
633 + s) Marvell Discovery Memory Controller nodes
634 +
635 + Represent the Discovery's memory controller device.
636 +
637 + Required properties:
638 + - compatible : "marvell,mv64360-mem-ctrl"
639 + - reg : Offset and length of the register set for this device
640 + - interrupts : the interrupt number for this device
641 + - interrupt-parent : the phandle for the interrupt controller
642 + that services interrupts for this device.
643 +
644 + Example Discovery Memory Controller node:
645 + mem-ctrl@1400 {
646 + compatible = "marvell,mv64360-mem-ctrl";
647 + reg = <0x1400 0x60>;
648 + interrupts = <17>;
649 + interrupt-parent = <&PIC>;
650 + };
651 +
652 +
653 +VIII - Specifying interrupt information for devices
654 ===================================================
655
656 The device tree represents the busses and devices of a hardware
657 @@ -2905,6 +3433,54 @@ encodings listed below:
658 2 = high to low edge sensitive type enabled
659 3 = low to high edge sensitive type enabled
660
661 +VIII - Specifying GPIO information for devices
662 +==============================================
663 +
664 +1) gpios property
665 +-----------------
666 +
667 +Nodes that makes use of GPIOs should define them using `gpios' property,
668 +format of which is: <&gpio-controller1-phandle gpio1-specifier
669 + &gpio-controller2-phandle gpio2-specifier
670 + 0 /* holes are permitted, means no GPIO 3 */
671 + &gpio-controller4-phandle gpio4-specifier
672 + ...>;
673 +
674 +Note that gpio-specifier length is controller dependent.
675 +
676 +gpio-specifier may encode: bank, pin position inside the bank,
677 +whether pin is open-drain and whether pin is logically inverted.
678 +
679 +Example of the node using GPIOs:
680 +
681 + node {
682 + gpios = <&qe_pio_e 18 0>;
683 + };
684 +
685 +In this example gpio-specifier is "18 0" and encodes GPIO pin number,
686 +and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
687 +
688 +2) gpio-controller nodes
689 +------------------------
690 +
691 +Every GPIO controller node must have #gpio-cells property defined,
692 +this information will be used to translate gpio-specifiers.
693 +
694 +Example of two SOC GPIO banks defined as gpio-controller nodes:
695 +
696 + qe_pio_a: gpio-controller@1400 {
697 + #gpio-cells = <2>;
698 + compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
699 + reg = <0x1400 0x18>;
700 + gpio-controller;
701 + };
702 +
703 + qe_pio_e: gpio-controller@1460 {
704 + #gpio-cells = <2>;
705 + compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
706 + reg = <0x1460 0x18>;
707 + gpio-controller;
708 + };
709
710 Appendix A - Sample SOC node for MPC8540
711 ========================================
712 --- /dev/null
713 +++ b/Documentation/powerpc/phyp-assisted-dump.txt
714 @@ -0,0 +1,127 @@
715 +
716 + Hypervisor-Assisted Dump
717 + ------------------------
718 + November 2007
719 +
720 +The goal of hypervisor-assisted dump is to enable the dump of
721 +a crashed system, and to do so from a fully-reset system, and
722 +to minimize the total elapsed time until the system is back
723 +in production use.
724 +
725 +As compared to kdump or other strategies, hypervisor-assisted
726 +dump offers several strong, practical advantages:
727 +
728 +-- Unlike kdump, the system has been reset, and loaded
729 + with a fresh copy of the kernel. In particular,
730 + PCI and I/O devices have been reinitialized and are
731 + in a clean, consistent state.
732 +-- As the dump is performed, the dumped memory becomes
733 + immediately available to the system for normal use.
734 +-- After the dump is completed, no further reboots are
735 + required; the system will be fully usable, and running
736 + in it's normal, production mode on it normal kernel.
737 +
738 +The above can only be accomplished by coordination with,
739 +and assistance from the hypervisor. The procedure is
740 +as follows:
741 +
742 +-- When a system crashes, the hypervisor will save
743 + the low 256MB of RAM to a previously registered
744 + save region. It will also save system state, system
745 + registers, and hardware PTE's.
746 +
747 +-- After the low 256MB area has been saved, the
748 + hypervisor will reset PCI and other hardware state.
749 + It will *not* clear RAM. It will then launch the
750 + bootloader, as normal.
751 +
752 +-- The freshly booted kernel will notice that there
753 + is a new node (ibm,dump-kernel) in the device tree,
754 + indicating that there is crash data available from
755 + a previous boot. It will boot into only 256MB of RAM,
756 + reserving the rest of system memory.
757 +
758 +-- Userspace tools will parse /sys/kernel/release_region
759 + and read /proc/vmcore to obtain the contents of memory,
760 + which holds the previous crashed kernel. The userspace
761 + tools may copy this info to disk, or network, nas, san,
762 + iscsi, etc. as desired.
763 +
764 + For Example: the values in /sys/kernel/release-region
765 + would look something like this (address-range pairs).
766 + CPU:0x177fee000-0x10000: HPTE:0x177ffe020-0x1000: /
767 + DUMP:0x177fff020-0x10000000, 0x10000000-0x16F1D370A
768 +
769 +-- As the userspace tools complete saving a portion of
770 + dump, they echo an offset and size to
771 + /sys/kernel/release_region to release the reserved
772 + memory back to general use.
773 +
774 + An example of this is:
775 + "echo 0x40000000 0x10000000 > /sys/kernel/release_region"
776 + which will release 256MB at the 1GB boundary.
777 +
778 +Please note that the hypervisor-assisted dump feature
779 +is only available on Power6-based systems with recent
780 +firmware versions.
781 +
782 +Implementation details:
783 +----------------------
784 +
785 +During boot, a check is made to see if firmware supports
786 +this feature on this particular machine. If it does, then
787 +we check to see if a active dump is waiting for us. If yes
788 +then everything but 256 MB of RAM is reserved during early
789 +boot. This area is released once we collect a dump from user
790 +land scripts that are run. If there is dump data, then
791 +the /sys/kernel/release_region file is created, and
792 +the reserved memory is held.
793 +
794 +If there is no waiting dump data, then only the highest
795 +256MB of the ram is reserved as a scratch area. This area
796 +is *not* released: this region will be kept permanently
797 +reserved, so that it can act as a receptacle for a copy
798 +of the low 256MB in the case a crash does occur. See,
799 +however, "open issues" below, as to whether
800 +such a reserved region is really needed.
801 +
802 +Currently the dump will be copied from /proc/vmcore to a
803 +a new file upon user intervention. The starting address
804 +to be read and the range for each data point in provided
805 +in /sys/kernel/release_region.
806 +
807 +The tools to examine the dump will be same as the ones
808 +used for kdump.
809 +
810 +General notes:
811 +--------------
812 +Security: please note that there are potential security issues
813 +with any sort of dump mechanism. In particular, plaintext
814 +(unencrypted) data, and possibly passwords, may be present in
815 +the dump data. Userspace tools must take adequate precautions to
816 +preserve security.
817 +
818 +Open issues/ToDo:
819 +------------
820 + o The various code paths that tell the hypervisor that a crash
821 + occurred, vs. it simply being a normal reboot, should be
822 + reviewed, and possibly clarified/fixed.
823 +
824 + o Instead of using /sys/kernel, should there be a /sys/dump
825 + instead? There is a dump_subsys being created by the s390 code,
826 + perhaps the pseries code should use a similar layout as well.
827 +
828 + o Is reserving a 256MB region really required? The goal of
829 + reserving a 256MB scratch area is to make sure that no
830 + important crash data is clobbered when the hypervisor
831 + save low mem to the scratch area. But, if one could assure
832 + that nothing important is located in some 256MB area, then
833 + it would not need to be reserved. Something that can be
834 + improved in subsequent versions.
835 +
836 + o Still working the kdump team to integrate this with kdump,
837 + some work remains but this would not affect the current
838 + patches.
839 +
840 + o Still need to write a shell script, to copy the dump away.
841 + Currently I am parsing it manually.
842 --- a/arch/powerpc/Kconfig
843 +++ b/arch/powerpc/Kconfig
844 @@ -49,6 +49,19 @@ config IRQ_PER_CPU
845 bool
846 default y
847
848 +config STACKTRACE_SUPPORT
849 + bool
850 + default y
851 +
852 +config TRACE_IRQFLAGS_SUPPORT
853 + bool
854 + depends on PPC64
855 + default y
856 +
857 +config LOCKDEP_SUPPORT
858 + bool
859 + default y
860 +
861 config RWSEM_GENERIC_SPINLOCK
862 bool
863
864 @@ -81,6 +94,11 @@ config GENERIC_FIND_NEXT_BIT
865 bool
866 default y
867
868 +config GENERIC_GPIO
869 + bool
870 + help
871 + Generic GPIO API support
872 +
873 config ARCH_NO_VIRT_TO_BUS
874 def_bool PPC64
875
876 @@ -91,6 +109,7 @@ config PPC
877 select HAVE_OPROFILE
878 select HAVE_KPROBES
879 select HAVE_KRETPROBES
880 + select HAVE_LMB
881
882 config EARLY_PRINTK
883 bool
884 @@ -210,15 +229,6 @@ source kernel/Kconfig.hz
885 source kernel/Kconfig.preempt
886 source "fs/Kconfig.binfmt"
887
888 -# We optimistically allocate largepages from the VM, so make the limit
889 -# large enough (16MB). This badly named config option is actually
890 -# max order + 1
891 -config FORCE_MAX_ZONEORDER
892 - int
893 - depends on PPC64
894 - default "9" if PPC_64K_PAGES
895 - default "13"
896 -
897 config HUGETLB_PAGE_SIZE_VARIABLE
898 bool
899 depends on HUGETLB_PAGE
900 @@ -307,6 +317,16 @@ config CRASH_DUMP
901
902 Don't change this unless you know what you are doing.
903
904 +config PHYP_DUMP
905 + bool "Hypervisor-assisted dump (EXPERIMENTAL)"
906 + depends on PPC_PSERIES && EXPERIMENTAL
907 + help
908 + Hypervisor-assisted dump is meant to be a kdump replacement
909 + offering robustness and speed not possible without system
910 + hypervisor assistence.
911 +
912 + If unsure, say "N"
913 +
914 config PPCBUG_NVRAM
915 bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC
916 default y if PPC_PREP
917 @@ -381,6 +401,26 @@ config PPC_64K_PAGES
918 while on hardware with such support, it will be used to map
919 normal application pages.
920
921 +config FORCE_MAX_ZONEORDER
922 + int "Maximum zone order"
923 + default "9" if PPC_64K_PAGES
924 + default "13" if PPC64 && !PPC_64K_PAGES
925 + default "11"
926 + help
927 + The kernel memory allocator divides physically contiguous memory
928 + blocks into "zones", where each zone is a power of two number of
929 + pages. This option selects the largest power of two that the kernel
930 + keeps in the memory allocator. If you need to allocate very large
931 + blocks of physically contiguous memory, then you may need to
932 + increase this value.
933 +
934 + This config option is actually maximum order plus one. For example,
935 + a value of 11 means that the largest free memory block is 2^10 pages.
936 +
937 + The page size is not necessarily 4KB. For example, on 64-bit
938 + systems, 64KB pages can be enabled via CONFIG_PPC_64K_PAGES. Keep
939 + this in mind when choosing a value for this option.
940 +
941 config PPC_SUBPAGE_PROT
942 bool "Support setting protections for 4k subpages"
943 depends on PPC_64K_PAGES
944 @@ -490,6 +530,14 @@ config FSL_PCI
945 bool
946 select PPC_INDIRECT_PCI
947
948 +config 4xx_SOC
949 + bool
950 +
951 +config FSL_LBC
952 + bool
953 + help
954 + Freescale Localbus support
955 +
956 # Yes MCA RS/6000s exist but Linux-PPC does not currently support any
957 config MCA
958 bool
959 @@ -663,22 +711,6 @@ config CONSISTENT_SIZE
960 hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
961 default "0x00200000" if NOT_COHERENT_CACHE
962
963 -config BOOT_LOAD_BOOL
964 - bool "Set the boot link/load address"
965 - depends on ADVANCED_OPTIONS && !PPC_MULTIPLATFORM
966 - help
967 - This option allows you to set the initial load address of the zImage
968 - or zImage.initrd file. This can be useful if you are on a board
969 - which has a small amount of memory.
970 -
971 - Say N here unless you know what you are doing.
972 -
973 -config BOOT_LOAD
974 - hex "Link/load address for booting" if BOOT_LOAD_BOOL
975 - default "0x00400000" if 40x || 8xx || 8260
976 - default "0x01000000" if 44x
977 - default "0x00800000"
978 -
979 config PIN_TLB
980 bool "Pinned Kernel TLBs (860 ONLY)"
981 depends on ADVANCED_OPTIONS && 8xx
982 --- a/arch/powerpc/Kconfig.debug
983 +++ b/arch/powerpc/Kconfig.debug
984 @@ -269,7 +269,7 @@ config PPC_EARLY_DEBUG_CPM_ADDR
985 hex "CPM UART early debug transmit descriptor address"
986 depends on PPC_EARLY_DEBUG_CPM
987 default "0xfa202008" if PPC_EP88XC
988 - default "0xf0000008" if CPM2
989 + default "0xf0001ff8" if CPM2
990 default "0xff002008" if CPM1
991 help
992 This specifies the address of the transmit descriptor
993 --- a/arch/powerpc/Makefile
994 +++ b/arch/powerpc/Makefile
995 @@ -71,13 +71,11 @@ endif
996
997 LDFLAGS_vmlinux := -Bstatic
998
999 -CPPFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH)
1000 -AFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH)
1001 CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=none -mcall-aixdesc
1002 -CFLAGS-$(CONFIG_PPC32) := -Iarch/$(ARCH) -ffixed-r2 -mmultiple
1003 -KBUILD_CPPFLAGS += $(CPPFLAGS-y)
1004 -KBUILD_AFLAGS += $(AFLAGS-y)
1005 -KBUILD_CFLAGS += -msoft-float -pipe $(CFLAGS-y)
1006 +CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
1007 +KBUILD_CPPFLAGS += -Iarch/$(ARCH)
1008 +KBUILD_AFLAGS += -Iarch/$(ARCH)
1009 +KBUILD_CFLAGS += -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y)
1010 CPP = $(CC) -E $(KBUILD_CFLAGS)
1011
1012 CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__
1013 @@ -164,7 +162,7 @@ boot := arch/$(ARCH)/boot
1014 $(BOOT_TARGETS): vmlinux
1015 $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
1016
1017 -bootwrapper_install:
1018 +bootwrapper_install %.dtb:
1019 $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
1020
1021 define archhelp
1022 --- a/arch/powerpc/boot/Makefile
1023 +++ b/arch/powerpc/boot/Makefile
1024 @@ -40,6 +40,7 @@ $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
1025 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
1026 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
1027 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
1028 +$(obj)/virtex405-head.o: BOOTCFLAGS += -mcpu=405
1029
1030
1031 zlib := inffast.c inflate.c inftrees.c
1032 @@ -64,7 +65,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
1033 cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
1034 fixed-head.S ep88xc.c ep405.c \
1035 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
1036 - cuboot-warp.c cuboot-85xx-cpm2.c
1037 + cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
1038 + virtex405-head.S
1039 src-boot := $(src-wlib) $(src-plat) empty.c
1040
1041 src-boot := $(addprefix $(obj)/, $(src-boot))
1042 @@ -192,7 +194,7 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
1043 image-$(CONFIG_PPC_EFIKA) += zImage.chrp
1044 image-$(CONFIG_PPC_PMAC) += zImage.pmac
1045 image-$(CONFIG_PPC_HOLLY) += zImage.holly
1046 -image-$(CONFIG_PPC_PRPMC2800) += zImage.prpmc2800
1047 +image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800
1048 image-$(CONFIG_PPC_ISERIES) += zImage.iseries
1049 image-$(CONFIG_DEFAULT_UIMAGE) += uImage
1050
1051 @@ -216,6 +218,7 @@ image-$(CONFIG_RAINIER) += cuImage.rai
1052 image-$(CONFIG_TAISHAN) += cuImage.taishan
1053 image-$(CONFIG_KATMAI) += cuImage.katmai
1054 image-$(CONFIG_WARP) += cuImage.warp
1055 +image-$(CONFIG_YOSEMITE) += cuImage.yosemite
1056
1057 # Board ports in arch/powerpc/platform/8xx/Kconfig
1058 image-$(CONFIG_PPC_MPC86XADS) += cuImage.mpc866ads
1059 @@ -255,6 +258,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
1060 image-$(CONFIG_TQM8560) += cuImage.tqm8560
1061 image-$(CONFIG_SBC8548) += cuImage.sbc8548
1062 image-$(CONFIG_SBC8560) += cuImage.sbc8560
1063 +image-$(CONFIG_KSI8560) += cuImage.ksi8560
1064
1065 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
1066 image-$(CONFIG_STORCENTER) += cuImage.storcenter
1067 @@ -285,11 +289,11 @@ $(obj)/zImage.%: vmlinux $(wrapperbits)
1068 $(call if_changed,wrap,$*)
1069
1070 # dtbImage% - a dtbImage is a zImage with an embedded device tree blob
1071 -$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
1072 - $(call if_changed,wrap,$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
1073 +$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb
1074 + $(call if_changed,wrap,$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
1075
1076 -$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(dtstree)/%.dts
1077 - $(call if_changed,wrap,$*,$(dtstree)/$*.dts)
1078 +$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
1079 + $(call if_changed,wrap,$*,,$(obj)/$*.dtb)
1080
1081 # This cannot be in the root of $(src) as the zImage rule always adds a $(obj)
1082 # prefix
1083 @@ -302,14 +306,24 @@ $(obj)/zImage.iseries: vmlinux
1084 $(obj)/uImage: vmlinux $(wrapperbits)
1085 $(call if_changed,wrap,uboot)
1086
1087 -$(obj)/cuImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
1088 - $(call if_changed,wrap,cuboot-$*,$(dtstree)/$*.dts)
1089 +$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
1090 + $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb)
1091
1092 -$(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
1093 - $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz)
1094 +$(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
1095 + $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
1096
1097 -$(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits)
1098 - $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts)
1099 +$(obj)/simpleImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
1100 + $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb)
1101 +
1102 +$(obj)/treeImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
1103 + $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
1104 +
1105 +$(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
1106 + $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb)
1107 +
1108 +# Rule to build device tree blobs
1109 +$(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc
1110 + $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts
1111
1112 # If there isn't a platform selected then just strip the vmlinux.
1113 ifeq (,$(image-y))
1114 @@ -326,7 +340,7 @@ install: $(CONFIGURE) $(addprefix $(obj)
1115
1116 # anything not in $(targets)
1117 clean-files += $(image-) $(initrd-) zImage zImage.initrd cuImage.* treeImage.* \
1118 - otheros.bld
1119 + otheros.bld *.dtb
1120
1121 # clean up files cached by wrapper
1122 clean-kernel := vmlinux.strip vmlinux.bin
1123 --- a/arch/powerpc/boot/bamboo.c
1124 +++ b/arch/powerpc/boot/bamboo.c
1125 @@ -33,7 +33,8 @@ static void bamboo_fixups(void)
1126 ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
1127 ibm4xx_sdram_fixup_memsize();
1128 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
1129 - dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
1130 + dt_fixup_mac_address_by_alias("ethernet0", bamboo_mac0);
1131 + dt_fixup_mac_address_by_alias("ethernet1", bamboo_mac1);
1132 }
1133
1134 void bamboo_init(void *mac0, void *mac1)
1135 --- a/arch/powerpc/boot/cpm-serial.c
1136 +++ b/arch/powerpc/boot/cpm-serial.c
1137 @@ -11,6 +11,7 @@
1138 #include "types.h"
1139 #include "io.h"
1140 #include "ops.h"
1141 +#include "page.h"
1142
1143 struct cpm_scc {
1144 u32 gsmrl;
1145 @@ -42,6 +43,22 @@ struct cpm_param {
1146 u16 tbase;
1147 u8 rfcr;
1148 u8 tfcr;
1149 + u16 mrblr;
1150 + u32 rstate;
1151 + u8 res1[4];
1152 + u16 rbptr;
1153 + u8 res2[6];
1154 + u32 tstate;
1155 + u8 res3[4];
1156 + u16 tbptr;
1157 + u8 res4[6];
1158 + u16 maxidl;
1159 + u16 idlc;
1160 + u16 brkln;
1161 + u16 brkec;
1162 + u16 brkcr;
1163 + u16 rmask;
1164 + u8 res5[4];
1165 };
1166
1167 struct cpm_bd {
1168 @@ -54,10 +71,10 @@ static void *cpcr;
1169 static struct cpm_param *param;
1170 static struct cpm_smc *smc;
1171 static struct cpm_scc *scc;
1172 -struct cpm_bd *tbdf, *rbdf;
1173 +static struct cpm_bd *tbdf, *rbdf;
1174 static u32 cpm_cmd;
1175 -static u8 *muram_start;
1176 -static u32 muram_offset;
1177 +static void *cbd_addr;
1178 +static u32 cbd_offset;
1179
1180 static void (*do_cmd)(int op);
1181 static void (*enable_port)(void);
1182 @@ -119,20 +136,25 @@ static int cpm_serial_open(void)
1183
1184 out_8(&param->rfcr, 0x10);
1185 out_8(&param->tfcr, 0x10);
1186 + out_be16(&param->mrblr, 1);
1187 + out_be16(&param->maxidl, 0);
1188 + out_be16(&param->brkec, 0);
1189 + out_be16(&param->brkln, 0);
1190 + out_be16(&param->brkcr, 0);
1191
1192 - rbdf = (struct cpm_bd *)muram_start;
1193 - rbdf->addr = (u8 *)(rbdf + 2);
1194 + rbdf = cbd_addr;
1195 + rbdf->addr = (u8 *)rbdf - 1;
1196 rbdf->sc = 0xa000;
1197 rbdf->len = 1;
1198
1199 tbdf = rbdf + 1;
1200 - tbdf->addr = (u8 *)(rbdf + 2) + 1;
1201 + tbdf->addr = (u8 *)rbdf - 2;
1202 tbdf->sc = 0x2000;
1203 tbdf->len = 1;
1204
1205 sync();
1206 - out_be16(&param->rbase, muram_offset);
1207 - out_be16(&param->tbase, muram_offset + sizeof(struct cpm_bd));
1208 + out_be16(&param->rbase, cbd_offset);
1209 + out_be16(&param->tbase, cbd_offset + sizeof(struct cpm_bd));
1210
1211 do_cmd(CPM_CMD_INIT_RX_TX);
1212
1213 @@ -175,10 +197,12 @@ static unsigned char cpm_serial_getc(voi
1214
1215 int cpm_console_init(void *devp, struct serial_console_data *scdp)
1216 {
1217 - void *reg_virt[2];
1218 - int is_smc = 0, is_cpm2 = 0, n;
1219 - unsigned long reg_phys;
1220 + void *vreg[2];
1221 + u32 reg[2];
1222 + int is_smc = 0, is_cpm2 = 0;
1223 void *parent, *muram;
1224 + void *muram_addr;
1225 + unsigned long muram_offset, muram_size;
1226
1227 if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) {
1228 is_smc = 1;
1229 @@ -202,63 +226,64 @@ int cpm_console_init(void *devp, struct
1230 else
1231 do_cmd = cpm1_cmd;
1232
1233 - n = getprop(devp, "fsl,cpm-command", &cpm_cmd, 4);
1234 - if (n < 4)
1235 + if (getprop(devp, "fsl,cpm-command", &cpm_cmd, 4) < 4)
1236 return -1;
1237
1238 - n = getprop(devp, "virtual-reg", reg_virt, sizeof(reg_virt));
1239 - if (n < (int)sizeof(reg_virt)) {
1240 - for (n = 0; n < 2; n++) {
1241 - if (!dt_xlate_reg(devp, n, &reg_phys, NULL))
1242 - return -1;
1243 -
1244 - reg_virt[n] = (void *)reg_phys;
1245 - }
1246 - }
1247 + if (dt_get_virtual_reg(devp, vreg, 2) < 2)
1248 + return -1;
1249
1250 if (is_smc)
1251 - smc = reg_virt[0];
1252 + smc = vreg[0];
1253 else
1254 - scc = reg_virt[0];
1255 + scc = vreg[0];
1256
1257 - param = reg_virt[1];
1258 + param = vreg[1];
1259
1260 parent = get_parent(devp);
1261 if (!parent)
1262 return -1;
1263
1264 - n = getprop(parent, "virtual-reg", reg_virt, sizeof(reg_virt));
1265 - if (n < (int)sizeof(reg_virt)) {
1266 - if (!dt_xlate_reg(parent, 0, &reg_phys, NULL))
1267 - return -1;
1268 -
1269 - reg_virt[0] = (void *)reg_phys;
1270 - }
1271 -
1272 - cpcr = reg_virt[0];
1273 + if (dt_get_virtual_reg(parent, &cpcr, 1) < 1)
1274 + return -1;
1275
1276 muram = finddevice("/soc/cpm/muram/data");
1277 if (!muram)
1278 return -1;
1279
1280 /* For bootwrapper-compatible device trees, we assume that the first
1281 - * entry has at least 18 bytes, and that #address-cells/#data-cells
1282 + * entry has at least 128 bytes, and that #address-cells/#data-cells
1283 * is one for both parent and child.
1284 */
1285
1286 - n = getprop(muram, "virtual-reg", reg_virt, sizeof(reg_virt));
1287 - if (n < (int)sizeof(reg_virt)) {
1288 - if (!dt_xlate_reg(muram, 0, &reg_phys, NULL))
1289 - return -1;
1290 + if (dt_get_virtual_reg(muram, &muram_addr, 1) < 1)
1291 + return -1;
1292 +
1293 + if (getprop(muram, "reg", reg, 8) < 8)
1294 + return -1;
1295 +
1296 + muram_offset = reg[0];
1297 + muram_size = reg[1];
1298 +
1299 + /* Store the buffer descriptors at the end of the first muram chunk.
1300 + * For SMC ports on CPM2-based platforms, relocate the parameter RAM
1301 + * just before the buffer descriptors.
1302 + */
1303 +
1304 + cbd_offset = muram_offset + muram_size - 2 * sizeof(struct cpm_bd);
1305
1306 - reg_virt[0] = (void *)reg_phys;
1307 + if (is_cpm2 && is_smc) {
1308 + u16 *smc_base = (u16 *)param;
1309 + u16 pram_offset;
1310 +
1311 + pram_offset = cbd_offset - 64;
1312 + pram_offset = _ALIGN_DOWN(pram_offset, 64);
1313 +
1314 + disable_port();
1315 + out_be16(smc_base, pram_offset);
1316 + param = muram_addr - muram_offset + pram_offset;
1317 }
1318
1319 - muram_start = reg_virt[0];
1320 -
1321 - n = getprop(muram, "reg", &muram_offset, 4);
1322 - if (n < 4)
1323 - return -1;
1324 + cbd_addr = muram_addr - muram_offset + cbd_offset;
1325
1326 scdp->open = cpm_serial_open;
1327 scdp->putc = cpm_serial_putc;
1328 --- a/arch/powerpc/boot/cuboot-pq2.c
1329 +++ b/arch/powerpc/boot/cuboot-pq2.c
1330 @@ -128,7 +128,7 @@ static void fixup_pci(void)
1331 u8 *soc_regs;
1332 int i, len;
1333 void *node, *parent_node;
1334 - u32 naddr, nsize, mem_log2;
1335 + u32 naddr, nsize, mem_pow2, mem_mask;
1336
1337 node = finddevice("/pci");
1338 if (!node || !dt_is_compatible(node, "fsl,pq2-pci"))
1339 @@ -141,7 +141,7 @@ static void fixup_pci(void)
1340
1341 soc_regs = (u8 *)fsl_get_immr();
1342 if (!soc_regs)
1343 - goto err;
1344 + goto unhandled;
1345
1346 dt_get_reg_format(node, &naddr, &nsize);
1347 if (naddr != 3 || nsize != 2)
1348 @@ -153,7 +153,7 @@ static void fixup_pci(void)
1349
1350 dt_get_reg_format(parent_node, &naddr, &nsize);
1351 if (naddr != 1 || nsize != 1)
1352 - goto err;
1353 + goto unhandled;
1354
1355 len = getprop(node, "ranges", pci_ranges_buf,
1356 sizeof(pci_ranges_buf));
1357 @@ -170,14 +170,20 @@ static void fixup_pci(void)
1358 }
1359
1360 if (!mem || !mmio || !io)
1361 - goto err;
1362 + goto unhandled;
1363 + if (mem->size[1] != mmio->size[1])
1364 + goto unhandled;
1365 + if (mem->size[1] & (mem->size[1] - 1))
1366 + goto unhandled;
1367 + if (io->size[1] & (io->size[1] - 1))
1368 + goto unhandled;
1369
1370 if (mem->phys_addr + mem->size[1] == mmio->phys_addr)
1371 mem_base = mem;
1372 else if (mmio->phys_addr + mmio->size[1] == mem->phys_addr)
1373 mem_base = mmio;
1374 else
1375 - goto err;
1376 + goto unhandled;
1377
1378 out_be32(&pci_regs[1][0], mem_base->phys_addr | 1);
1379 out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1));
1380 @@ -201,8 +207,9 @@ static void fixup_pci(void)
1381 out_le32(&pci_regs[0][58], 0);
1382 out_le32(&pci_regs[0][60], 0);
1383
1384 - mem_log2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1);
1385 - out_le32(&pci_regs[0][62], 0xa0000000 | ~((1 << (mem_log2 - 12)) - 1));
1386 + mem_pow2 = 1 << (__ilog2_u32(bd.bi_memsize - 1) + 1);
1387 + mem_mask = ~(mem_pow2 - 1) >> 12;
1388 + out_le32(&pci_regs[0][62], 0xa0000000 | mem_mask);
1389
1390 /* If PCI is disabled, drive RST high to enable. */
1391 if (!(in_le32(&pci_regs[0][32]) & 1)) {
1392 @@ -228,7 +235,11 @@ static void fixup_pci(void)
1393 return;
1394
1395 err:
1396 - printf("Bad PCI node\r\n");
1397 + printf("Bad PCI node -- using existing firmware setup.\r\n");
1398 + return;
1399 +
1400 +unhandled:
1401 + printf("Unsupported PCI node -- using existing firmware setup.\r\n");
1402 }
1403
1404 static void pq2_platform_fixups(void)
1405 --- a/arch/powerpc/boot/cuboot-rainier.c
1406 +++ b/arch/powerpc/boot/cuboot-rainier.c
1407 @@ -42,7 +42,8 @@ static void rainier_fixups(void)
1408 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
1409 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
1410 ibm4xx_denali_fixup_memsize();
1411 - dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
1412 + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
1413 + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
1414 }
1415
1416 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
1417 --- a/arch/powerpc/boot/cuboot-sequoia.c
1418 +++ b/arch/powerpc/boot/cuboot-sequoia.c
1419 @@ -42,7 +42,8 @@ static void sequoia_fixups(void)
1420 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
1421 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
1422 ibm4xx_denali_fixup_memsize();
1423 - dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
1424 + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
1425 + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
1426 }
1427
1428 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
1429 --- a/arch/powerpc/boot/cuboot-taishan.c
1430 +++ b/arch/powerpc/boot/cuboot-taishan.c
1431 @@ -40,7 +40,8 @@ static void taishan_fixups(void)
1432
1433 ibm4xx_sdram_fixup_memsize();
1434
1435 - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
1436 + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
1437 + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
1438
1439 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
1440 }
1441 --- a/arch/powerpc/boot/cuboot-warp.c
1442 +++ b/arch/powerpc/boot/cuboot-warp.c
1443 @@ -24,7 +24,7 @@ static void warp_fixups(void)
1444 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
1445 ibm4xx_sdram_fixup_memsize();
1446 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
1447 - dt_fixup_mac_addresses(&bd.bi_enetaddr);
1448 + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
1449 }
1450
1451
1452 --- /dev/null
1453 +++ b/arch/powerpc/boot/cuboot-yosemite.c
1454 @@ -0,0 +1,44 @@
1455 +/*
1456 + * Old U-boot compatibility for Yosemite
1457 + *
1458 + * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
1459 + *
1460 + * Copyright 2008 IBM Corporation
1461 + *
1462 + * This program is free software; you can redistribute it and/or modify it
1463 + * under the terms of the GNU General Public License version 2 as published
1464 + * by the Free Software Foundation.
1465 + */
1466 +
1467 +#include "ops.h"
1468 +#include "stdio.h"
1469 +#include "4xx.h"
1470 +#include "44x.h"
1471 +#include "cuboot.h"
1472 +
1473 +#define TARGET_4xx
1474 +#define TARGET_44x
1475 +#include "ppcboot.h"
1476 +
1477 +static bd_t bd;
1478 +
1479 +static void yosemite_fixups(void)
1480 +{
1481 + unsigned long sysclk = 66666666;
1482 +
1483 + ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
1484 + ibm4xx_sdram_fixup_memsize();
1485 + ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
1486 + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
1487 + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
1488 +}
1489 +
1490 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
1491 + unsigned long r6, unsigned long r7)
1492 +{
1493 + CUBOOT_INIT();
1494 + platform_ops.fixups = yosemite_fixups;
1495 + platform_ops.exit = ibm44x_dbcr_reset;
1496 + fdt_init(_dtb_start);
1497 + serial_console_init();
1498 +}
1499 --- a/arch/powerpc/boot/devtree.c
1500 +++ b/arch/powerpc/boot/devtree.c
1501 @@ -350,3 +350,23 @@ int dt_is_compatible(void *node, const c
1502
1503 return 0;
1504 }
1505 +
1506 +int dt_get_virtual_reg(void *node, void **addr, int nres)
1507 +{
1508 + unsigned long xaddr;
1509 + int n;
1510 +
1511 + n = getprop(node, "virtual-reg", addr, nres * 4);
1512 + if (n > 0)
1513 + return n / 4;
1514 +
1515 + for (n = 0; n < nres; n++) {
1516 + if (!dt_xlate_reg(node, n, &xaddr, NULL))
1517 + break;
1518 +
1519 + addr[n] = (void *)xaddr;
1520 + }
1521 +
1522 + return n;
1523 +}
1524 +
1525 --- a/arch/powerpc/boot/dts/bamboo.dts
1526 +++ b/arch/powerpc/boot/dts/bamboo.dts
1527 @@ -204,7 +204,6 @@
1528 };
1529
1530 EMAC0: ethernet@ef600e00 {
1531 - linux,network-index = <0>;
1532 device_type = "network";
1533 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
1534 interrupt-parent = <&UIC1>;
1535 @@ -225,7 +224,6 @@
1536 };
1537
1538 EMAC1: ethernet@ef600f00 {
1539 - linux,network-index = <1>;
1540 device_type = "network";
1541 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
1542 interrupt-parent = <&UIC1>;
1543 --- /dev/null
1544 +++ b/arch/powerpc/boot/dts/canyonlands.dts
1545 @@ -0,0 +1,402 @@
1546 +/*
1547 + * Device Tree Source for AMCC Canyonlands (460EX)
1548 + *
1549 + * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
1550 + *
1551 + * This file is licensed under the terms of the GNU General Public
1552 + * License version 2. This program is licensed "as is" without
1553 + * any warranty of any kind, whether express or implied.
1554 + */
1555 +
1556 +/ {
1557 + #address-cells = <2>;
1558 + #size-cells = <1>;
1559 + model = "amcc,canyonlands";
1560 + compatible = "amcc,canyonlands";
1561 + dcr-parent = <&/cpus/cpu@0>;
1562 +
1563 + aliases {
1564 + ethernet0 = &EMAC0;
1565 + ethernet1 = &EMAC1;
1566 + serial0 = &UART0;
1567 + serial1 = &UART1;
1568 + };
1569 +
1570 + cpus {
1571 + #address-cells = <1>;
1572 + #size-cells = <0>;
1573 +
1574 + cpu@0 {
1575 + device_type = "cpu";
1576 + model = "PowerPC,460EX";
1577 + reg = <0>;
1578 + clock-frequency = <0>; /* Filled in by U-Boot */
1579 + timebase-frequency = <0>; /* Filled in by U-Boot */
1580 + i-cache-line-size = <20>;
1581 + d-cache-line-size = <20>;
1582 + i-cache-size = <8000>;
1583 + d-cache-size = <8000>;
1584 + dcr-controller;
1585 + dcr-access-method = "native";
1586 + };
1587 + };
1588 +
1589 + memory {
1590 + device_type = "memory";
1591 + reg = <0 0 0>; /* Filled in by U-Boot */
1592 + };
1593 +
1594 + UIC0: interrupt-controller0 {
1595 + compatible = "ibm,uic-460ex","ibm,uic";
1596 + interrupt-controller;
1597 + cell-index = <0>;
1598 + dcr-reg = <0c0 009>;
1599 + #address-cells = <0>;
1600 + #size-cells = <0>;
1601 + #interrupt-cells = <2>;
1602 + };
1603 +
1604 + UIC1: interrupt-controller1 {
1605 + compatible = "ibm,uic-460ex","ibm,uic";
1606 + interrupt-controller;
1607 + cell-index = <1>;
1608 + dcr-reg = <0d0 009>;
1609 + #address-cells = <0>;
1610 + #size-cells = <0>;
1611 + #interrupt-cells = <2>;
1612 + interrupts = <1e 4 1f 4>; /* cascade */
1613 + interrupt-parent = <&UIC0>;
1614 + };
1615 +
1616 + UIC2: interrupt-controller2 {
1617 + compatible = "ibm,uic-460ex","ibm,uic";
1618 + interrupt-controller;
1619 + cell-index = <2>;
1620 + dcr-reg = <0e0 009>;
1621 + #address-cells = <0>;
1622 + #size-cells = <0>;
1623 + #interrupt-cells = <2>;
1624 + interrupts = <a 4 b 4>; /* cascade */
1625 + interrupt-parent = <&UIC0>;
1626 + };
1627 +
1628 + UIC3: interrupt-controller3 {
1629 + compatible = "ibm,uic-460ex","ibm,uic";
1630 + interrupt-controller;
1631 + cell-index = <3>;
1632 + dcr-reg = <0f0 009>;
1633 + #address-cells = <0>;
1634 + #size-cells = <0>;
1635 + #interrupt-cells = <2>;
1636 + interrupts = <10 4 11 4>; /* cascade */
1637 + interrupt-parent = <&UIC0>;
1638 + };
1639 +
1640 + SDR0: sdr {
1641 + compatible = "ibm,sdr-460ex";
1642 + dcr-reg = <00e 002>;
1643 + };
1644 +
1645 + CPR0: cpr {
1646 + compatible = "ibm,cpr-460ex";
1647 + dcr-reg = <00c 002>;
1648 + };
1649 +
1650 + plb {
1651 + compatible = "ibm,plb-460ex", "ibm,plb4";
1652 + #address-cells = <2>;
1653 + #size-cells = <1>;
1654 + ranges;
1655 + clock-frequency = <0>; /* Filled in by U-Boot */
1656 +
1657 + SDRAM0: sdram {
1658 + compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
1659 + dcr-reg = <010 2>;
1660 + };
1661 +
1662 + MAL0: mcmal {
1663 + compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
1664 + dcr-reg = <180 62>;
1665 + num-tx-chans = <2>;
1666 + num-rx-chans = <10>;
1667 + #address-cells = <0>;
1668 + #size-cells = <0>;
1669 + interrupt-parent = <&UIC2>;
1670 + interrupts = < /*TXEOB*/ 6 4
1671 + /*RXEOB*/ 7 4
1672 + /*SERR*/ 3 4
1673 + /*TXDE*/ 4 4
1674 + /*RXDE*/ 5 4>;
1675 + };
1676 +
1677 + POB0: opb {
1678 + compatible = "ibm,opb-460ex", "ibm,opb";
1679 + #address-cells = <1>;
1680 + #size-cells = <1>;
1681 + ranges = <b0000000 4 b0000000 50000000>;
1682 + clock-frequency = <0>; /* Filled in by U-Boot */
1683 +
1684 + EBC0: ebc {
1685 + compatible = "ibm,ebc-460ex", "ibm,ebc";
1686 + dcr-reg = <012 2>;
1687 + #address-cells = <2>;
1688 + #size-cells = <1>;
1689 + clock-frequency = <0>; /* Filled in by U-Boot */
1690 + interrupts = <6 4>;
1691 + interrupt-parent = <&UIC1>;
1692 + };
1693 +
1694 + UART0: serial@ef600300 {
1695 + device_type = "serial";
1696 + compatible = "ns16550";
1697 + reg = <ef600300 8>;
1698 + virtual-reg = <ef600300>;
1699 + clock-frequency = <0>; /* Filled in by U-Boot */
1700 + current-speed = <0>; /* Filled in by U-Boot */
1701 + interrupt-parent = <&UIC1>;
1702 + interrupts = <1 4>;
1703 + };
1704 +
1705 + UART1: serial@ef600400 {
1706 + device_type = "serial";
1707 + compatible = "ns16550";
1708 + reg = <ef600400 8>;
1709 + virtual-reg = <ef600400>;
1710 + clock-frequency = <0>; /* Filled in by U-Boot */
1711 + current-speed = <0>; /* Filled in by U-Boot */
1712 + interrupt-parent = <&UIC0>;
1713 + interrupts = <1 4>;
1714 + };
1715 +
1716 + UART2: serial@ef600500 {
1717 + device_type = "serial";
1718 + compatible = "ns16550";
1719 + reg = <ef600500 8>;
1720 + virtual-reg = <ef600500>;
1721 + clock-frequency = <0>; /* Filled in by U-Boot */
1722 + current-speed = <0>; /* Filled in by U-Boot */
1723 + interrupt-parent = <&UIC1>;
1724 + interrupts = <1d 4>;
1725 + };
1726 +
1727 + UART3: serial@ef600600 {
1728 + device_type = "serial";
1729 + compatible = "ns16550";
1730 + reg = <ef600600 8>;
1731 + virtual-reg = <ef600600>;
1732 + clock-frequency = <0>; /* Filled in by U-Boot */
1733 + current-speed = <0>; /* Filled in by U-Boot */
1734 + interrupt-parent = <&UIC1>;
1735 + interrupts = <1e 4>;
1736 + };
1737 +
1738 + IIC0: i2c@ef600700 {
1739 + compatible = "ibm,iic-460ex", "ibm,iic";
1740 + reg = <ef600700 14>;
1741 + interrupt-parent = <&UIC0>;
1742 + interrupts = <2 4>;
1743 + };
1744 +
1745 + IIC1: i2c@ef600800 {
1746 + compatible = "ibm,iic-460ex", "ibm,iic";
1747 + reg = <ef600800 14>;
1748 + interrupt-parent = <&UIC0>;
1749 + interrupts = <3 4>;
1750 + };
1751 +
1752 + ZMII0: emac-zmii@ef600d00 {
1753 + compatible = "ibm,zmii-460ex", "ibm,zmii";
1754 + reg = <ef600d00 c>;
1755 + };
1756 +
1757 + RGMII0: emac-rgmii@ef601500 {
1758 + compatible = "ibm,rgmii-460ex", "ibm,rgmii";
1759 + reg = <ef601500 8>;
1760 + has-mdio;
1761 + };
1762 +
1763 + TAH0: emac-tah@ef601350 {
1764 + compatible = "ibm,tah-460ex", "ibm,tah";
1765 + reg = <ef601350 30>;
1766 + };
1767 +
1768 + TAH1: emac-tah@ef601450 {
1769 + compatible = "ibm,tah-460ex", "ibm,tah";
1770 + reg = <ef601450 30>;
1771 + };
1772 +
1773 + EMAC0: ethernet@ef600e00 {
1774 + device_type = "network";
1775 + compatible = "ibm,emac-460ex", "ibm,emac4";
1776 + interrupt-parent = <&EMAC0>;
1777 + interrupts = <0 1>;
1778 + #interrupt-cells = <1>;
1779 + #address-cells = <0>;
1780 + #size-cells = <0>;
1781 + interrupt-map = </*Status*/ 0 &UIC2 10 4
1782 + /*Wake*/ 1 &UIC2 14 4>;
1783 + reg = <ef600e00 70>;
1784 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
1785 + mal-device = <&MAL0>;
1786 + mal-tx-channel = <0>;
1787 + mal-rx-channel = <0>;
1788 + cell-index = <0>;
1789 + max-frame-size = <2328>;
1790 + rx-fifo-size = <1000>;
1791 + tx-fifo-size = <800>;
1792 + phy-mode = "rgmii";
1793 + phy-map = <00000000>;
1794 + rgmii-device = <&RGMII0>;
1795 + rgmii-channel = <0>;
1796 + tah-device = <&TAH0>;
1797 + tah-channel = <0>;
1798 + has-inverted-stacr-oc;
1799 + has-new-stacr-staopc;
1800 + };
1801 +
1802 + EMAC1: ethernet@ef600f00 {
1803 + device_type = "network";
1804 + compatible = "ibm,emac-460ex", "ibm,emac4";
1805 + interrupt-parent = <&EMAC1>;
1806 + interrupts = <0 1>;
1807 + #interrupt-cells = <1>;
1808 + #address-cells = <0>;
1809 + #size-cells = <0>;
1810 + interrupt-map = </*Status*/ 0 &UIC2 11 4
1811 + /*Wake*/ 1 &UIC2 15 4>;
1812 + reg = <ef600f00 70>;
1813 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
1814 + mal-device = <&MAL0>;
1815 + mal-tx-channel = <1>;
1816 + mal-rx-channel = <8>;
1817 + cell-index = <1>;
1818 + max-frame-size = <2328>;
1819 + rx-fifo-size = <1000>;
1820 + tx-fifo-size = <800>;
1821 + phy-mode = "rgmii";
1822 + phy-map = <00000000>;
1823 + rgmii-device = <&RGMII0>;
1824 + rgmii-channel = <1>;
1825 + tah-device = <&TAH1>;
1826 + tah-channel = <1>;
1827 + has-inverted-stacr-oc;
1828 + has-new-stacr-staopc;
1829 + mdio-device = <&EMAC0>;
1830 + };
1831 + };
1832 +
1833 + PCIX0: pci@c0ec00000 {
1834 + device_type = "pci";
1835 + #interrupt-cells = <1>;
1836 + #size-cells = <2>;
1837 + #address-cells = <3>;
1838 + compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
1839 + primary;
1840 + large-inbound-windows;
1841 + enable-msi-hole;
1842 + reg = <c 0ec00000 8 /* Config space access */
1843 + 0 0 0 /* no IACK cycles */
1844 + c 0ed00000 4 /* Special cycles */
1845 + c 0ec80000 100 /* Internal registers */
1846 + c 0ec80100 fc>; /* Internal messaging registers */
1847 +
1848 + /* Outbound ranges, one memory and one IO,
1849 + * later cannot be changed
1850 + */
1851 + ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
1852 + 01000000 0 00000000 0000000c 08000000 0 00010000>;
1853 +
1854 + /* Inbound 2GB range starting at 0 */
1855 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
1856 +
1857 + /* This drives busses 0 to 0x3f */
1858 + bus-range = <0 3f>;
1859 +
1860 + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
1861 + interrupt-map-mask = <0000 0 0 0>;
1862 + interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
1863 + };
1864 +
1865 + PCIE0: pciex@d00000000 {
1866 + device_type = "pci";
1867 + #interrupt-cells = <1>;
1868 + #size-cells = <2>;
1869 + #address-cells = <3>;
1870 + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
1871 + primary;
1872 + port = <0>; /* port number */
1873 + reg = <d 00000000 20000000 /* Config space access */
1874 + c 08010000 00001000>; /* Registers */
1875 + dcr-reg = <100 020>;
1876 + sdr-base = <300>;
1877 +
1878 + /* Outbound ranges, one memory and one IO,
1879 + * later cannot be changed
1880 + */
1881 + ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
1882 + 01000000 0 00000000 0000000f 80000000 0 00010000>;
1883 +
1884 + /* Inbound 2GB range starting at 0 */
1885 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
1886 +
1887 + /* This drives busses 40 to 0x7f */
1888 + bus-range = <40 7f>;
1889 +
1890 + /* Legacy interrupts (note the weird polarity, the bridge seems
1891 + * to invert PCIe legacy interrupts).
1892 + * We are de-swizzling here because the numbers are actually for
1893 + * port of the root complex virtual P2P bridge. But I want
1894 + * to avoid putting a node for it in the tree, so the numbers
1895 + * below are basically de-swizzled numbers.
1896 + * The real slot is on idsel 0, so the swizzling is 1:1
1897 + */
1898 + interrupt-map-mask = <0000 0 0 7>;
1899 + interrupt-map = <
1900 + 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
1901 + 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
1902 + 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
1903 + 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
1904 + };
1905 +
1906 + PCIE1: pciex@d20000000 {
1907 + device_type = "pci";
1908 + #interrupt-cells = <1>;
1909 + #size-cells = <2>;
1910 + #address-cells = <3>;
1911 + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
1912 + primary;
1913 + port = <1>; /* port number */
1914 + reg = <d 20000000 20000000 /* Config space access */
1915 + c 08011000 00001000>; /* Registers */
1916 + dcr-reg = <120 020>;
1917 + sdr-base = <340>;
1918 +
1919 + /* Outbound ranges, one memory and one IO,
1920 + * later cannot be changed
1921 + */
1922 + ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
1923 + 01000000 0 00000000 0000000f 80010000 0 00010000>;
1924 +
1925 + /* Inbound 2GB range starting at 0 */
1926 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
1927 +
1928 + /* This drives busses 80 to 0xbf */
1929 + bus-range = <80 bf>;
1930 +
1931 + /* Legacy interrupts (note the weird polarity, the bridge seems
1932 + * to invert PCIe legacy interrupts).
1933 + * We are de-swizzling here because the numbers are actually for
1934 + * port of the root complex virtual P2P bridge. But I want
1935 + * to avoid putting a node for it in the tree, so the numbers
1936 + * below are basically de-swizzled numbers.
1937 + * The real slot is on idsel 0, so the swizzling is 1:1
1938 + */
1939 + interrupt-map-mask = <0000 0 0 7>;
1940 + interrupt-map = <
1941 + 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
1942 + 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
1943 + 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
1944 + 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
1945 + };
1946 + };
1947 +};
1948 --- a/arch/powerpc/boot/dts/ebony.dts
1949 +++ b/arch/powerpc/boot/dts/ebony.dts
1950 @@ -241,7 +241,6 @@
1951 };
1952
1953 EMAC0: ethernet@40000800 {
1954 - linux,network-index = <0>;
1955 device_type = "network";
1956 compatible = "ibm,emac-440gp", "ibm,emac";
1957 interrupt-parent = <&UIC1>;
1958 @@ -261,7 +260,6 @@
1959 zmii-channel = <0>;
1960 };
1961 EMAC1: ethernet@40000900 {
1962 - linux,network-index = <1>;
1963 device_type = "network";
1964 compatible = "ibm,emac-440gp", "ibm,emac";
1965 interrupt-parent = <&UIC1>;
1966 --- a/arch/powerpc/boot/dts/ep8248e.dts
1967 +++ b/arch/powerpc/boot/dts/ep8248e.dts
1968 @@ -121,8 +121,7 @@
1969
1970 data@0 {
1971 compatible = "fsl,cpm-muram-data";
1972 - reg = <0 0x1100 0x1140
1973 - 0xec0 0x9800 0x800>;
1974 + reg = <0 0x2000 0x9800 0x800>;
1975 };
1976 };
1977
1978 @@ -138,7 +137,7 @@
1979 device_type = "serial";
1980 compatible = "fsl,mpc8248-smc-uart",
1981 "fsl,cpm2-smc-uart";
1982 - reg = <0x11a80 0x20 0x1100 0x40>;
1983 + reg = <0x11a80 0x20 0x87fc 2>;
1984 interrupts = <4 8>;
1985 interrupt-parent = <&PIC>;
1986 fsl,cpm-brg = <7>;
1987 --- a/arch/powerpc/boot/dts/ep88xc.dts
1988 +++ b/arch/powerpc/boot/dts/ep88xc.dts
1989 @@ -2,7 +2,7 @@
1990 * EP88xC Device Tree Source
1991 *
1992 * Copyright 2006 MontaVista Software, Inc.
1993 - * Copyright 2007 Freescale Semiconductor, Inc.
1994 + * Copyright 2007,2008 Freescale Semiconductor, Inc.
1995 *
1996 * This program is free software; you can redistribute it and/or modify it
1997 * under the terms of the GNU General Public License as published by the
1998 @@ -10,6 +10,7 @@
1999 * option) any later version.
2000 */
2001
2002 +/dts-v1/;
2003
2004 / {
2005 model = "EP88xC";
2006 @@ -23,44 +24,44 @@
2007
2008 PowerPC,885@0 {
2009 device_type = "cpu";
2010 - reg = <0>;
2011 - d-cache-line-size = <d#16>;
2012 - i-cache-line-size = <d#16>;
2013 - d-cache-size = <d#8192>;
2014 - i-cache-size = <d#8192>;
2015 + reg = <0x0>;
2016 + d-cache-line-size = <16>;
2017 + i-cache-line-size = <16>;
2018 + d-cache-size = <8192>;
2019 + i-cache-size = <8192>;
2020 timebase-frequency = <0>;
2021 bus-frequency = <0>;
2022 clock-frequency = <0>;
2023 - interrupts = <f 2>; // decrementer interrupt
2024 + interrupts = <15 2>; // decrementer interrupt
2025 interrupt-parent = <&PIC>;
2026 };
2027 };
2028
2029 memory {
2030 device_type = "memory";
2031 - reg = <0 0>;
2032 + reg = <0x0 0x0>;
2033 };
2034
2035 localbus@fa200100 {
2036 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
2037 #address-cells = <2>;
2038 #size-cells = <1>;
2039 - reg = <fa200100 40>;
2040 + reg = <0xfa200100 0x40>;
2041
2042 ranges = <
2043 - 0 0 fc000000 04000000
2044 - 3 0 fa000000 01000000
2045 + 0x0 0x0 0xfc000000 0x4000000
2046 + 0x3 0x0 0xfa000000 0x1000000
2047 >;
2048
2049 flash@0,2000000 {
2050 compatible = "cfi-flash";
2051 - reg = <0 2000000 2000000>;
2052 + reg = <0x0 0x2000000 0x2000000>;
2053 bank-width = <4>;
2054 device-width = <2>;
2055 };
2056
2057 board-control@3,400000 {
2058 - reg = <3 400000 10>;
2059 + reg = <0x3 0x400000 0x10>;
2060 compatible = "fsl,ep88xc-bcsr";
2061 };
2062 };
2063 @@ -70,25 +71,25 @@
2064 #address-cells = <1>;
2065 #size-cells = <1>;
2066 device_type = "soc";
2067 - ranges = <0 fa200000 00004000>;
2068 + ranges = <0x0 0xfa200000 0x4000>;
2069 bus-frequency = <0>;
2070
2071 // Temporary -- will go away once kernel uses ranges for get_immrbase().
2072 - reg = <fa200000 4000>;
2073 + reg = <0xfa200000 0x4000>;
2074
2075 mdio@e00 {
2076 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
2077 - reg = <e00 188>;
2078 + reg = <0xe00 0x188>;
2079 #address-cells = <1>;
2080 #size-cells = <0>;
2081
2082 PHY0: ethernet-phy@0 {
2083 - reg = <0>;
2084 + reg = <0x0>;
2085 device_type = "ethernet-phy";
2086 };
2087
2088 PHY1: ethernet-phy@1 {
2089 - reg = <1>;
2090 + reg = <0x1>;
2091 device_type = "ethernet-phy";
2092 };
2093 };
2094 @@ -97,7 +98,7 @@
2095 device_type = "network";
2096 compatible = "fsl,mpc885-fec-enet",
2097 "fsl,pq1-fec-enet";
2098 - reg = <e00 188>;
2099 + reg = <0xe00 0x188>;
2100 local-mac-address = [ 00 00 00 00 00 00 ];
2101 interrupts = <3 1>;
2102 interrupt-parent = <&PIC>;
2103 @@ -109,7 +110,7 @@
2104 device_type = "network";
2105 compatible = "fsl,mpc885-fec-enet",
2106 "fsl,pq1-fec-enet";
2107 - reg = <1e00 188>;
2108 + reg = <0x1e00 0x188>;
2109 local-mac-address = [ 00 00 00 00 00 00 ];
2110 interrupts = <7 1>;
2111 interrupt-parent = <&PIC>;
2112 @@ -120,7 +121,7 @@
2113 PIC: interrupt-controller@0 {
2114 interrupt-controller;
2115 #interrupt-cells = <2>;
2116 - reg = <0 24>;
2117 + reg = <0x0 0x24>;
2118 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
2119 };
2120
2121 @@ -130,29 +131,29 @@
2122 #size-cells = <2>;
2123 compatible = "fsl,pq-pcmcia";
2124 device_type = "pcmcia";
2125 - reg = <80 80>;
2126 + reg = <0x80 0x80>;
2127 interrupt-parent = <&PIC>;
2128 - interrupts = <d 1>;
2129 + interrupts = <13 1>;
2130 };
2131
2132 cpm@9c0 {
2133 #address-cells = <1>;
2134 #size-cells = <1>;
2135 compatible = "fsl,mpc885-cpm", "fsl,cpm1";
2136 - command-proc = <9c0>;
2137 + command-proc = <0x9c0>;
2138 interrupts = <0>; // cpm error interrupt
2139 interrupt-parent = <&CPM_PIC>;
2140 - reg = <9c0 40>;
2141 + reg = <0x9c0 0x40>;
2142 ranges;
2143
2144 muram@2000 {
2145 #address-cells = <1>;
2146 #size-cells = <1>;
2147 - ranges = <0 2000 2000>;
2148 + ranges = <0x0 0x2000 0x2000>;
2149
2150 data@0 {
2151 compatible = "fsl,cpm-muram-data";
2152 - reg = <0 1c00>;
2153 + reg = <0x0 0x1c00>;
2154 };
2155 };
2156
2157 @@ -160,7 +161,7 @@
2158 compatible = "fsl,mpc885-brg",
2159 "fsl,cpm1-brg",
2160 "fsl,cpm-brg";
2161 - reg = <9f0 10>;
2162 + reg = <0x9f0 0x10>;
2163 };
2164
2165 CPM_PIC: interrupt-controller@930 {
2166 @@ -168,7 +169,7 @@
2167 #interrupt-cells = <1>;
2168 interrupts = <5 2 0 2>;
2169 interrupt-parent = <&PIC>;
2170 - reg = <930 20>;
2171 + reg = <0x930 0x20>;
2172 compatible = "fsl,mpc885-cpm-pic",
2173 "fsl,cpm1-pic";
2174 };
2175 @@ -178,11 +179,11 @@
2176 device_type = "serial";
2177 compatible = "fsl,mpc885-smc-uart",
2178 "fsl,cpm1-smc-uart";
2179 - reg = <a80 10 3e80 40>;
2180 + reg = <0xa80 0x10 0x3e80 0x40>;
2181 interrupts = <4>;
2182 interrupt-parent = <&CPM_PIC>;
2183 fsl,cpm-brg = <1>;
2184 - fsl,cpm-command = <0090>;
2185 + fsl,cpm-command = <0x90>;
2186 linux,planetcore-label = "SMC1";
2187 };
2188
2189 @@ -191,11 +192,11 @@
2190 device_type = "serial";
2191 compatible = "fsl,mpc885-scc-uart",
2192 "fsl,cpm1-scc-uart";
2193 - reg = <a20 20 3d00 80>;
2194 - interrupts = <1d>;
2195 + reg = <0xa20 0x20 0x3d00 0x80>;
2196 + interrupts = <29>;
2197 interrupt-parent = <&CPM_PIC>;
2198 fsl,cpm-brg = <2>;
2199 - fsl,cpm-command = <0040>;
2200 + fsl,cpm-command = <0x40>;
2201 linux,planetcore-label = "SCC2";
2202 };
2203
2204 @@ -204,9 +205,9 @@
2205 #size-cells = <0>;
2206 compatible = "fsl,mpc885-usb",
2207 "fsl,cpm1-usb";
2208 - reg = <a00 18 1c00 80>;
2209 + reg = <0xa00 0x18 0x1c00 0x80>;
2210 interrupt-parent = <&CPM_PIC>;
2211 - interrupts = <1e>;
2212 + interrupts = <30>;
2213 fsl,cpm-command = <0000>;
2214 };
2215 };
2216 --- /dev/null
2217 +++ b/arch/powerpc/boot/dts/glacier.dts
2218 @@ -0,0 +1,467 @@
2219 +/*
2220 + * Device Tree Source for AMCC Glacier (460GT)
2221 + *
2222 + * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
2223 + *
2224 + * This file is licensed under the terms of the GNU General Public
2225 + * License version 2. This program is licensed "as is" without
2226 + * any warranty of any kind, whether express or implied.
2227 + */
2228 +
2229 +/ {
2230 + #address-cells = <2>;
2231 + #size-cells = <1>;
2232 + model = "amcc,glacier";
2233 + compatible = "amcc,glacier", "amcc,canyonlands";
2234 + dcr-parent = <&/cpus/cpu@0>;
2235 +
2236 + aliases {
2237 + ethernet0 = &EMAC0;
2238 + ethernet1 = &EMAC1;
2239 + ethernet2 = &EMAC2;
2240 + ethernet3 = &EMAC3;
2241 + serial0 = &UART0;
2242 + serial1 = &UART1;
2243 + };
2244 +
2245 + cpus {
2246 + #address-cells = <1>;
2247 + #size-cells = <0>;
2248 +
2249 + cpu@0 {
2250 + device_type = "cpu";
2251 + model = "PowerPC,460GT";
2252 + reg = <0>;
2253 + clock-frequency = <0>; /* Filled in by U-Boot */
2254 + timebase-frequency = <0>; /* Filled in by U-Boot */
2255 + i-cache-line-size = <20>;
2256 + d-cache-line-size = <20>;
2257 + i-cache-size = <8000>;
2258 + d-cache-size = <8000>;
2259 + dcr-controller;
2260 + dcr-access-method = "native";
2261 + };
2262 + };
2263 +
2264 + memory {
2265 + device_type = "memory";
2266 + reg = <0 0 0>; /* Filled in by U-Boot */
2267 + };
2268 +
2269 + UIC0: interrupt-controller0 {
2270 + compatible = "ibm,uic-460gt","ibm,uic";
2271 + interrupt-controller;
2272 + cell-index = <0>;
2273 + dcr-reg = <0c0 009>;
2274 + #address-cells = <0>;
2275 + #size-cells = <0>;
2276 + #interrupt-cells = <2>;
2277 + };
2278 +
2279 + UIC1: interrupt-controller1 {
2280 + compatible = "ibm,uic-460gt","ibm,uic";
2281 + interrupt-controller;
2282 + cell-index = <1>;
2283 + dcr-reg = <0d0 009>;
2284 + #address-cells = <0>;
2285 + #size-cells = <0>;
2286 + #interrupt-cells = <2>;
2287 + interrupts = <1e 4 1f 4>; /* cascade */
2288 + interrupt-parent = <&UIC0>;
2289 + };
2290 +
2291 + UIC2: interrupt-controller2 {
2292 + compatible = "ibm,uic-460gt","ibm,uic";
2293 + interrupt-controller;
2294 + cell-index = <2>;
2295 + dcr-reg = <0e0 009>;
2296 + #address-cells = <0>;
2297 + #size-cells = <0>;
2298 + #interrupt-cells = <2>;
2299 + interrupts = <a 4 b 4>; /* cascade */
2300 + interrupt-parent = <&UIC0>;
2301 + };
2302 +
2303 + UIC3: interrupt-controller3 {
2304 + compatible = "ibm,uic-460gt","ibm,uic";
2305 + interrupt-controller;
2306 + cell-index = <3>;
2307 + dcr-reg = <0f0 009>;
2308 + #address-cells = <0>;
2309 + #size-cells = <0>;
2310 + #interrupt-cells = <2>;
2311 + interrupts = <10 4 11 4>; /* cascade */
2312 + interrupt-parent = <&UIC0>;
2313 + };
2314 +
2315 + SDR0: sdr {
2316 + compatible = "ibm,sdr-460gt";
2317 + dcr-reg = <00e 002>;
2318 + };
2319 +
2320 + CPR0: cpr {
2321 + compatible = "ibm,cpr-460gt";
2322 + dcr-reg = <00c 002>;
2323 + };
2324 +
2325 + plb {
2326 + compatible = "ibm,plb-460gt", "ibm,plb4";
2327 + #address-cells = <2>;
2328 + #size-cells = <1>;
2329 + ranges;
2330 + clock-frequency = <0>; /* Filled in by U-Boot */
2331 +
2332 + SDRAM0: sdram {
2333 + compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
2334 + dcr-reg = <010 2>;
2335 + };
2336 +
2337 + MAL0: mcmal {
2338 + compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
2339 + dcr-reg = <180 62>;
2340 + num-tx-chans = <4>;
2341 + num-rx-chans = <20>;
2342 + #address-cells = <0>;
2343 + #size-cells = <0>;
2344 + interrupt-parent = <&UIC2>;
2345 + interrupts = < /*TXEOB*/ 6 4
2346 + /*RXEOB*/ 7 4
2347 + /*SERR*/ 3 4
2348 + /*TXDE*/ 4 4
2349 + /*RXDE*/ 5 4>;
2350 + desc-base-addr-high = <8>;
2351 + };
2352 +
2353 + POB0: opb {
2354 + compatible = "ibm,opb-460gt", "ibm,opb";
2355 + #address-cells = <1>;
2356 + #size-cells = <1>;
2357 + ranges = <b0000000 4 b0000000 50000000>;
2358 + clock-frequency = <0>; /* Filled in by U-Boot */
2359 +
2360 + EBC0: ebc {
2361 + compatible = "ibm,ebc-460gt", "ibm,ebc";
2362 + dcr-reg = <012 2>;
2363 + #address-cells = <2>;
2364 + #size-cells = <1>;
2365 + clock-frequency = <0>; /* Filled in by U-Boot */
2366 + interrupts = <6 4>;
2367 + interrupt-parent = <&UIC1>;
2368 + };
2369 +
2370 + UART0: serial@ef600300 {
2371 + device_type = "serial";
2372 + compatible = "ns16550";
2373 + reg = <ef600300 8>;
2374 + virtual-reg = <ef600300>;
2375 + clock-frequency = <0>; /* Filled in by U-Boot */
2376 + current-speed = <0>; /* Filled in by U-Boot */
2377 + interrupt-parent = <&UIC1>;
2378 + interrupts = <1 4>;
2379 + };
2380 +
2381 + UART1: serial@ef600400 {
2382 + device_type = "serial";
2383 + compatible = "ns16550";
2384 + reg = <ef600400 8>;
2385 + virtual-reg = <ef600400>;
2386 + clock-frequency = <0>; /* Filled in by U-Boot */
2387 + current-speed = <0>; /* Filled in by U-Boot */
2388 + interrupt-parent = <&UIC0>;
2389 + interrupts = <1 4>;
2390 + };
2391 +
2392 + UART2: serial@ef600500 {
2393 + device_type = "serial";
2394 + compatible = "ns16550";
2395 + reg = <ef600500 8>;
2396 + virtual-reg = <ef600500>;
2397 + clock-frequency = <0>; /* Filled in by U-Boot */
2398 + current-speed = <0>; /* Filled in by U-Boot */
2399 + interrupt-parent = <&UIC1>;
2400 + interrupts = <1d 4>;
2401 + };
2402 +
2403 + UART3: serial@ef600600 {
2404 + device_type = "serial";
2405 + compatible = "ns16550";
2406 + reg = <ef600600 8>;
2407 + virtual-reg = <ef600600>;
2408 + clock-frequency = <0>; /* Filled in by U-Boot */
2409 + current-speed = <0>; /* Filled in by U-Boot */
2410 + interrupt-parent = <&UIC1>;
2411 + interrupts = <1e 4>;
2412 + };
2413 +
2414 + IIC0: i2c@ef600700 {
2415 + compatible = "ibm,iic-460gt", "ibm,iic";
2416 + reg = <ef600700 14>;
2417 + interrupt-parent = <&UIC0>;
2418 + interrupts = <2 4>;
2419 + };
2420 +
2421 + IIC1: i2c@ef600800 {
2422 + compatible = "ibm,iic-460gt", "ibm,iic";
2423 + reg = <ef600800 14>;
2424 + interrupt-parent = <&UIC0>;
2425 + interrupts = <3 4>;
2426 + };
2427 +
2428 + ZMII0: emac-zmii@ef600d00 {
2429 + compatible = "ibm,zmii-460gt", "ibm,zmii";
2430 + reg = <ef600d00 c>;
2431 + };
2432 +
2433 + RGMII0: emac-rgmii@ef601500 {
2434 + compatible = "ibm,rgmii-460gt", "ibm,rgmii";
2435 + reg = <ef601500 8>;
2436 + has-mdio;
2437 + };
2438 +
2439 + RGMII1: emac-rgmii@ef601600 {
2440 + compatible = "ibm,rgmii-460gt", "ibm,rgmii";
2441 + reg = <ef601600 8>;
2442 + has-mdio;
2443 + };
2444 +
2445 + TAH0: emac-tah@ef601350 {
2446 + compatible = "ibm,tah-460gt", "ibm,tah";
2447 + reg = <ef601350 30>;
2448 + };
2449 +
2450 + TAH1: emac-tah@ef601450 {
2451 + compatible = "ibm,tah-460gt", "ibm,tah";
2452 + reg = <ef601450 30>;
2453 + };
2454 +
2455 + EMAC0: ethernet@ef600e00 {
2456 + device_type = "network";
2457 + compatible = "ibm,emac-460gt", "ibm,emac4";
2458 + interrupt-parent = <&EMAC0>;
2459 + interrupts = <0 1>;
2460 + #interrupt-cells = <1>;
2461 + #address-cells = <0>;
2462 + #size-cells = <0>;
2463 + interrupt-map = </*Status*/ 0 &UIC2 10 4
2464 + /*Wake*/ 1 &UIC2 14 4>;
2465 + reg = <ef600e00 70>;
2466 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
2467 + mal-device = <&MAL0>;
2468 + mal-tx-channel = <0>;
2469 + mal-rx-channel = <0>;
2470 + cell-index = <0>;
2471 + max-frame-size = <2328>;
2472 + rx-fifo-size = <1000>;
2473 + tx-fifo-size = <800>;
2474 + phy-mode = "rgmii";
2475 + phy-map = <00000000>;
2476 + rgmii-device = <&RGMII0>;
2477 + rgmii-channel = <0>;
2478 + tah-device = <&TAH0>;
2479 + tah-channel = <0>;
2480 + has-inverted-stacr-oc;
2481 + has-new-stacr-staopc;
2482 + };
2483 +
2484 + EMAC1: ethernet@ef600f00 {
2485 + device_type = "network";
2486 + compatible = "ibm,emac-460gt", "ibm,emac4";
2487 + interrupt-parent = <&EMAC1>;
2488 + interrupts = <0 1>;
2489 + #interrupt-cells = <1>;
2490 + #address-cells = <0>;
2491 + #size-cells = <0>;
2492 + interrupt-map = </*Status*/ 0 &UIC2 11 4
2493 + /*Wake*/ 1 &UIC2 15 4>;
2494 + reg = <ef600f00 70>;
2495 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
2496 + mal-device = <&MAL0>;
2497 + mal-tx-channel = <1>;
2498 + mal-rx-channel = <8>;
2499 + cell-index = <1>;
2500 + max-frame-size = <2328>;
2501 + rx-fifo-size = <1000>;
2502 + tx-fifo-size = <800>;
2503 + phy-mode = "rgmii";
2504 + phy-map = <00000000>;
2505 + rgmii-device = <&RGMII0>;
2506 + rgmii-channel = <1>;
2507 + tah-device = <&TAH1>;
2508 + tah-channel = <1>;
2509 + has-inverted-stacr-oc;
2510 + has-new-stacr-staopc;
2511 + mdio-device = <&EMAC0>;
2512 + };
2513 +
2514 + EMAC2: ethernet@ef601100 {
2515 + device_type = "network";
2516 + compatible = "ibm,emac-460gt", "ibm,emac4";
2517 + interrupt-parent = <&EMAC2>;
2518 + interrupts = <0 1>;
2519 + #interrupt-cells = <1>;
2520 + #address-cells = <0>;
2521 + #size-cells = <0>;
2522 + interrupt-map = </*Status*/ 0 &UIC2 12 4
2523 + /*Wake*/ 1 &UIC2 16 4>;
2524 + reg = <ef601100 70>;
2525 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
2526 + mal-device = <&MAL0>;
2527 + mal-tx-channel = <2>;
2528 + mal-rx-channel = <10>;
2529 + cell-index = <2>;
2530 + max-frame-size = <2328>;
2531 + rx-fifo-size = <1000>;
2532 + tx-fifo-size = <800>;
2533 + phy-mode = "rgmii";
2534 + phy-map = <00000000>;
2535 + rgmii-device = <&RGMII1>;
2536 + rgmii-channel = <0>;
2537 + has-inverted-stacr-oc;
2538 + has-new-stacr-staopc;
2539 + mdio-device = <&EMAC0>;
2540 + };
2541 +
2542 + EMAC3: ethernet@ef601200 {
2543 + device_type = "network";
2544 + compatible = "ibm,emac-460gt", "ibm,emac4";
2545 + interrupt-parent = <&EMAC3>;
2546 + interrupts = <0 1>;
2547 + #interrupt-cells = <1>;
2548 + #address-cells = <0>;
2549 + #size-cells = <0>;
2550 + interrupt-map = </*Status*/ 0 &UIC2 13 4
2551 + /*Wake*/ 1 &UIC2 17 4>;
2552 + reg = <ef601200 70>;
2553 + local-mac-address = [000000000000]; /* Filled in by U-Boot */
2554 + mal-device = <&MAL0>;
2555 + mal-tx-channel = <3>;
2556 + mal-rx-channel = <18>;
2557 + cell-index = <3>;
2558 + max-frame-size = <2328>;
2559 + rx-fifo-size = <1000>;
2560 + tx-fifo-size = <800>;
2561 + phy-mode = "rgmii";
2562 + phy-map = <00000000>;
2563 + rgmii-device = <&RGMII1>;
2564 + rgmii-channel = <1>;
2565 + has-inverted-stacr-oc;
2566 + has-new-stacr-staopc;
2567 + mdio-device = <&EMAC0>;
2568 + };
2569 + };
2570 +
2571 + PCIX0: pci@c0ec00000 {
2572 + device_type = "pci";
2573 + #interrupt-cells = <1>;
2574 + #size-cells = <2>;
2575 + #address-cells = <3>;
2576 + compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix";
2577 + primary;
2578 + large-inbound-windows;
2579 + enable-msi-hole;
2580 + reg = <c 0ec00000 8 /* Config space access */
2581 + 0 0 0 /* no IACK cycles */
2582 + c 0ed00000 4 /* Special cycles */
2583 + c 0ec80000 100 /* Internal registers */
2584 + c 0ec80100 fc>; /* Internal messaging registers */
2585 +
2586 + /* Outbound ranges, one memory and one IO,
2587 + * later cannot be changed
2588 + */
2589 + ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
2590 + 01000000 0 00000000 0000000c 08000000 0 00010000>;
2591 +
2592 + /* Inbound 2GB range starting at 0 */
2593 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
2594 +
2595 + /* This drives busses 0 to 0x3f */
2596 + bus-range = <0 3f>;
2597 +
2598 + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
2599 + interrupt-map-mask = <0000 0 0 0>;
2600 + interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
2601 + };
2602 +
2603 + PCIE0: pciex@d00000000 {
2604 + device_type = "pci";
2605 + #interrupt-cells = <1>;
2606 + #size-cells = <2>;
2607 + #address-cells = <3>;
2608 + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
2609 + primary;
2610 + port = <0>; /* port number */
2611 + reg = <d 00000000 20000000 /* Config space access */
2612 + c 08010000 00001000>; /* Registers */
2613 + dcr-reg = <100 020>;
2614 + sdr-base = <300>;
2615 +
2616 + /* Outbound ranges, one memory and one IO,
2617 + * later cannot be changed
2618 + */
2619 + ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
2620 + 01000000 0 00000000 0000000f 80000000 0 00010000>;
2621 +
2622 + /* Inbound 2GB range starting at 0 */
2623 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
2624 +
2625 + /* This drives busses 40 to 0x7f */
2626 + bus-range = <40 7f>;
2627 +
2628 + /* Legacy interrupts (note the weird polarity, the bridge seems
2629 + * to invert PCIe legacy interrupts).
2630 + * We are de-swizzling here because the numbers are actually for
2631 + * port of the root complex virtual P2P bridge. But I want
2632 + * to avoid putting a node for it in the tree, so the numbers
2633 + * below are basically de-swizzled numbers.
2634 + * The real slot is on idsel 0, so the swizzling is 1:1
2635 + */
2636 + interrupt-map-mask = <0000 0 0 7>;
2637 + interrupt-map = <
2638 + 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
2639 + 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
2640 + 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
2641 + 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
2642 + };
2643 +
2644 + PCIE1: pciex@d20000000 {
2645 + device_type = "pci";
2646 + #interrupt-cells = <1>;
2647 + #size-cells = <2>;
2648 + #address-cells = <3>;
2649 + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
2650 + primary;
2651 + port = <1>; /* port number */
2652 + reg = <d 20000000 20000000 /* Config space access */
2653 + c 08011000 00001000>; /* Registers */
2654 + dcr-reg = <120 020>;
2655 + sdr-base = <340>;
2656 +
2657 + /* Outbound ranges, one memory and one IO,
2658 + * later cannot be changed
2659 + */
2660 + ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
2661 + 01000000 0 00000000 0000000f 80010000 0 00010000>;
2662 +
2663 + /* Inbound 2GB range starting at 0 */
2664 + dma-ranges = <42000000 0 0 0 0 0 80000000>;
2665 +
2666 + /* This drives busses 80 to 0xbf */
2667 + bus-range = <80 bf>;
2668 +
2669 + /* Legacy interrupts (note the weird polarity, the bridge seems
2670 + * to invert PCIe legacy interrupts).
2671 + * We are de-swizzling here because the numbers are actually for
2672 + * port of the root complex virtual P2P bridge. But I want
2673 + * to avoid putting a node for it in the tree, so the numbers
2674 + * below are basically de-swizzled numbers.
2675 + * The real slot is on idsel 0, so the swizzling is 1:1
2676 + */
2677 + interrupt-map-mask = <0000 0 0 7>;
2678 + interrupt-map = <
2679 + 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
2680 + 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
2681 + 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
2682 + 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
2683 + };
2684 + };
2685 +};
2686 --- a/arch/powerpc/boot/dts/haleakala.dts
2687 +++ b/arch/powerpc/boot/dts/haleakala.dts
2688 @@ -12,7 +12,7 @@
2689 #address-cells = <1>;
2690 #size-cells = <1>;
2691 model = "amcc,haleakala";
2692 - compatible = "amcc,kilauea";
2693 + compatible = "amcc,haleakala", "amcc,kilauea";
2694 dcr-parent = <&/cpus/cpu@0>;
2695
2696 aliases {
2697 @@ -218,7 +218,7 @@
2698 mal-tx-channel = <0>;
2699 mal-rx-channel = <0>;
2700 cell-index = <0>;
2701 - max-frame-size = <5dc>;
2702 + max-frame-size = <2328>;
2703 rx-fifo-size = <1000>;
2704 tx-fifo-size = <800>;
2705 phy-mode = "rgmii";
2706 --- a/arch/powerpc/boot/dts/katmai.dts
2707 +++ b/arch/powerpc/boot/dts/katmai.dts
2708 @@ -212,7 +212,7 @@
2709 mal-tx-channel = <0>;
2710 mal-rx-channel = <0>;
2711 cell-index = <0>;
2712 - max-frame-size = <5dc>;
2713 + max-frame-size = <2328>;
2714 rx-fifo-size = <1000>;
2715 tx-fifo-size = <800>;
2716 phy-mode = "gmii";
2717 --- a/arch/powerpc/boot/dts/kilauea.dts
2718 +++ b/arch/powerpc/boot/dts/kilauea.dts
2719 @@ -219,7 +219,7 @@
2720 mal-tx-channel = <0>;
2721 mal-rx-channel = <0>;
2722 cell-index = <0>;
2723 - max-frame-size = <5dc>;
2724 + max-frame-size = <2328>;
2725 rx-fifo-size = <1000>;
2726 tx-fifo-size = <800>;
2727 phy-mode = "rgmii";
2728 @@ -247,7 +247,7 @@
2729 mal-tx-channel = <1>;
2730 mal-rx-channel = <1>;
2731 cell-index = <1>;
2732 - max-frame-size = <5dc>;
2733 + max-frame-size = <2328>;
2734 rx-fifo-size = <1000>;
2735 tx-fifo-size = <800>;
2736 phy-mode = "rgmii";
2737 --- /dev/null
2738 +++ b/arch/powerpc/boot/dts/ksi8560.dts
2739 @@ -0,0 +1,267 @@
2740 +/*
2741 + * Device Tree Source for Emerson KSI8560
2742 + *
2743 + * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
2744 + *
2745 + * Based on mpc8560ads.dts
2746 + *
2747 + * 2008 (c) MontaVista, Software, Inc. This file is licensed under
2748 + * the terms of the GNU General Public License version 2. This program
2749 + * is licensed "as is" without any warranty of any kind, whether express
2750 + * or implied.
2751 + *
2752 + */
2753 +
2754 +/dts-v1/;
2755 +
2756 +/ {
2757 + model = "KSI8560";
2758 + compatible = "emerson,KSI8560";
2759 + #address-cells = <1>;
2760 + #size-cells = <1>;
2761 +
2762 + aliases {
2763 + ethernet0 = &enet0;
2764 + ethernet1 = &enet1;
2765 + ethernet2 = &enet2;
2766 + };
2767 +
2768 + cpus {
2769 + #address-cells = <1>;
2770 + #size-cells = <0>;
2771 +
2772 + PowerPC,8560@0 {
2773 + device_type = "cpu";
2774 + reg = <0>;
2775 + d-cache-line-size = <32>;
2776 + i-cache-line-size = <32>;
2777 + d-cache-size = <0x8000>; /* L1, 32K */
2778 + i-cache-size = <0x8000>; /* L1, 32K */
2779 + timebase-frequency = <0>; /* From U-boot */
2780 + bus-frequency = <0>; /* From U-boot */
2781 + clock-frequency = <0>; /* From U-boot */
2782 + };
2783 + };
2784 +
2785 + memory {
2786 + device_type = "memory";
2787 + reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
2788 + };
2789 +
2790 + soc@fdf00000 {
2791 + #address-cells = <1>;
2792 + #size-cells = <1>;
2793 + device_type = "soc";
2794 + ranges = <0x00000000 0xfdf00000 0x00100000>;
2795 + bus-frequency = <0>; /* Fixed by bootwrapper */
2796 +
2797 + memory-controller@2000 {
2798 + compatible = "fsl,8540-memory-controller";
2799 + reg = <0x2000 0x1000>;
2800 + interrupt-parent = <&MPIC>;
2801 + interrupts = <0x12 0x2>;
2802 + };
2803 +
2804 + l2-cache-controller@20000 {
2805 + compatible = "fsl,8540-l2-cache-controller";
2806 + reg = <0x20000 0x1000>;
2807 + cache-line-size = <0x20>; /* 32 bytes */
2808 + cache-size = <0x40000>; /* L2, 256K */
2809 + interrupt-parent = <&MPIC>;
2810 + interrupts = <0x10 0x2>;
2811 + };
2812 +
2813 + i2c@3000 {
2814 + #address-cells = <1>;
2815 + #size-cells = <0>;
2816 + cell-index = <0>;
2817 + compatible = "fsl-i2c";
2818 + reg = <0x3000 0x100>;
2819 + interrupts = <0x2b 0x2>;
2820 + interrupt-parent = <&MPIC>;
2821 + dfsrr;
2822 + };
2823 +
2824 + mdio@24520 { /* For TSECs */
2825 + #address-cells = <1>;
2826 + #size-cells = <0>;
2827 + compatible = "fsl,gianfar-mdio";
2828 + reg = <0x24520 0x20>;
2829 +
2830 + PHY1: ethernet-phy@1 {
2831 + interrupt-parent = <&MPIC>;
2832 + reg = <0x1>;
2833 + device_type = "ethernet-phy";
2834 + };
2835 +
2836 + PHY2: ethernet-phy@2 {
2837 + interrupt-parent = <&MPIC>;
2838 + reg = <0x2>;
2839 + device_type = "ethernet-phy";
2840 + };
2841 + };
2842 +
2843 + enet0: ethernet@24000 {
2844 + device_type = "network";
2845 + model = "TSEC";
2846 + compatible = "gianfar";
2847 + reg = <0x24000 0x1000>;
2848 + /* Mac address filled in by bootwrapper */
2849 + local-mac-address = [ 00 00 00 00 00 00 ];
2850 + interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
2851 + interrupt-parent = <&MPIC>;
2852 + phy-handle = <&PHY1>;
2853 + };
2854 +
2855 + enet1: ethernet@25000 {
2856 + device_type = "network";
2857 + model = "TSEC";
2858 + compatible = "gianfar";
2859 + reg = <0x25000 0x1000>;
2860 + /* Mac address filled in by bootwrapper */
2861 + local-mac-address = [ 00 00 00 00 00 00 ];
2862 + interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
2863 + interrupt-parent = <&MPIC>;
2864 + phy-handle = <&PHY2>;
2865 + };
2866 +
2867 + MPIC: pic@40000 {
2868 + #address-cells = <0>;
2869 + #interrupt-cells = <2>;
2870 + interrupt-controller;
2871 + reg = <0x40000 0x40000>;
2872 + device_type = "open-pic";
2873 + };
2874 +
2875 + cpm@919c0 {
2876 + #address-cells = <1>;
2877 + #size-cells = <1>;
2878 + compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
2879 + reg = <0x919c0 0x30>;
2880 + ranges;
2881 +
2882 + muram@80000 {
2883 + #address-cells = <1>;
2884 + #size-cells = <1>;
2885 + ranges = <0x0 0x80000 0x10000>;
2886 +
2887 + data@0 {
2888 + compatible = "fsl,cpm-muram-data";
2889 + reg = <0x0 0x4000 0x9000 0x2000>;
2890 + };
2891 + };
2892 +
2893 + brg@919f0 {
2894 + compatible = "fsl,mpc8560-brg",
2895 + "fsl,cpm2-brg",
2896 + "fsl,cpm-brg";
2897 + reg = <0x919f0 0x10 0x915f0 0x10>;
2898 + clock-frequency = <165000000>; /* 166MHz */
2899 + };
2900 +
2901 + CPMPIC: pic@90c00 {
2902 + #address-cells = <0>;
2903 + #interrupt-cells = <2>;
2904 + interrupt-controller;
2905 + interrupts = <0x2e 0x2>;
2906 + interrupt-parent = <&MPIC>;
2907 + reg = <0x90c00 0x80>;
2908 + compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
2909 + };
2910 +
2911 + serial@91a00 {
2912 + device_type = "serial";
2913 + compatible = "fsl,mpc8560-scc-uart",
2914 + "fsl,cpm2-scc-uart";
2915 + reg = <0x91a00 0x20 0x88000 0x100>;
2916 + fsl,cpm-brg = <1>;
2917 + fsl,cpm-command = <0x800000>;
2918 + current-speed = <0x1c200>;
2919 + interrupts = <0x28 0x8>;
2920 + interrupt-parent = <&CPMPIC>;
2921 + };
2922 +
2923 + serial@91a20 {
2924 + device_type = "serial";
2925 + compatible = "fsl,mpc8560-scc-uart",
2926 + "fsl,cpm2-scc-uart";
2927 + reg = <0x91a20 0x20 0x88100 0x100>;
2928 + fsl,cpm-brg = <2>;
2929 + fsl,cpm-command = <0x4a00000>;
2930 + current-speed = <0x1c200>;
2931 + interrupts = <0x29 0x8>;
2932 + interrupt-parent = <&CPMPIC>;
2933 + };
2934 +
2935 + mdio@90d00 { /* For FCCs */
2936 + #address-cells = <1>;
2937 + #size-cells = <0>;
2938 + compatible = "fsl,cpm2-mdio-bitbang";
2939 + reg = <0x90d00 0x14>;
2940 + fsl,mdio-pin = <24>;
2941 + fsl,mdc-pin = <25>;
2942 +
2943 + PHY0: ethernet-phy@0 {
2944 + interrupt-parent = <&MPIC>;
2945 + reg = <0x0>;
2946 + device_type = "ethernet-phy";
2947 + };
2948 + };
2949 +
2950 + enet2: ethernet@91300 {
2951 + device_type = "network";
2952 + compatible = "fsl,mpc8560-fcc-enet",
2953 + "fsl,cpm2-fcc-enet";
2954 + reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
2955 + /* Mac address filled in by bootwrapper */
2956 + local-mac-address = [ 00 00 00 00 00 00 ];
2957 + fsl,cpm-command = <0x12000300>;
2958 + interrupts = <0x20 0x8>;
2959 + interrupt-parent = <&CPMPIC>;
2960 + phy-handle = <&PHY0>;
2961 + };
2962 + };
2963 + };
2964 +
2965 + localbus@fdf05000 {
2966 + #address-cells = <2>;
2967 + #size-cells = <1>;
2968 + compatible = "fsl,mpc8560-localbus";
2969 + reg = <0xfdf05000 0x68>;
2970 +
2971 + ranges = <0x0 0x0 0xe0000000 0x00800000
2972 + 0x4 0x0 0xe8080000 0x00080000>;
2973 +
2974 + flash@0,0 {
2975 + #address-cells = <1>;
2976 + #size-cells = <1>;
2977 + compatible = "jedec-flash";
2978 + reg = <0x0 0x0 0x800000>;
2979 + bank-width = <0x2>;
2980 +
2981 + partition@0 {
2982 + label = "Primary Kernel";
2983 + reg = <0x0 0x180000>;
2984 + };
2985 + partition@180000 {
2986 + label = "Primary Filesystem";
2987 + reg = <0x180000 0x580000>;
2988 + };
2989 + partition@700000 {
2990 + label = "Monitor";
2991 + reg = <0x300000 0x100000>;
2992 + read-only;
2993 + };
2994 + };
2995 +
2996 + cpld@4,0 {
2997 + compatible = "emerson,KSI8560-cpld";
2998 + reg = <0x4 0x0 0x80000>;
2999 + };
3000 + };
3001 +
3002 +
3003 + chosen {
3004 + linux,stdout-path = "/soc/cpm/serial@91a00";
3005 + };
3006 +};
3007 --- a/arch/powerpc/boot/dts/kuroboxHD.dts
3008 +++ b/arch/powerpc/boot/dts/kuroboxHD.dts
3009 @@ -7,6 +7,7 @@
3010 * Based on sandpoint.dts
3011 *
3012 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
3013 + * Copyright 2008 Freescale Semiconductor, Inc.
3014 *
3015 * This file is licensed under
3016 * the terms of the GNU General Public License version 2. This program
3017 @@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
3018
3019 */
3020
3021 +/dts-v1/;
3022 +
3023 / {
3024 model = "KuroboxHD";
3025 compatible = "linkstation";
3026 @@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
3027
3028 PowerPC,603e { /* Really 8241 */
3029 device_type = "cpu";
3030 - reg = <0>;
3031 - clock-frequency = <bebc200>; /* Fixed by bootloader */
3032 - timebase-frequency = <1743000>; /* Fixed by bootloader */
3033 + reg = <0x0>;
3034 + clock-frequency = <200000000>; /* Fixed by bootloader */
3035 + timebase-frequency = <24391680>; /* Fixed by bootloader */
3036 bus-frequency = <0>; /* Fixed by bootloader */
3037 /* Following required by dtc but not used */
3038 - i-cache-size = <4000>;
3039 - d-cache-size = <4000>;
3040 + i-cache-size = <0x4000>;
3041 + d-cache-size = <0x4000>;
3042 };
3043 };
3044
3045 memory {
3046 device_type = "memory";
3047 - reg = <00000000 04000000>;
3048 + reg = <0x0 0x4000000>;
3049 };
3050
3051 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
3052 @@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
3053 device_type = "soc";
3054 compatible = "mpc10x";
3055 store-gathering = <0>; /* 0 == off, !0 == on */
3056 - reg = <80000000 00100000>;
3057 - ranges = <80000000 80000000 70000000 /* pci mem space */
3058 - fc000000 fc000000 00100000 /* EUMB */
3059 - fe000000 fe000000 00c00000 /* pci i/o space */
3060 - fec00000 fec00000 00300000 /* pci cfg regs */
3061 - fef00000 fef00000 00100000>; /* pci iack */
3062 + reg = <0x80000000 0x100000>;
3063 + ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
3064 + 0xfc000000 0xfc000000 0x100000 /* EUMB */
3065 + 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
3066 + 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
3067 + 0xfef00000 0xfef00000 0x100000>; /* pci iack */
3068
3069 i2c@80003000 {
3070 #address-cells = <1>;
3071 #size-cells = <0>;
3072 cell-index = <0>;
3073 compatible = "fsl-i2c";
3074 - reg = <80003000 1000>;
3075 + reg = <0x80003000 0x1000>;
3076 interrupts = <5 2>;
3077 interrupt-parent = <&mpic>;
3078
3079 rtc@32 {
3080 device_type = "rtc";
3081 compatible = "ricoh,rs5c372a";
3082 - reg = <32>;
3083 + reg = <0x32>;
3084 };
3085 };
3086
3087 @@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
3088 cell-index = <0>;
3089 device_type = "serial";
3090 compatible = "ns16550";
3091 - reg = <80004500 8>;
3092 - clock-frequency = <5d08d88>;
3093 - current-speed = <2580>;
3094 + reg = <0x80004500 0x8>;
3095 + clock-frequency = <97553800>;
3096 + current-speed = <9600>;
3097 interrupts = <9 0>;
3098 interrupt-parent = <&mpic>;
3099 };
3100 @@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
3101 cell-index = <1>;
3102 device_type = "serial";
3103 compatible = "ns16550";
3104 - reg = <80004600 8>;
3105 - clock-frequency = <5d08d88>;
3106 - current-speed = <e100>;
3107 - interrupts = <a 0>;
3108 + reg = <0x80004600 0x8>;
3109 + clock-frequency = <97553800>;
3110 + current-speed = <57600>;
3111 + interrupts = <10 0>;
3112 interrupt-parent = <&mpic>;
3113 };
3114
3115 @@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
3116 device_type = "open-pic";
3117 compatible = "chrp,open-pic";
3118 interrupt-controller;
3119 - reg = <80040000 40000>;
3120 + reg = <0x80040000 0x40000>;
3121 };
3122
3123 pci0: pci@fec00000 {
3124 @@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
3125 #interrupt-cells = <1>;
3126 device_type = "pci";
3127 compatible = "mpc10x-pci";
3128 - reg = <fec00000 400000>;
3129 - ranges = <01000000 0 0 fe000000 0 00c00000
3130 - 02000000 0 80000000 80000000 0 70000000>;
3131 - bus-range = <0 ff>;
3132 - clock-frequency = <7f28155>;
3133 + reg = <0xfec00000 0x400000>;
3134 + ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
3135 + 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
3136 + bus-range = <0 255>;
3137 + clock-frequency = <133333333>;
3138 interrupt-parent = <&mpic>;
3139 - interrupt-map-mask = <f800 0 0 7>;
3140 + interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
3141 interrupt-map = <
3142 /* IDSEL 11 - IRQ0 ETH */
3143 - 5800 0 0 1 &mpic 0 1
3144 - 5800 0 0 2 &mpic 1 1
3145 - 5800 0 0 3 &mpic 2 1
3146 - 5800 0 0 4 &mpic 3 1
3147 + 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
3148 + 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
3149 + 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
3150 + 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
3151 /* IDSEL 12 - IRQ1 IDE0 */
3152 - 6000 0 0 1 &mpic 1 1
3153 - 6000 0 0 2 &mpic 2 1
3154 - 6000 0 0 3 &mpic 3 1
3155 - 6000 0 0 4 &mpic 0 1
3156 + 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
3157 + 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
3158 + 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
3159 + 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
3160 /* IDSEL 14 - IRQ3 USB2.0 */
3161 - 7000 0 0 1 &mpic 3 1
3162 - 7000 0 0 2 &mpic 3 1
3163 - 7000 0 0 3 &mpic 3 1
3164 - 7000 0 0 4 &mpic 3 1
3165 + 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
3166 + 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
3167 + 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
3168 + 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
3169 >;
3170 };
3171 };
3172 --- a/arch/powerpc/boot/dts/kuroboxHG.dts
3173 +++ b/arch/powerpc/boot/dts/kuroboxHG.dts
3174 @@ -7,6 +7,7 @@
3175 * Based on sandpoint.dts
3176 *
3177 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
3178 + * Copyright 2008 Freescale Semiconductor, Inc.
3179 *
3180 * This file is licensed under
3181 * the terms of the GNU General Public License version 2. This program
3182 @@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
3183
3184 */
3185
3186 +/dts-v1/;
3187 +
3188 / {
3189 model = "KuroboxHG";
3190 compatible = "linkstation";
3191 @@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
3192
3193 PowerPC,603e { /* Really 8241 */
3194 device_type = "cpu";
3195 - reg = <0>;
3196 - clock-frequency = <fdad680>; /* Fixed by bootloader */
3197 - timebase-frequency = <1F04000>; /* Fixed by bootloader */
3198 + reg = <0x0>;
3199 + clock-frequency = <266000000>; /* Fixed by bootloader */
3200 + timebase-frequency = <32522240>; /* Fixed by bootloader */
3201 bus-frequency = <0>; /* Fixed by bootloader */
3202 /* Following required by dtc but not used */
3203 - i-cache-size = <4000>;
3204 - d-cache-size = <4000>;
3205 + i-cache-size = <0x4000>;
3206 + d-cache-size = <0x4000>;
3207 };
3208 };
3209
3210 memory {
3211 device_type = "memory";
3212 - reg = <00000000 08000000>;
3213 + reg = <0x0 0x8000000>;
3214 };
3215
3216 soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
3217 @@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
3218 device_type = "soc";
3219 compatible = "mpc10x";
3220 store-gathering = <0>; /* 0 == off, !0 == on */
3221 - reg = <80000000 00100000>;
3222 - ranges = <80000000 80000000 70000000 /* pci mem space */
3223 - fc000000 fc000000 00100000 /* EUMB */
3224 - fe000000 fe000000 00c00000 /* pci i/o space */
3225 - fec00000 fec00000 00300000 /* pci cfg regs */
3226 - fef00000 fef00000 00100000>; /* pci iack */
3227 + reg = <0x80000000 0x100000>;
3228 + ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
3229 + 0xfc000000 0xfc000000 0x100000 /* EUMB */
3230 + 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
3231 + 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
3232 + 0xfef00000 0xfef00000 0x100000>; /* pci iack */
3233
3234 i2c@80003000 {
3235 #address-cells = <1>;
3236 #size-cells = <0>;
3237 cell-index = <0>;
3238 compatible = "fsl-i2c";
3239 - reg = <80003000 1000>;
3240 + reg = <0x80003000 0x1000>;
3241 interrupts = <5 2>;
3242 interrupt-parent = <&mpic>;
3243
3244 rtc@32 {
3245 device_type = "rtc";
3246 compatible = "ricoh,rs5c372a";
3247 - reg = <32>;
3248 + reg = <0x32>;
3249 };
3250 };
3251
3252 @@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
3253 cell-index = <0>;
3254 device_type = "serial";
3255 compatible = "ns16550";
3256 - reg = <80004500 8>;
3257 - clock-frequency = <7c044a8>;
3258 - current-speed = <2580>;
3259 + reg = <0x80004500 0x8>;
3260 + clock-frequency = <130041000>;
3261 + current-speed = <9600>;
3262 interrupts = <9 0>;
3263 interrupt-parent = <&mpic>;
3264 };
3265 @@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
3266 cell-index = <1>;
3267 device_type = "serial";
3268 compatible = "ns16550";
3269 - reg = <80004600 8>;
3270 - clock-frequency = <7c044a8>;
3271 - current-speed = <e100>;
3272 - interrupts = <a 0>;
3273 + reg = <0x80004600 0x8>;
3274 + clock-frequency = <130041000>;
3275 + current-speed = <57600>;
3276 + interrupts = <10 0>;
3277 interrupt-parent = <&mpic>;
3278 };
3279
3280 @@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
3281 device_type = "open-pic";
3282 compatible = "chrp,open-pic";
3283 interrupt-controller;
3284 - reg = <80040000 40000>;
3285 + reg = <0x80040000 0x40000>;
3286 };
3287
3288 pci0: pci@fec00000 {
3289 @@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
3290 #interrupt-cells = <1>;
3291 device_type = "pci";
3292 compatible = "mpc10x-pci";
3293 - reg = <fec00000 400000>;
3294 - ranges = <01000000 0 0 fe000000 0 00c00000
3295 - 02000000 0 80000000 80000000 0 70000000>;
3296 - bus-range = <0 ff>;
3297 - clock-frequency = <7f28155>;
3298 + reg = <0xfec00000 0x400000>;
3299 + ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
3300 + 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
3301 + bus-range = <0 255>;
3302 + clock-frequency = <133333333>;
3303 interrupt-parent = <&mpic>;
3304 - interrupt-map-mask = <f800 0 0 7>;
3305 + interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
3306 interrupt-map = <
3307 /* IDSEL 11 - IRQ0 ETH */
3308 - 5800 0 0 1 &mpic 0 1
3309 - 5800 0 0 2 &mpic 1 1
3310 - 5800 0 0 3 &mpic 2 1
3311 - 5800 0 0 4 &mpic 3 1
3312 + 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
3313 + 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
3314 + 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
3315 + 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
3316 /* IDSEL 12 - IRQ1 IDE0 */
3317 - 6000 0 0 1 &mpic 1 1
3318 - 6000 0 0 2 &mpic 2 1
3319 - 6000 0 0 3 &mpic 3 1
3320 - 6000 0 0 4 &mpic 0 1
3321 + 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
3322 + 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
3323 + 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
3324 + 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
3325 /* IDSEL 14 - IRQ3 USB2.0 */
3326 - 7000 0 0 1 &mpic 3 1
3327 - 7000 0 0 2 &mpic 3 1
3328 - 7000 0 0 3 &mpic 3 1
3329 - 7000 0 0 4 &mpic 3 1
3330 + 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
3331 + 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
3332 + 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
3333 + 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
3334 >;
3335 };
3336 };
3337 --- a/arch/powerpc/boot/dts/makalu.dts
3338 +++ b/arch/powerpc/boot/dts/makalu.dts
3339 @@ -219,7 +219,7 @@
3340 mal-tx-channel = <0>;
3341 mal-rx-channel = <0>;
3342 cell-index = <0>;
3343 - max-frame-size = <5dc>;
3344 + max-frame-size = <2328>;
3345 rx-fifo-size = <1000>;
3346 tx-fifo-size = <800>;
3347 phy-mode = "rgmii";
3348 @@ -247,7 +247,7 @@
3349 mal-tx-channel = <1>;
3350 mal-rx-channel = <1>;
3351 cell-index = <1>;
3352 - max-frame-size = <5dc>;
3353 + max-frame-size = <2328>;
3354 rx-fifo-size = <1000>;
3355 tx-fifo-size = <800>;
3356 phy-mode = "rgmii";