target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv;
  40
  41 struct ar8xxx_chip {
  42         int (*hw_init)(struct ar8216_priv *priv);
  43 };
  44
  45 struct ar8216_priv {
  46         struct switch_dev dev;
  47         struct phy_device *phy;
  48         u32 (*read)(struct ar8216_priv *priv, int reg);
  49         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  50         const struct net_device_ops *ndo_old;
  51         struct net_device_ops ndo;
  52         struct mutex reg_mutex;
  53         int chip_type;
  54         const struct ar8xxx_chip *chip;
  55         bool initialized;
  56         bool port4_phy;
  57         char buf[80];
  58
  59         bool init;
  60
  61         /* all fields below are cleared on reset */
  62         bool vlan;
  63         u16 vlan_id[AR8X16_MAX_VLANS];
  64         u8 vlan_table[AR8X16_MAX_VLANS];
  65         u8 vlan_tagged;
  66         u16 pvid[AR8216_NUM_PORTS];
  67 };
  68
  69 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  70
  71 static inline void
  72 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  73 {
  74         regaddr >>= 1;
  75         *r1 = regaddr & 0x1e;
  76
  77         regaddr >>= 5;
  78         *r2 = regaddr & 0x7;
  79
  80         regaddr >>= 3;
  81         *page = regaddr & 0x1ff;
  82 }
  83
  84 static u32
  85 ar8216_mii_read(struct ar8216_priv *priv, int reg)
  86 {
  87         struct phy_device *phy = priv->phy;
  88         struct mii_bus *bus = phy->bus;
  89         u16 r1, r2, page;
  90         u16 lo, hi;
  91
  92         split_addr((u32) reg, &r1, &r2, &page);
  93
  94         mutex_lock(&bus->mdio_lock);
  95
  96         bus->write(bus, 0x18, 0, page);
  97         usleep_range(1000, 2000); /* wait for the page switch to propagate */
  98         lo = bus->read(bus, 0x10 | r2, r1);
  99         hi = bus->read(bus, 0x10 | r2, r1 + 1);
 100
 101         mutex_unlock(&bus->mdio_lock);
 102
 103         return (hi << 16) | lo;
 104 }
 105
 106 static void
 107 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 108 {
 109         struct phy_device *phy = priv->phy;
 110         struct mii_bus *bus = phy->bus;
 111         u16 r1, r2, r3;
 112         u16 lo, hi;
 113
 114         split_addr((u32) reg, &r1, &r2, &r3);
 115         lo = val & 0xffff;
 116         hi = (u16) (val >> 16);
 117
 118         mutex_lock(&bus->mdio_lock);
 119
 120         bus->write(bus, 0x18, 0, r3);
 121         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 122         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 123         bus->write(bus, 0x10 | r2, r1, lo);
 124
 125         mutex_unlock(&bus->mdio_lock);
 126 }
 127
 128 static void
 129 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 130                      u16 dbg_addr, u16 dbg_data)
 131 {
 132         struct mii_bus *bus = priv->phy->bus;
 133
 134         mutex_lock(&bus->mdio_lock);
 135         bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
 136         bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
 137         mutex_unlock(&bus->mdio_lock);
 138 }
 139
 140 static u32
 141 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 142 {
 143         u32 v;
 144
 145         lockdep_assert_held(&priv->reg_mutex);
 146
 147         v = priv->read(priv, reg);
 148         v &= ~mask;
 149         v |= val;
 150         priv->write(priv, reg, v);
 151
 152         return v;
 153 }
 154
 155 static void
 156 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 157                       struct switch_port_link *link)
 158 {
 159         u32 status;
 160         u32 speed;
 161
 162         memset(link, '\0', sizeof(*link));
 163
 164         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 165
 166         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 167         if (link->aneg) {
 168                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 169                 if (!link->link)
 170                         return;
 171         } else {
 172                 link->link = true;
 173         }
 174
 175         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 176         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 177         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 178
 179         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 180                  AR8216_PORT_STATUS_SPEED_S;
 181
 182         switch (speed) {
 183         case AR8216_PORT_SPEED_10M:
 184                 link->speed = SWITCH_PORT_SPEED_10;
 185                 break;
 186         case AR8216_PORT_SPEED_100M:
 187                 link->speed = SWITCH_PORT_SPEED_100;
 188                 break;
 189         case AR8216_PORT_SPEED_1000M:
 190                 link->speed = SWITCH_PORT_SPEED_1000;
 191                 break;
 192         default:
 193                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 194                 break;
 195         }
 196 }
 197
 198 static int
 199 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 200                 struct switch_val *val)
 201 {
 202         struct ar8216_priv *priv = to_ar8216(dev);
 203         priv->vlan = !!val->value.i;
 204         return 0;
 205 }
 206
 207 static int
 208 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 209                 struct switch_val *val)
 210 {
 211         struct ar8216_priv *priv = to_ar8216(dev);
 212         val->value.i = priv->vlan;
 213         return 0;
 214 }
 215
 216
 217 static int
 218 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 219 {
 220         struct ar8216_priv *priv = to_ar8216(dev);
 221
 222         /* make sure no invalid PVIDs get set */
 223
 224         if (vlan >= dev->vlans)
 225                 return -EINVAL;
 226
 227         priv->pvid[port] = vlan;
 228         return 0;
 229 }
 230
 231 static int
 232 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 233 {
 234         struct ar8216_priv *priv = to_ar8216(dev);
 235         *vlan = priv->pvid[port];
 236         return 0;
 237 }
 238
 239 static int
 240 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 241                struct switch_val *val)
 242 {
 243         struct ar8216_priv *priv = to_ar8216(dev);
 244         priv->vlan_id[val->port_vlan] = val->value.i;
 245         return 0;
 246 }
 247
 248 static int
 249 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 250                struct switch_val *val)
 251 {
 252         struct ar8216_priv *priv = to_ar8216(dev);
 253         val->value.i = priv->vlan_id[val->port_vlan];
 254         return 0;
 255 }
 256
 257 static int
 258 ar8216_get_port_link(struct switch_dev *dev, int port,
 259                      struct switch_port_link *link)
 260 {
 261         struct ar8216_priv *priv = to_ar8216(dev);
 262
 263         ar8216_read_port_link(priv, port, link);
 264         return 0;
 265 }
 266
 267 static int
 268 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 269 {
 270         struct ar8216_priv *priv = dev->phy_ptr;
 271         unsigned char *buf;
 272
 273         if (unlikely(!priv))
 274                 goto error;
 275
 276         if (!priv->vlan)
 277                 goto send;
 278
 279         if (unlikely(skb_headroom(skb) < 2)) {
 280                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 281                         goto error;
 282         }
 283
 284         buf = skb_push(skb, 2);
 285         buf[0] = 0x10;
 286         buf[1] = 0x80;
 287
 288 send:
 289         return priv->ndo_old->ndo_start_xmit(skb, dev);
 290
 291 error:
 292         dev_kfree_skb_any(skb);
 293         return 0;
 294 }
 295
 296 static int
 297 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 298 {
 299         struct ar8216_priv *priv;
 300         struct net_device *dev;
 301         unsigned char *buf;
 302         int port, vlan;
 303
 304         dev = skb->dev;
 305         if (!dev)
 306                 goto error;
 307
 308         priv = dev->phy_ptr;
 309         if (!priv)
 310                 goto error;
 311
 312         /* don't strip the header if vlan mode is disabled */
 313         if (!priv->vlan)
 314                 goto recv;
 315
 316         /* strip header, get vlan id */
 317         buf = skb->data;
 318         skb_pull(skb, 2);
 319
 320         /* check for vlan header presence */
 321         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 322                 goto recv;
 323
 324         port = buf[0] & 0xf;
 325
 326         /* no need to fix up packets coming from a tagged source */
 327         if (priv->vlan_tagged & (1 << port))
 328                 goto recv;
 329
 330         /* lookup port vid from local table, the switch passes an invalid vlan id */
 331         vlan = priv->vlan_id[priv->pvid[port]];
 332
 333         buf[14 + 2] &= 0xf0;
 334         buf[14 + 2] |= vlan >> 8;
 335         buf[15 + 2] = vlan & 0xff;
 336
 337 recv:
 338         skb->protocol = eth_type_trans(skb, skb->dev);
 339
 340         if (napi)
 341                 return netif_receive_skb(skb);
 342         else
 343                 return netif_rx(skb);
 344
 345 error:
 346         /* no vlan? eat the packet! */
 347         dev_kfree_skb_any(skb);
 348         return NET_RX_DROP;
 349 }
 350
 351 static int
 352 ar8216_netif_rx(struct sk_buff *skb)
 353 {
 354         return ar8216_mangle_rx(skb, 0);
 355 }
 356
 357 static int
 358 ar8216_netif_receive_skb(struct sk_buff *skb)
 359 {
 360         return ar8216_mangle_rx(skb, 1);
 361 }
 362
 363
 364 static struct switch_attr ar8216_globals[] = {
 365         {
 366                 .type = SWITCH_TYPE_INT,
 367                 .name = "enable_vlan",
 368                 .description = "Enable VLAN mode",
 369                 .set = ar8216_set_vlan,
 370                 .get = ar8216_get_vlan,
 371                 .max = 1
 372         },
 373 };
 374
 375 static struct switch_attr ar8216_port[] = {
 376 };
 377
 378 static struct switch_attr ar8216_vlan[] = {
 379         {
 380                 .type = SWITCH_TYPE_INT,
 381                 .name = "vid",
 382                 .description = "VLAN ID (0-4094)",
 383                 .set = ar8216_set_vid,
 384                 .get = ar8216_get_vid,
 385                 .max = 4094,
 386         },
 387 };
 388
 389
 390 static int
 391 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 392 {
 393         struct ar8216_priv *priv = to_ar8216(dev);
 394         u8 ports = priv->vlan_table[val->port_vlan];
 395         int i;
 396
 397         val->len = 0;
 398         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 399                 struct switch_port *p;
 400
 401                 if (!(ports & (1 << i)))
 402                         continue;
 403
 404                 p = &val->value.ports[val->len++];
 405                 p->id = i;
 406                 if (priv->vlan_tagged & (1 << i))
 407                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 408                 else
 409                         p->flags = 0;
 410         }
 411         return 0;
 412 }
 413
 414 static int
 415 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 416 {
 417         struct ar8216_priv *priv = to_ar8216(dev);
 418         u8 *vt = &priv->vlan_table[val->port_vlan];
 419         int i, j;
 420
 421         *vt = 0;
 422         for (i = 0; i < val->len; i++) {
 423                 struct switch_port *p = &val->value.ports[i];
 424
 425                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 426                         priv->vlan_tagged |= (1 << p->id);
 427                 } else {
 428                         priv->vlan_tagged &= ~(1 << p->id);
 429                         priv->pvid[p->id] = val->port_vlan;
 430
 431                         /* make sure that an untagged port does not
 432                          * appear in other vlans */
 433                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 434                                 if (j == val->port_vlan)
 435                                         continue;
 436                                 priv->vlan_table[j] &= ~(1 << p->id);
 437                         }
 438                 }
 439
 440                 *vt |= 1 << p->id;
 441         }
 442         return 0;
 443 }
 444
 445 static int
 446 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 447 {
 448         int timeout = 20;
 449         u32 t = 0;
 450
 451         while (1) {
 452                 t = priv->read(priv, reg);
 453                 if ((t & mask) == val)
 454                         return 0;
 455
 456                 if (timeout-- <= 0)
 457                         break;
 458
 459                 udelay(10);
 460         }
 461
 462         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 463                (unsigned int) reg, t, mask, val);
 464         return -ETIMEDOUT;
 465 }
 466
 467 static void
 468 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 469 {
 470         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 471                 return;
 472         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 473                 val &= AR8216_VTUDATA_MEMBER;
 474                 val |= AR8216_VTUDATA_VALID;
 475                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 476         }
 477         op |= AR8216_VTU_ACTIVE;
 478         priv->write(priv, AR8216_REG_VTU, op);
 479 }
 480
 481 static void
 482 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 483                   u32 members, u32 pvid)
 484 {
 485         u32 header;
 486
 487         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
 488                 header = AR8216_PORT_CTRL_HEADER;
 489         else
 490                 header = 0;
 491
 492         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 493                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 494                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 495                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 496                    AR8216_PORT_CTRL_LEARN | header |
 497                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 498                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 499
 500         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 501                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 502                    AR8216_PORT_VLAN_DEFAULT_ID,
 503                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 504                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 505                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 506 }
 507
 508 static void
 509 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 510                   u32 members, u32 pvid)
 511 {
 512         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 513                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 514                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 515                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 516                    AR8216_PORT_CTRL_LEARN |
 517                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 518                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 519
 520         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 521                    AR8236_PORT_VLAN_DEFAULT_ID,
 522                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 523
 524         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 525                    AR8236_PORT_VLAN2_VLAN_MODE |
 526                    AR8236_PORT_VLAN2_MEMBER,
 527                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 528                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 529 }
 530
 531 static int
 532 ar8216_hw_apply(struct switch_dev *dev)
 533 {
 534         struct ar8216_priv *priv = to_ar8216(dev);
 535         u8 portmask[AR8216_NUM_PORTS];
 536         int i, j;
 537
 538         mutex_lock(&priv->reg_mutex);
 539         /* flush all vlan translation unit entries */
 540         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 541
 542         memset(portmask, 0, sizeof(portmask));
 543         if (!priv->init) {
 544                 /* calculate the port destination masks and load vlans
 545                  * into the vlan translation unit */
 546                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 547                         u8 vp = priv->vlan_table[j];
 548
 549                         if (!vp)
 550                                 continue;
 551
 552                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 553                                 u8 mask = (1 << i);
 554                                 if (vp & mask)
 555                                         portmask[i] |= vp & ~mask;
 556                         }
 557
 558                         ar8216_vtu_op(priv,
 559                                 AR8216_VTU_OP_LOAD |
 560                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
 561                                 priv->vlan_table[j]);
 562                 }
 563         } else {
 564                 /* vlan disabled:
 565                  * isolate all ports, but connect them to the cpu port */
 566                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 567                         if (i == AR8216_PORT_CPU)
 568                                 continue;
 569
 570                         portmask[i] = 1 << AR8216_PORT_CPU;
 571                         portmask[AR8216_PORT_CPU] |= (1 << i);
 572                 }
 573         }
 574
 575         /* update the port destination mask registers and tag settings */
 576         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 577                 int egress, ingress;
 578                 int pvid;
 579
 580                 if (priv->vlan) {
 581                         pvid = priv->vlan_id[priv->pvid[i]];
 582                         if (priv->vlan_tagged & (1 << i))
 583                                 egress = AR8216_OUT_ADD_VLAN;
 584                         else
 585                                 egress = AR8216_OUT_STRIP_VLAN;
 586                         ingress = AR8216_IN_SECURE;
 587                 } else {
 588                         pvid = i;
 589                         egress = AR8216_OUT_KEEP;
 590                         ingress = AR8216_IN_PORT_ONLY;
 591                 }
 592
 593                 if (priv->chip_type == AR8236)
 594                         ar8236_setup_port(priv, i, egress, ingress, portmask[i],
 595                                           pvid);
 596                 else
 597                         ar8216_setup_port(priv, i, egress, ingress, portmask[i],
 598                                           pvid);
 599         }
 600         mutex_unlock(&priv->reg_mutex);
 601         return 0;
 602 }
 603
 604 static int
 605 ar8216_hw_init(struct ar8216_priv *priv)
 606 {
 607         return 0;
 608 }
 609
 610 static int
 611 ar8236_hw_init(struct ar8216_priv *priv)
 612 {
 613         int i;
 614         struct mii_bus *bus;
 615
 616         if (priv->initialized)
 617                 return 0;
 618
 619         /* Initialize the PHYs */
 620         bus = priv->phy->bus;
 621         for (i = 0; i < 5; i++) {
 622                 mdiobus_write(bus, i, MII_ADVERTISE,
 623                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 624                               ADVERTISE_PAUSE_ASYM);
 625                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 626         }
 627         msleep(1000);
 628
 629         priv->initialized = true;
 630         return 0;
 631 }
 632
 633 static int
 634 ar8316_hw_init(struct ar8216_priv *priv)
 635 {
 636         int i;
 637         u32 val, newval;
 638         struct mii_bus *bus;
 639
 640         val = priv->read(priv, 0x8);
 641
 642         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 643                 if (priv->port4_phy) {
 644                         /* value taken from Ubiquiti RouterStation Pro */
 645                         newval = 0x81461bea;
 646                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 647                 } else {
 648                         newval = 0x01261be2;
 649                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 650                 }
 651         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 652                 /* value taken from AVM Fritz!Box 7390 sources */
 653                 newval = 0x010e5b71;
 654         } else {
 655                 /* no known value for phy interface */
 656                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 657                         priv->phy->interface);
 658                 return -EINVAL;
 659         }
 660
 661         if (val == newval)
 662                 goto out;
 663
 664         priv->write(priv, 0x8, newval);
 665
 666         /* Initialize the ports */
 667         bus = priv->phy->bus;
 668         for (i = 0; i < 5; i++) {
 669                 if ((i == 4) && priv->port4_phy &&
 670                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 671                         /* work around for phy4 rgmii mode */
 672                         ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
 673                         /* rx delay */
 674                         ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
 675                         /* tx delay */
 676                         ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
 677                         msleep(1000);
 678                 }
 679
 680                 /* initialize the port itself */
 681                 mdiobus_write(bus, i, MII_ADVERTISE,
 682                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 683                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 684                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 685                 msleep(1000);
 686         }
 687
 688 out:
 689         priv->initialized = true;
 690         return 0;
 691 }
 692
 693 static void
 694 ar8216_init_globals(struct ar8216_priv *priv)
 695 {
 696         switch (priv->chip_type) {
 697         case AR8216:
 698                 /* standard atheros magic */
 699                 priv->write(priv, 0x38, 0xc000050e);
 700
 701                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 702                            AR8216_GCTRL_MTU, 1518 + 8 + 2);
 703                 break;
 704         case AR8316:
 705                 /* standard atheros magic */
 706                 priv->write(priv, 0x38, 0xc000050e);
 707
 708                 /* enable cpu port to receive multicast and broadcast frames */
 709                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 710
 711                 /* fall through */
 712         case AR8236:
 713                 /* enable jumbo frames */
 714                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 715                            AR8316_GCTRL_MTU, 9018 + 8 + 2);
 716                 break;
 717         }
 718 }
 719
 720 static void
 721 ar8216_init_port(struct ar8216_priv *priv, int port)
 722 {
 723         /* Enable port learning and tx */
 724         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 725                 AR8216_PORT_CTRL_LEARN |
 726                 (4 << AR8216_PORT_CTRL_STATE_S));
 727
 728         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 729
 730         if (port == AR8216_PORT_CPU) {
 731                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 732                         AR8216_PORT_STATUS_LINK_UP |
 733                         ((priv->chip_type == AR8316) ?
 734                                 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
 735                         AR8216_PORT_STATUS_TXMAC |
 736                         AR8216_PORT_STATUS_RXMAC |
 737                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 738                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 739                         AR8216_PORT_STATUS_DUPLEX);
 740         } else {
 741                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 742                         AR8216_PORT_STATUS_LINK_AUTO);
 743         }
 744 }
 745
 746 static const struct ar8xxx_chip ar8216_chip = {
 747         .hw_init = ar8216_hw_init,
 748 };
 749
 750 static const struct ar8xxx_chip ar8236_chip = {
 751         .hw_init = ar8236_hw_init,
 752 };
 753
 754 static const struct ar8xxx_chip ar8316_chip = {
 755         .hw_init = ar8316_hw_init,
 756 };
 757
 758 static int
 759 ar8216_reset_switch(struct switch_dev *dev)
 760 {
 761         struct ar8216_priv *priv = to_ar8216(dev);
 762         int i;
 763
 764         mutex_lock(&priv->reg_mutex);
 765         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 766                 offsetof(struct ar8216_priv, vlan));
 767
 768         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 769                 priv->vlan_id[i] = i;
 770
 771         /* Configure all ports */
 772         for (i = 0; i < AR8216_NUM_PORTS; i++)
 773                 ar8216_init_port(priv, i);
 774
 775         ar8216_init_globals(priv);
 776         mutex_unlock(&priv->reg_mutex);
 777
 778         return ar8216_hw_apply(dev);
 779 }
 780
 781 static const struct switch_dev_ops ar8216_sw_ops = {
 782         .attr_global = {
 783                 .attr = ar8216_globals,
 784                 .n_attr = ARRAY_SIZE(ar8216_globals),
 785         },
 786         .attr_port = {
 787                 .attr = ar8216_port,
 788                 .n_attr = ARRAY_SIZE(ar8216_port),
 789         },
 790         .attr_vlan = {
 791                 .attr = ar8216_vlan,
 792                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 793         },
 794         .get_port_pvid = ar8216_get_pvid,
 795         .set_port_pvid = ar8216_set_pvid,
 796         .get_vlan_ports = ar8216_get_ports,
 797         .set_vlan_ports = ar8216_set_ports,
 798         .apply_config = ar8216_hw_apply,
 799         .reset_switch = ar8216_reset_switch,
 800         .get_port_link = ar8216_get_port_link,
 801 };
 802
 803 static int
 804 ar8216_id_chip(struct ar8216_priv *priv)
 805 {
 806         u32 val;
 807         u16 id;
 808         int i;
 809
 810         priv->chip_type = UNKNOWN;
 811
 812         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 813         if (val == ~0)
 814                 return -ENODEV;
 815
 816         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 817         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 818                 u16 t;
 819
 820                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 821                 if (val == ~0)
 822                         return -ENODEV;
 823
 824                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 825                 if (t != id)
 826                         return -ENODEV;
 827         }
 828
 829         switch (id) {
 830         case 0x0101:
 831                 priv->chip_type = AR8216;
 832                 priv->chip = &ar8216_chip;
 833                 break;
 834         case 0x0301:
 835                 priv->chip_type = AR8236;
 836                 priv->chip = &ar8236_chip;
 837                 break;
 838         case 0x1000:
 839         case 0x1001:
 840                 priv->chip_type = AR8316;
 841                 priv->chip = &ar8316_chip;
 842                 break;
 843         default:
 844                 printk(KERN_DEBUG
 845                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 846                         (int)(id >> AR8216_CTRL_VERSION_S),
 847                         (int)(id & AR8216_CTRL_REVISION),
 848                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 849                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 850
 851                 return -ENODEV;
 852         }
 853
 854         return 0;
 855 }
 856
 857 static int
 858 ar8216_config_init(struct phy_device *pdev)
 859 {
 860         struct ar8216_priv *priv = pdev->priv;
 861         struct net_device *dev = pdev->attached_dev;
 862         struct switch_dev *swdev;
 863         int ret;
 864
 865         if (!priv) {
 866                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 867                 if (priv == NULL)
 868                         return -ENOMEM;
 869         }
 870
 871         priv->phy = pdev;
 872
 873         ret = ar8216_id_chip(priv);
 874         if (ret)
 875                 goto err_free_priv;
 876
 877         if (pdev->addr != 0) {
 878                 if (priv->chip_type == AR8316) {
 879                         pdev->supported |= SUPPORTED_1000baseT_Full;
 880                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 881
 882                         /* check if we're attaching to the switch twice */
 883                         pdev = pdev->bus->phy_map[0];
 884                         if (!pdev) {
 885                                 kfree(priv);
 886                                 return 0;
 887                         }
 888
 889                         /* switch device has not been initialized, reuse priv */
 890                         if (!pdev->priv) {
 891                                 priv->port4_phy = true;
 892                                 pdev->priv = priv;
 893                                 return 0;
 894                         }
 895
 896                         kfree(priv);
 897
 898                         /* switch device has been initialized, reinit */
 899                         priv = pdev->priv;
 900                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 901                         priv->initialized = false;
 902                         priv->port4_phy = true;
 903                         ar8316_hw_init(priv);
 904                         return 0;
 905                 }
 906
 907                 kfree(priv);
 908                 return 0;
 909         }
 910
 911         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 912                 pdev->attached_dev->name, priv->chip_type);
 913
 914         pdev->supported = priv->chip_type == AR8316 ?
 915                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
 916         pdev->advertising = pdev->supported;
 917
 918         mutex_init(&priv->reg_mutex);
 919         priv->read = ar8216_mii_read;
 920         priv->write = ar8216_mii_write;
 921
 922         pdev->priv = priv;
 923
 924         swdev = &priv->dev;
 925         swdev->cpu_port = AR8216_PORT_CPU;
 926         swdev->ops = &ar8216_sw_ops;
 927         swdev->ports = AR8216_NUM_PORTS;
 928
 929         if (priv->chip_type == AR8316) {
 930                 swdev->name = "Atheros AR8316";
 931                 swdev->vlans = AR8X16_MAX_VLANS;
 932
 933                 if (priv->port4_phy) {
 934                         /* port 5 connected to the other mac, therefore unusable */
 935                         swdev->ports = (AR8216_NUM_PORTS - 1);
 936                 }
 937         } else if (priv->chip_type == AR8236) {
 938                 swdev->name = "Atheros AR8236";
 939                 swdev->vlans = AR8216_NUM_VLANS;
 940                 swdev->ports = AR8216_NUM_PORTS;
 941         } else {
 942                 swdev->name = "Atheros AR8216";
 943                 swdev->vlans = AR8216_NUM_VLANS;
 944         }
 945
 946         ret = register_switch(&priv->dev, pdev->attached_dev);
 947         if (ret)
 948                 goto err_free_priv;
 949
 950         priv->init = true;
 951
 952         ret = priv->chip->hw_init(priv);
 953         if (ret)
 954                 goto err_free_priv;
 955
 956         ret = ar8216_reset_switch(&priv->dev);
 957         if (ret)
 958                 goto err_free_priv;
 959
 960         dev->phy_ptr = priv;
 961
 962         /* VID fixup only needed on ar8216 */
 963         if (pdev->addr == 0 && priv->chip_type == AR8216) {
 964                 pdev->pkt_align = 2;
 965                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
 966                 pdev->netif_rx = ar8216_netif_rx;
 967                 priv->ndo_old = dev->netdev_ops;
 968                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
 969                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
 970                 dev->netdev_ops = &priv->ndo;
 971         }
 972
 973         priv->init = false;
 974
 975         return 0;
 976
 977 err_free_priv:
 978         kfree(priv);
 979         return ret;
 980 }
 981
 982 static int
 983 ar8216_read_status(struct phy_device *phydev)
 984 {
 985         struct ar8216_priv *priv = phydev->priv;
 986         struct switch_port_link link;
 987         int ret;
 988
 989         if (phydev->addr != 0)
 990                 return genphy_read_status(phydev);
 991
 992         ar8216_read_port_link(priv, phydev->addr, &link);
 993         phydev->link = !!link.link;
 994         if (!phydev->link)
 995                 return 0;
 996
 997         switch (link.speed) {
 998         case SWITCH_PORT_SPEED_10:
 999                 phydev->speed = SPEED_10;
1000                 break;
1001         case SWITCH_PORT_SPEED_100:
1002                 phydev->speed = SPEED_100;
1003                 break;
1004         case SWITCH_PORT_SPEED_1000:
1005                 phydev->speed = SPEED_1000;
1006                 break;
1007         default:
1008                 phydev->speed = 0;
1009         }
1010         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1011
1012         /* flush the address translation unit */
1013         mutex_lock(&priv->reg_mutex);
1014         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1015         if (!ret)
1016                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1017         mutex_unlock(&priv->reg_mutex);
1018
1019         phydev->state = PHY_RUNNING;
1020         netif_carrier_on(phydev->attached_dev);
1021         phydev->adjust_link(phydev->attached_dev);
1022
1023         return ret;
1024 }
1025
1026 static int
1027 ar8216_config_aneg(struct phy_device *phydev)
1028 {
1029         if (phydev->addr == 0)
1030                 return 0;
1031
1032         return genphy_config_aneg(phydev);
1033 }
1034
1035 static int
1036 ar8216_probe(struct phy_device *pdev)
1037 {
1038         struct ar8216_priv priv;
1039
1040         priv.phy = pdev;
1041         return ar8216_id_chip(&priv);
1042 }
1043
1044 static void
1045 ar8216_remove(struct phy_device *pdev)
1046 {
1047         struct ar8216_priv *priv = pdev->priv;
1048         struct net_device *dev = pdev->attached_dev;
1049
1050         if (!priv)
1051                 return;
1052
1053         if (priv->ndo_old && dev)
1054                 dev->netdev_ops = priv->ndo_old;
1055         if (pdev->addr == 0)
1056                 unregister_switch(&priv->dev);
1057         kfree(priv);
1058 }
1059
1060 static struct phy_driver ar8216_driver = {
1061         .phy_id         = 0x004d0000,
1062         .name           = "Atheros AR8216/AR8236/AR8316",
1063         .phy_id_mask    = 0xffff0000,
1064         .features       = PHY_BASIC_FEATURES,
1065         .probe          = ar8216_probe,
1066         .remove         = ar8216_remove,
1067         .config_init    = &ar8216_config_init,
1068         .config_aneg    = &ar8216_config_aneg,
1069         .read_status    = &ar8216_read_status,
1070         .driver         = { .owner = THIS_MODULE },
1071 };
1072
1073 int __init
1074 ar8216_init(void)
1075 {
1076         return phy_driver_register(&ar8216_driver);
1077 }
1078
1079 void __exit
1080 ar8216_exit(void)
1081 {
1082         phy_driver_unregister(&ar8216_driver);
1083 }
1084
1085 module_init(ar8216_init);
1086 module_exit(ar8216_exit);
1087 MODULE_LICENSE("GPL");
1088