target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv;
  40
  41 #define AR8XXX_CAP_GIGE         BIT(0)
  42
  43 struct ar8xxx_chip {
  44         unsigned long caps;
  45
  46         int (*hw_init)(struct ar8216_priv *priv);
  47         void (*init_port)(struct ar8216_priv *priv, int port);
  48         void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
  49                            u32 ingress, u32 members, u32 pvid);
  50         int (*atu_flush)(struct ar8216_priv *priv);
  51         void (*vtu_flush)(struct ar8216_priv *priv);
  52         void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
  53 };
  54
  55 struct ar8216_priv {
  56         struct switch_dev dev;
  57         struct phy_device *phy;
  58         u32 (*read)(struct ar8216_priv *priv, int reg);
  59         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  60         const struct net_device_ops *ndo_old;
  61         struct net_device_ops ndo;
  62         struct mutex reg_mutex;
  63         int chip_type;
  64         const struct ar8xxx_chip *chip;
  65         bool initialized;
  66         bool port4_phy;
  67         char buf[80];
  68
  69         bool init;
  70
  71         /* all fields below are cleared on reset */
  72         bool vlan;
  73         u16 vlan_id[AR8X16_MAX_VLANS];
  74         u8 vlan_table[AR8X16_MAX_VLANS];
  75         u8 vlan_tagged;
  76         u16 pvid[AR8216_NUM_PORTS];
  77 };
  78
  79 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  80
  81 static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
  82 {
  83         return priv->chip->caps & AR8XXX_CAP_GIGE;
  84 }
  85
  86 static inline void
  87 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  88 {
  89         regaddr >>= 1;
  90         *r1 = regaddr & 0x1e;
  91
  92         regaddr >>= 5;
  93         *r2 = regaddr & 0x7;
  94
  95         regaddr >>= 3;
  96         *page = regaddr & 0x1ff;
  97 }
  98
  99 static u32
 100 ar8216_mii_read(struct ar8216_priv *priv, int reg)
 101 {
 102         struct phy_device *phy = priv->phy;
 103         struct mii_bus *bus = phy->bus;
 104         u16 r1, r2, page;
 105         u16 lo, hi;
 106
 107         split_addr((u32) reg, &r1, &r2, &page);
 108
 109         mutex_lock(&bus->mdio_lock);
 110
 111         bus->write(bus, 0x18, 0, page);
 112         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 113         lo = bus->read(bus, 0x10 | r2, r1);
 114         hi = bus->read(bus, 0x10 | r2, r1 + 1);
 115
 116         mutex_unlock(&bus->mdio_lock);
 117
 118         return (hi << 16) | lo;
 119 }
 120
 121 static void
 122 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 123 {
 124         struct phy_device *phy = priv->phy;
 125         struct mii_bus *bus = phy->bus;
 126         u16 r1, r2, r3;
 127         u16 lo, hi;
 128
 129         split_addr((u32) reg, &r1, &r2, &r3);
 130         lo = val & 0xffff;
 131         hi = (u16) (val >> 16);
 132
 133         mutex_lock(&bus->mdio_lock);
 134
 135         bus->write(bus, 0x18, 0, r3);
 136         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 137         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 138         bus->write(bus, 0x10 | r2, r1, lo);
 139
 140         mutex_unlock(&bus->mdio_lock);
 141 }
 142
 143 static void
 144 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 145                      u16 dbg_addr, u16 dbg_data)
 146 {
 147         struct mii_bus *bus = priv->phy->bus;
 148
 149         mutex_lock(&bus->mdio_lock);
 150         bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
 151         bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
 152         mutex_unlock(&bus->mdio_lock);
 153 }
 154
 155 static u32
 156 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 157 {
 158         u32 v;
 159
 160         lockdep_assert_held(&priv->reg_mutex);
 161
 162         v = priv->read(priv, reg);
 163         v &= ~mask;
 164         v |= val;
 165         priv->write(priv, reg, v);
 166
 167         return v;
 168 }
 169
 170 static void
 171 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 172                       struct switch_port_link *link)
 173 {
 174         u32 status;
 175         u32 speed;
 176
 177         memset(link, '\0', sizeof(*link));
 178
 179         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 180
 181         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 182         if (link->aneg) {
 183                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 184                 if (!link->link)
 185                         return;
 186         } else {
 187                 link->link = true;
 188         }
 189
 190         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 191         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 192         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 193
 194         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 195                  AR8216_PORT_STATUS_SPEED_S;
 196
 197         switch (speed) {
 198         case AR8216_PORT_SPEED_10M:
 199                 link->speed = SWITCH_PORT_SPEED_10;
 200                 break;
 201         case AR8216_PORT_SPEED_100M:
 202                 link->speed = SWITCH_PORT_SPEED_100;
 203                 break;
 204         case AR8216_PORT_SPEED_1000M:
 205                 link->speed = SWITCH_PORT_SPEED_1000;
 206                 break;
 207         default:
 208                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 209                 break;
 210         }
 211 }
 212
 213 static int
 214 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 215                 struct switch_val *val)
 216 {
 217         struct ar8216_priv *priv = to_ar8216(dev);
 218         priv->vlan = !!val->value.i;
 219         return 0;
 220 }
 221
 222 static int
 223 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 224                 struct switch_val *val)
 225 {
 226         struct ar8216_priv *priv = to_ar8216(dev);
 227         val->value.i = priv->vlan;
 228         return 0;
 229 }
 230
 231
 232 static int
 233 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 234 {
 235         struct ar8216_priv *priv = to_ar8216(dev);
 236
 237         /* make sure no invalid PVIDs get set */
 238
 239         if (vlan >= dev->vlans)
 240                 return -EINVAL;
 241
 242         priv->pvid[port] = vlan;
 243         return 0;
 244 }
 245
 246 static int
 247 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 248 {
 249         struct ar8216_priv *priv = to_ar8216(dev);
 250         *vlan = priv->pvid[port];
 251         return 0;
 252 }
 253
 254 static int
 255 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 256                struct switch_val *val)
 257 {
 258         struct ar8216_priv *priv = to_ar8216(dev);
 259         priv->vlan_id[val->port_vlan] = val->value.i;
 260         return 0;
 261 }
 262
 263 static int
 264 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 265                struct switch_val *val)
 266 {
 267         struct ar8216_priv *priv = to_ar8216(dev);
 268         val->value.i = priv->vlan_id[val->port_vlan];
 269         return 0;
 270 }
 271
 272 static int
 273 ar8216_get_port_link(struct switch_dev *dev, int port,
 274                      struct switch_port_link *link)
 275 {
 276         struct ar8216_priv *priv = to_ar8216(dev);
 277
 278         ar8216_read_port_link(priv, port, link);
 279         return 0;
 280 }
 281
 282 static int
 283 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 284 {
 285         struct ar8216_priv *priv = dev->phy_ptr;
 286         unsigned char *buf;
 287
 288         if (unlikely(!priv))
 289                 goto error;
 290
 291         if (!priv->vlan)
 292                 goto send;
 293
 294         if (unlikely(skb_headroom(skb) < 2)) {
 295                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 296                         goto error;
 297         }
 298
 299         buf = skb_push(skb, 2);
 300         buf[0] = 0x10;
 301         buf[1] = 0x80;
 302
 303 send:
 304         return priv->ndo_old->ndo_start_xmit(skb, dev);
 305
 306 error:
 307         dev_kfree_skb_any(skb);
 308         return 0;
 309 }
 310
 311 static int
 312 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 313 {
 314         struct ar8216_priv *priv;
 315         struct net_device *dev;
 316         unsigned char *buf;
 317         int port, vlan;
 318
 319         dev = skb->dev;
 320         if (!dev)
 321                 goto error;
 322
 323         priv = dev->phy_ptr;
 324         if (!priv)
 325                 goto error;
 326
 327         /* don't strip the header if vlan mode is disabled */
 328         if (!priv->vlan)
 329                 goto recv;
 330
 331         /* strip header, get vlan id */
 332         buf = skb->data;
 333         skb_pull(skb, 2);
 334
 335         /* check for vlan header presence */
 336         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 337                 goto recv;
 338
 339         port = buf[0] & 0xf;
 340
 341         /* no need to fix up packets coming from a tagged source */
 342         if (priv->vlan_tagged & (1 << port))
 343                 goto recv;
 344
 345         /* lookup port vid from local table, the switch passes an invalid vlan id */
 346         vlan = priv->vlan_id[priv->pvid[port]];
 347
 348         buf[14 + 2] &= 0xf0;
 349         buf[14 + 2] |= vlan >> 8;
 350         buf[15 + 2] = vlan & 0xff;
 351
 352 recv:
 353         skb->protocol = eth_type_trans(skb, skb->dev);
 354
 355         if (napi)
 356                 return netif_receive_skb(skb);
 357         else
 358                 return netif_rx(skb);
 359
 360 error:
 361         /* no vlan? eat the packet! */
 362         dev_kfree_skb_any(skb);
 363         return NET_RX_DROP;
 364 }
 365
 366 static int
 367 ar8216_netif_rx(struct sk_buff *skb)
 368 {
 369         return ar8216_mangle_rx(skb, 0);
 370 }
 371
 372 static int
 373 ar8216_netif_receive_skb(struct sk_buff *skb)
 374 {
 375         return ar8216_mangle_rx(skb, 1);
 376 }
 377
 378
 379 static struct switch_attr ar8216_globals[] = {
 380         {
 381                 .type = SWITCH_TYPE_INT,
 382                 .name = "enable_vlan",
 383                 .description = "Enable VLAN mode",
 384                 .set = ar8216_set_vlan,
 385                 .get = ar8216_get_vlan,
 386                 .max = 1
 387         },
 388 };
 389
 390 static struct switch_attr ar8216_port[] = {
 391 };
 392
 393 static struct switch_attr ar8216_vlan[] = {
 394         {
 395                 .type = SWITCH_TYPE_INT,
 396                 .name = "vid",
 397                 .description = "VLAN ID (0-4094)",
 398                 .set = ar8216_set_vid,
 399                 .get = ar8216_get_vid,
 400                 .max = 4094,
 401         },
 402 };
 403
 404
 405 static int
 406 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 407 {
 408         struct ar8216_priv *priv = to_ar8216(dev);
 409         u8 ports = priv->vlan_table[val->port_vlan];
 410         int i;
 411
 412         val->len = 0;
 413         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 414                 struct switch_port *p;
 415
 416                 if (!(ports & (1 << i)))
 417                         continue;
 418
 419                 p = &val->value.ports[val->len++];
 420                 p->id = i;
 421                 if (priv->vlan_tagged & (1 << i))
 422                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 423                 else
 424                         p->flags = 0;
 425         }
 426         return 0;
 427 }
 428
 429 static int
 430 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 431 {
 432         struct ar8216_priv *priv = to_ar8216(dev);
 433         u8 *vt = &priv->vlan_table[val->port_vlan];
 434         int i, j;
 435
 436         *vt = 0;
 437         for (i = 0; i < val->len; i++) {
 438                 struct switch_port *p = &val->value.ports[i];
 439
 440                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 441                         priv->vlan_tagged |= (1 << p->id);
 442                 } else {
 443                         priv->vlan_tagged &= ~(1 << p->id);
 444                         priv->pvid[p->id] = val->port_vlan;
 445
 446                         /* make sure that an untagged port does not
 447                          * appear in other vlans */
 448                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 449                                 if (j == val->port_vlan)
 450                                         continue;
 451                                 priv->vlan_table[j] &= ~(1 << p->id);
 452                         }
 453                 }
 454
 455                 *vt |= 1 << p->id;
 456         }
 457         return 0;
 458 }
 459
 460 static int
 461 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 462 {
 463         int timeout = 20;
 464         u32 t = 0;
 465
 466         while (1) {
 467                 t = priv->read(priv, reg);
 468                 if ((t & mask) == val)
 469                         return 0;
 470
 471                 if (timeout-- <= 0)
 472                         break;
 473
 474                 udelay(10);
 475         }
 476
 477         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 478                (unsigned int) reg, t, mask, val);
 479         return -ETIMEDOUT;
 480 }
 481
 482 static void
 483 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 484 {
 485         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 486                 return;
 487         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 488                 val &= AR8216_VTUDATA_MEMBER;
 489                 val |= AR8216_VTUDATA_VALID;
 490                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 491         }
 492         op |= AR8216_VTU_ACTIVE;
 493         priv->write(priv, AR8216_REG_VTU, op);
 494 }
 495
 496 static void
 497 ar8216_vtu_flush(struct ar8216_priv *priv)
 498 {
 499         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 500 }
 501
 502 static void
 503 ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
 504 {
 505         u32 op;
 506
 507         op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
 508         ar8216_vtu_op(priv, op, port_mask);
 509 }
 510
 511 static int
 512 ar8216_atu_flush(struct ar8216_priv *priv)
 513 {
 514         int ret;
 515
 516         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
 517         if (!ret)
 518                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
 519
 520         return ret;
 521 }
 522
 523 static void
 524 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 525                   u32 members, u32 pvid)
 526 {
 527         u32 header;
 528
 529         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
 530                 header = AR8216_PORT_CTRL_HEADER;
 531         else
 532                 header = 0;
 533
 534         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 535                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 536                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 537                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 538                    AR8216_PORT_CTRL_LEARN | header |
 539                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 540                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 541
 542         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 543                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 544                    AR8216_PORT_VLAN_DEFAULT_ID,
 545                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 546                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 547                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 548 }
 549
 550 static void
 551 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 552                   u32 members, u32 pvid)
 553 {
 554         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 555                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 556                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 557                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 558                    AR8216_PORT_CTRL_LEARN |
 559                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 560                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 561
 562         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 563                    AR8236_PORT_VLAN_DEFAULT_ID,
 564                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 565
 566         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 567                    AR8236_PORT_VLAN2_VLAN_MODE |
 568                    AR8236_PORT_VLAN2_MEMBER,
 569                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 570                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 571 }
 572
 573 static int
 574 ar8216_hw_apply(struct switch_dev *dev)
 575 {
 576         struct ar8216_priv *priv = to_ar8216(dev);
 577         u8 portmask[AR8216_NUM_PORTS];
 578         int i, j;
 579
 580         mutex_lock(&priv->reg_mutex);
 581         /* flush all vlan translation unit entries */
 582         priv->chip->vtu_flush(priv);
 583
 584         memset(portmask, 0, sizeof(portmask));
 585         if (!priv->init) {
 586                 /* calculate the port destination masks and load vlans
 587                  * into the vlan translation unit */
 588                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 589                         u8 vp = priv->vlan_table[j];
 590
 591                         if (!vp)
 592                                 continue;
 593
 594                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 595                                 u8 mask = (1 << i);
 596                                 if (vp & mask)
 597                                         portmask[i] |= vp & ~mask;
 598                         }
 599
 600                         priv->chip->vtu_load_vlan(priv, priv->vlan_id[j],
 601                                                  priv->vlan_table[j]);
 602                 }
 603         } else {
 604                 /* vlan disabled:
 605                  * isolate all ports, but connect them to the cpu port */
 606                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 607                         if (i == AR8216_PORT_CPU)
 608                                 continue;
 609
 610                         portmask[i] = 1 << AR8216_PORT_CPU;
 611                         portmask[AR8216_PORT_CPU] |= (1 << i);
 612                 }
 613         }
 614
 615         /* update the port destination mask registers and tag settings */
 616         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 617                 int egress, ingress;
 618                 int pvid;
 619
 620                 if (priv->vlan) {
 621                         pvid = priv->vlan_id[priv->pvid[i]];
 622                         if (priv->vlan_tagged & (1 << i))
 623                                 egress = AR8216_OUT_ADD_VLAN;
 624                         else
 625                                 egress = AR8216_OUT_STRIP_VLAN;
 626                         ingress = AR8216_IN_SECURE;
 627                 } else {
 628                         pvid = i;
 629                         egress = AR8216_OUT_KEEP;
 630                         ingress = AR8216_IN_PORT_ONLY;
 631                 }
 632
 633                 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
 634                                        pvid);
 635         }
 636         mutex_unlock(&priv->reg_mutex);
 637         return 0;
 638 }
 639
 640 static int
 641 ar8216_hw_init(struct ar8216_priv *priv)
 642 {
 643         return 0;
 644 }
 645
 646 static int
 647 ar8236_hw_init(struct ar8216_priv *priv)
 648 {
 649         int i;
 650         struct mii_bus *bus;
 651
 652         if (priv->initialized)
 653                 return 0;
 654
 655         /* Initialize the PHYs */
 656         bus = priv->phy->bus;
 657         for (i = 0; i < 5; i++) {
 658                 mdiobus_write(bus, i, MII_ADVERTISE,
 659                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 660                               ADVERTISE_PAUSE_ASYM);
 661                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 662         }
 663         msleep(1000);
 664
 665         priv->initialized = true;
 666         return 0;
 667 }
 668
 669 static int
 670 ar8316_hw_init(struct ar8216_priv *priv)
 671 {
 672         int i;
 673         u32 val, newval;
 674         struct mii_bus *bus;
 675
 676         val = priv->read(priv, 0x8);
 677
 678         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 679                 if (priv->port4_phy) {
 680                         /* value taken from Ubiquiti RouterStation Pro */
 681                         newval = 0x81461bea;
 682                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 683                 } else {
 684                         newval = 0x01261be2;
 685                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 686                 }
 687         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 688                 /* value taken from AVM Fritz!Box 7390 sources */
 689                 newval = 0x010e5b71;
 690         } else {
 691                 /* no known value for phy interface */
 692                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 693                         priv->phy->interface);
 694                 return -EINVAL;
 695         }
 696
 697         if (val == newval)
 698                 goto out;
 699
 700         priv->write(priv, 0x8, newval);
 701
 702         /* Initialize the ports */
 703         bus = priv->phy->bus;
 704         for (i = 0; i < 5; i++) {
 705                 if ((i == 4) && priv->port4_phy &&
 706                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 707                         /* work around for phy4 rgmii mode */
 708                         ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
 709                         /* rx delay */
 710                         ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
 711                         /* tx delay */
 712                         ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
 713                         msleep(1000);
 714                 }
 715
 716                 /* initialize the port itself */
 717                 mdiobus_write(bus, i, MII_ADVERTISE,
 718                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 719                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 720                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 721                 msleep(1000);
 722         }
 723
 724 out:
 725         priv->initialized = true;
 726         return 0;
 727 }
 728
 729 static void
 730 ar8216_init_globals(struct ar8216_priv *priv)
 731 {
 732         switch (priv->chip_type) {
 733         case AR8216:
 734                 /* standard atheros magic */
 735                 priv->write(priv, 0x38, 0xc000050e);
 736
 737                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 738                            AR8216_GCTRL_MTU, 1518 + 8 + 2);
 739                 break;
 740         case AR8316:
 741                 /* standard atheros magic */
 742                 priv->write(priv, 0x38, 0xc000050e);
 743
 744                 /* enable cpu port to receive multicast and broadcast frames */
 745                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 746
 747                 /* fall through */
 748         case AR8236:
 749                 /* enable jumbo frames */
 750                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 751                            AR8316_GCTRL_MTU, 9018 + 8 + 2);
 752                 break;
 753         }
 754 }
 755
 756 static void
 757 ar8216_init_port(struct ar8216_priv *priv, int port)
 758 {
 759         /* Enable port learning and tx */
 760         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 761                 AR8216_PORT_CTRL_LEARN |
 762                 (4 << AR8216_PORT_CTRL_STATE_S));
 763
 764         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 765
 766         if (port == AR8216_PORT_CPU) {
 767                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 768                         AR8216_PORT_STATUS_LINK_UP |
 769                         ar8xxx_has_gige(priv) ? AR8216_PORT_SPEED_1000M :
 770                                                 AR8216_PORT_SPEED_100M |
 771                         AR8216_PORT_STATUS_TXMAC |
 772                         AR8216_PORT_STATUS_RXMAC |
 773                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 774                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 775                         AR8216_PORT_STATUS_DUPLEX);
 776         } else {
 777                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 778                         AR8216_PORT_STATUS_LINK_AUTO);
 779         }
 780 }
 781
 782 static const struct ar8xxx_chip ar8216_chip = {
 783         .hw_init = ar8216_hw_init,
 784         .init_port = ar8216_init_port,
 785         .setup_port = ar8216_setup_port,
 786         .atu_flush = ar8216_atu_flush,
 787         .vtu_flush = ar8216_vtu_flush,
 788         .vtu_load_vlan = ar8216_vtu_load_vlan,
 789 };
 790
 791 static const struct ar8xxx_chip ar8236_chip = {
 792         .hw_init = ar8236_hw_init,
 793         .init_port = ar8216_init_port,
 794         .setup_port = ar8236_setup_port,
 795         .atu_flush = ar8216_atu_flush,
 796         .vtu_flush = ar8216_vtu_flush,
 797         .vtu_load_vlan = ar8216_vtu_load_vlan,
 798 };
 799
 800 static const struct ar8xxx_chip ar8316_chip = {
 801         .caps = AR8XXX_CAP_GIGE,
 802         .hw_init = ar8316_hw_init,
 803         .init_port = ar8216_init_port,
 804         .setup_port = ar8216_setup_port,
 805         .atu_flush = ar8216_atu_flush,
 806         .vtu_flush = ar8216_vtu_flush,
 807         .vtu_load_vlan = ar8216_vtu_load_vlan,
 808 };
 809
 810 static int
 811 ar8216_reset_switch(struct switch_dev *dev)
 812 {
 813         struct ar8216_priv *priv = to_ar8216(dev);
 814         int i;
 815
 816         mutex_lock(&priv->reg_mutex);
 817         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 818                 offsetof(struct ar8216_priv, vlan));
 819
 820         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 821                 priv->vlan_id[i] = i;
 822
 823         /* Configure all ports */
 824         for (i = 0; i < AR8216_NUM_PORTS; i++)
 825                 priv->chip->init_port(priv, i);
 826
 827         ar8216_init_globals(priv);
 828         mutex_unlock(&priv->reg_mutex);
 829
 830         return ar8216_hw_apply(dev);
 831 }
 832
 833 static const struct switch_dev_ops ar8216_sw_ops = {
 834         .attr_global = {
 835                 .attr = ar8216_globals,
 836                 .n_attr = ARRAY_SIZE(ar8216_globals),
 837         },
 838         .attr_port = {
 839                 .attr = ar8216_port,
 840                 .n_attr = ARRAY_SIZE(ar8216_port),
 841         },
 842         .attr_vlan = {
 843                 .attr = ar8216_vlan,
 844                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 845         },
 846         .get_port_pvid = ar8216_get_pvid,
 847         .set_port_pvid = ar8216_set_pvid,
 848         .get_vlan_ports = ar8216_get_ports,
 849         .set_vlan_ports = ar8216_set_ports,
 850         .apply_config = ar8216_hw_apply,
 851         .reset_switch = ar8216_reset_switch,
 852         .get_port_link = ar8216_get_port_link,
 853 };
 854
 855 static int
 856 ar8216_id_chip(struct ar8216_priv *priv)
 857 {
 858         u32 val;
 859         u16 id;
 860         int i;
 861
 862         priv->chip_type = UNKNOWN;
 863
 864         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 865         if (val == ~0)
 866                 return -ENODEV;
 867
 868         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 869         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 870                 u16 t;
 871
 872                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 873                 if (val == ~0)
 874                         return -ENODEV;
 875
 876                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 877                 if (t != id)
 878                         return -ENODEV;
 879         }
 880
 881         switch (id) {
 882         case 0x0101:
 883                 priv->chip_type = AR8216;
 884                 priv->chip = &ar8216_chip;
 885                 break;
 886         case 0x0301:
 887                 priv->chip_type = AR8236;
 888                 priv->chip = &ar8236_chip;
 889                 break;
 890         case 0x1000:
 891         case 0x1001:
 892                 priv->chip_type = AR8316;
 893                 priv->chip = &ar8316_chip;
 894                 break;
 895         default:
 896                 printk(KERN_DEBUG
 897                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 898                         (int)(id >> AR8216_CTRL_VERSION_S),
 899                         (int)(id & AR8216_CTRL_REVISION),
 900                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 901                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 902
 903                 return -ENODEV;
 904         }
 905
 906         return 0;
 907 }
 908
 909 static int
 910 ar8216_config_init(struct phy_device *pdev)
 911 {
 912         struct ar8216_priv *priv = pdev->priv;
 913         struct net_device *dev = pdev->attached_dev;
 914         struct switch_dev *swdev;
 915         int ret;
 916
 917         if (!priv) {
 918                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 919                 if (priv == NULL)
 920                         return -ENOMEM;
 921         }
 922
 923         priv->phy = pdev;
 924
 925         ret = ar8216_id_chip(priv);
 926         if (ret)
 927                 goto err_free_priv;
 928
 929         if (pdev->addr != 0) {
 930                 if (ar8xxx_has_gige(priv)) {
 931                         pdev->supported |= SUPPORTED_1000baseT_Full;
 932                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 933                 }
 934
 935                 if (priv->chip_type == AR8316) {
 936                         /* check if we're attaching to the switch twice */
 937                         pdev = pdev->bus->phy_map[0];
 938                         if (!pdev) {
 939                                 kfree(priv);
 940                                 return 0;
 941                         }
 942
 943                         /* switch device has not been initialized, reuse priv */
 944                         if (!pdev->priv) {
 945                                 priv->port4_phy = true;
 946                                 pdev->priv = priv;
 947                                 return 0;
 948                         }
 949
 950                         kfree(priv);
 951
 952                         /* switch device has been initialized, reinit */
 953                         priv = pdev->priv;
 954                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 955                         priv->initialized = false;
 956                         priv->port4_phy = true;
 957                         ar8316_hw_init(priv);
 958                         return 0;
 959                 }
 960
 961                 kfree(priv);
 962                 return 0;
 963         }
 964
 965         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 966                 pdev->attached_dev->name, priv->chip_type);
 967
 968         if (ar8xxx_has_gige(priv))
 969                 pdev->supported = SUPPORTED_1000baseT_Full;
 970         else
 971                 pdev->supported = SUPPORTED_100baseT_Full;
 972         pdev->advertising = pdev->supported;
 973
 974         mutex_init(&priv->reg_mutex);
 975         priv->read = ar8216_mii_read;
 976         priv->write = ar8216_mii_write;
 977
 978         pdev->priv = priv;
 979
 980         swdev = &priv->dev;
 981         swdev->cpu_port = AR8216_PORT_CPU;
 982         swdev->ops = &ar8216_sw_ops;
 983         swdev->ports = AR8216_NUM_PORTS;
 984
 985         if (priv->chip_type == AR8316) {
 986                 swdev->name = "Atheros AR8316";
 987                 swdev->vlans = AR8X16_MAX_VLANS;
 988
 989                 if (priv->port4_phy) {
 990                         /* port 5 connected to the other mac, therefore unusable */
 991                         swdev->ports = (AR8216_NUM_PORTS - 1);
 992                 }
 993         } else if (priv->chip_type == AR8236) {
 994                 swdev->name = "Atheros AR8236";
 995                 swdev->vlans = AR8216_NUM_VLANS;
 996                 swdev->ports = AR8216_NUM_PORTS;
 997         } else {
 998                 swdev->name = "Atheros AR8216";
 999                 swdev->vlans = AR8216_NUM_VLANS;
1000         }
1001
1002         ret = register_switch(&priv->dev, pdev->attached_dev);
1003         if (ret)
1004                 goto err_free_priv;
1005
1006         priv->init = true;
1007
1008         ret = priv->chip->hw_init(priv);
1009         if (ret)
1010                 goto err_free_priv;
1011
1012         ret = ar8216_reset_switch(&priv->dev);
1013         if (ret)
1014                 goto err_free_priv;
1015
1016         dev->phy_ptr = priv;
1017
1018         /* VID fixup only needed on ar8216 */
1019         if (pdev->addr == 0 && priv->chip_type == AR8216) {
1020                 pdev->pkt_align = 2;
1021                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
1022                 pdev->netif_rx = ar8216_netif_rx;
1023                 priv->ndo_old = dev->netdev_ops;
1024                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1025                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1026                 dev->netdev_ops = &priv->ndo;
1027         }
1028
1029         priv->init = false;
1030
1031         return 0;
1032
1033 err_free_priv:
1034         kfree(priv);
1035         return ret;
1036 }
1037
1038 static int
1039 ar8216_read_status(struct phy_device *phydev)
1040 {
1041         struct ar8216_priv *priv = phydev->priv;
1042         struct switch_port_link link;
1043         int ret;
1044
1045         if (phydev->addr != 0)
1046                 return genphy_read_status(phydev);
1047
1048         ar8216_read_port_link(priv, phydev->addr, &link);
1049         phydev->link = !!link.link;
1050         if (!phydev->link)
1051                 return 0;
1052
1053         switch (link.speed) {
1054         case SWITCH_PORT_SPEED_10:
1055                 phydev->speed = SPEED_10;
1056                 break;
1057         case SWITCH_PORT_SPEED_100:
1058                 phydev->speed = SPEED_100;
1059                 break;
1060         case SWITCH_PORT_SPEED_1000:
1061                 phydev->speed = SPEED_1000;
1062                 break;
1063         default:
1064                 phydev->speed = 0;
1065         }
1066         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1067
1068         /* flush the address translation unit */
1069         mutex_lock(&priv->reg_mutex);
1070         ret = priv->chip->atu_flush(priv);
1071         mutex_unlock(&priv->reg_mutex);
1072
1073         phydev->state = PHY_RUNNING;
1074         netif_carrier_on(phydev->attached_dev);
1075         phydev->adjust_link(phydev->attached_dev);
1076
1077         return ret;
1078 }
1079
1080 static int
1081 ar8216_config_aneg(struct phy_device *phydev)
1082 {
1083         if (phydev->addr == 0)
1084                 return 0;
1085
1086         return genphy_config_aneg(phydev);
1087 }
1088
1089 static int
1090 ar8216_probe(struct phy_device *pdev)
1091 {
1092         struct ar8216_priv priv;
1093
1094         priv.phy = pdev;
1095         return ar8216_id_chip(&priv);
1096 }
1097
1098 static void
1099 ar8216_remove(struct phy_device *pdev)
1100 {
1101         struct ar8216_priv *priv = pdev->priv;
1102         struct net_device *dev = pdev->attached_dev;
1103
1104         if (!priv)
1105                 return;
1106
1107         if (priv->ndo_old && dev)
1108                 dev->netdev_ops = priv->ndo_old;
1109         if (pdev->addr == 0)
1110                 unregister_switch(&priv->dev);
1111         kfree(priv);
1112 }
1113
1114 static struct phy_driver ar8216_driver = {
1115         .phy_id         = 0x004d0000,
1116         .name           = "Atheros AR8216/AR8236/AR8316",
1117         .phy_id_mask    = 0xffff0000,
1118         .features       = PHY_BASIC_FEATURES,
1119         .probe          = ar8216_probe,
1120         .remove         = ar8216_remove,
1121         .config_init    = &ar8216_config_init,
1122         .config_aneg    = &ar8216_config_aneg,
1123         .read_status    = &ar8216_read_status,
1124         .driver         = { .owner = THIS_MODULE },
1125 };
1126
1127 int __init
1128 ar8216_init(void)
1129 {
1130         return phy_driver_register(&ar8216_driver);
1131 }
1132
1133 void __exit
1134 ar8216_exit(void)
1135 {
1136         phy_driver_unregister(&ar8216_driver);
1137 }
1138
1139 module_init(ar8216_init);
1140 module_exit(ar8216_exit);
1141 MODULE_LICENSE("GPL");
1142