generic: ar8216: add support for get link status
[openwrt/svn-archive/archive.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include "ar8216.h"
33
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
37
38 struct ar8216_priv {
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
46 int chip;
47 bool initialized;
48 bool port4_phy;
49 char buf[80];
50
51 /* all fields below are cleared on reset */
52 bool vlan;
53 u16 vlan_id[AR8X16_MAX_VLANS];
54 u8 vlan_table[AR8X16_MAX_VLANS];
55 u8 vlan_tagged;
56 u16 pvid[AR8216_NUM_PORTS];
57 };
58
59 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
60
61 static inline void
62 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
63 {
64 regaddr >>= 1;
65 *r1 = regaddr & 0x1e;
66
67 regaddr >>= 5;
68 *r2 = regaddr & 0x7;
69
70 regaddr >>= 3;
71 *page = regaddr & 0x1ff;
72 }
73
74 static u32
75 ar8216_mii_read(struct ar8216_priv *priv, int reg)
76 {
77 struct phy_device *phy = priv->phy;
78 u16 r1, r2, page;
79 u16 lo, hi;
80
81 split_addr((u32) reg, &r1, &r2, &page);
82 phy->bus->write(phy->bus, 0x18, 0, page);
83 msleep(1); /* wait for the page switch to propagate */
84 lo = phy->bus->read(phy->bus, 0x10 | r2, r1);
85 hi = phy->bus->read(phy->bus, 0x10 | r2, r1 + 1);
86
87 return (hi << 16) | lo;
88 }
89
90 static void
91 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
92 {
93 struct phy_device *phy = priv->phy;
94 u16 r1, r2, r3;
95 u16 lo, hi;
96
97 split_addr((u32) reg, &r1, &r2, &r3);
98 phy->bus->write(phy->bus, 0x18, 0, r3);
99 msleep(1); /* wait for the page switch to propagate */
100
101 lo = val & 0xffff;
102 hi = (u16) (val >> 16);
103 phy->bus->write(phy->bus, 0x10 | r2, r1 + 1, hi);
104 phy->bus->write(phy->bus, 0x10 | r2, r1, lo);
105 }
106
107 static u32
108 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
109 {
110 u32 v;
111
112 v = priv->read(priv, reg);
113 v &= ~mask;
114 v |= val;
115 priv->write(priv, reg, v);
116
117 return v;
118 }
119
120 static inline int
121 ar8216_id_chip(struct ar8216_priv *priv)
122 {
123 u32 val;
124 u16 id;
125 int i;
126
127 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
128 if (val == ~0)
129 return UNKNOWN;
130
131 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
132 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
133 u16 t;
134
135 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
136 if (val == ~0)
137 return UNKNOWN;
138
139 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
140 if (t != id)
141 return UNKNOWN;
142 }
143
144 switch (id) {
145 case 0x0101:
146 return AR8216;
147 case 0x1000:
148 case 0x1001:
149 return AR8316;
150 default:
151 printk(KERN_DEBUG
152 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
153 (int)(id >> AR8216_CTRL_VERSION_S),
154 (int)(id & AR8216_CTRL_REVISION),
155 priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 2),
156 priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 3));
157
158 return UNKNOWN;
159 }
160 }
161
162 static int
163 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
164 struct switch_val *val)
165 {
166 struct ar8216_priv *priv = to_ar8216(dev);
167 priv->vlan = !!val->value.i;
168 return 0;
169 }
170
171 static int
172 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
173 struct switch_val *val)
174 {
175 struct ar8216_priv *priv = to_ar8216(dev);
176 val->value.i = priv->vlan;
177 return 0;
178 }
179
180
181 static int
182 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
183 {
184 struct ar8216_priv *priv = to_ar8216(dev);
185
186 /* make sure no invalid PVIDs get set */
187
188 if (vlan >= dev->vlans)
189 return -EINVAL;
190
191 priv->pvid[port] = vlan;
192 return 0;
193 }
194
195 static int
196 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
197 {
198 struct ar8216_priv *priv = to_ar8216(dev);
199 *vlan = priv->pvid[port];
200 return 0;
201 }
202
203 static int
204 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
205 struct switch_val *val)
206 {
207 struct ar8216_priv *priv = to_ar8216(dev);
208 priv->vlan_id[val->port_vlan] = val->value.i;
209 return 0;
210 }
211
212 static int
213 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
214 struct switch_val *val)
215 {
216 struct ar8216_priv *priv = to_ar8216(dev);
217 val->value.i = priv->vlan_id[val->port_vlan];
218 return 0;
219 }
220
221 static const char *ar8216_speed_str(unsigned speed)
222 {
223 switch (speed) {
224 case AR8216_PORT_SPEED_10M:
225 return "10baseT";
226 case AR8216_PORT_SPEED_100M:
227 return "100baseT";
228 case AR8216_PORT_SPEED_1000M:
229 return "1000baseT";
230 }
231
232 return "unknown";
233 }
234
235 static int ar8216_port_get_link(struct switch_dev *dev,
236 const struct switch_attr *attr,
237 struct switch_val *val)
238 {
239 struct ar8216_priv *priv = to_ar8216(dev);
240 u32 len;
241 u32 status;
242 int port;
243
244 port = val->port_vlan;
245
246 memset(priv->buf, '\0', sizeof(priv->buf));
247 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
248
249 if (status & AR8216_PORT_STATUS_LINK_UP) {
250 len = snprintf(priv->buf, sizeof(priv->buf),
251 "port:%d link:up speed:%s %s-duplex %s%s%s",
252 port,
253 ar8216_speed_str((status &
254 AR8216_PORT_STATUS_SPEED) >>
255 AR8216_PORT_STATUS_SPEED_S),
256 (status & AR8216_PORT_STATUS_DUPLEX) ?
257 "full" : "half",
258 (status & AR8216_PORT_STATUS_TXFLOW) ?
259 "txflow ": "",
260 (status & AR8216_PORT_STATUS_RXFLOW) ?
261 "rxflow " : "",
262 (status & AR8216_PORT_STATUS_LINK_AUTO) ?
263 "auto ": "");
264 } else {
265 len = snprintf(priv->buf, sizeof(priv->buf), "port:%d link:down",
266 port);
267 }
268
269 val->value.s = priv->buf;
270 val->len = len;
271
272 return 0;
273 }
274
275 static int
276 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
277 {
278 struct ar8216_priv *priv = dev->phy_ptr;
279 unsigned char *buf;
280
281 if (unlikely(!priv))
282 goto error;
283
284 if (!priv->vlan)
285 goto send;
286
287 if (unlikely(skb_headroom(skb) < 2)) {
288 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
289 goto error;
290 }
291
292 buf = skb_push(skb, 2);
293 buf[0] = 0x10;
294 buf[1] = 0x80;
295
296 send:
297 return priv->ndo_old->ndo_start_xmit(skb, dev);
298
299 error:
300 dev_kfree_skb_any(skb);
301 return 0;
302 }
303
304 static int
305 ar8216_mangle_rx(struct sk_buff *skb, int napi)
306 {
307 struct ar8216_priv *priv;
308 struct net_device *dev;
309 unsigned char *buf;
310 int port, vlan;
311
312 dev = skb->dev;
313 if (!dev)
314 goto error;
315
316 priv = dev->phy_ptr;
317 if (!priv)
318 goto error;
319
320 /* don't strip the header if vlan mode is disabled */
321 if (!priv->vlan)
322 goto recv;
323
324 /* strip header, get vlan id */
325 buf = skb->data;
326 skb_pull(skb, 2);
327
328 /* check for vlan header presence */
329 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
330 goto recv;
331
332 port = buf[0] & 0xf;
333
334 /* no need to fix up packets coming from a tagged source */
335 if (priv->vlan_tagged & (1 << port))
336 goto recv;
337
338 /* lookup port vid from local table, the switch passes an invalid vlan id */
339 vlan = priv->vlan_id[priv->pvid[port]];
340
341 buf[14 + 2] &= 0xf0;
342 buf[14 + 2] |= vlan >> 8;
343 buf[15 + 2] = vlan & 0xff;
344
345 recv:
346 skb->protocol = eth_type_trans(skb, skb->dev);
347
348 if (napi)
349 return netif_receive_skb(skb);
350 else
351 return netif_rx(skb);
352
353 error:
354 /* no vlan? eat the packet! */
355 dev_kfree_skb_any(skb);
356 return NET_RX_DROP;
357 }
358
359 static int
360 ar8216_netif_rx(struct sk_buff *skb)
361 {
362 return ar8216_mangle_rx(skb, 0);
363 }
364
365 static int
366 ar8216_netif_receive_skb(struct sk_buff *skb)
367 {
368 return ar8216_mangle_rx(skb, 1);
369 }
370
371
372 static struct switch_attr ar8216_globals[] = {
373 {
374 .type = SWITCH_TYPE_INT,
375 .name = "enable_vlan",
376 .description = "Enable VLAN mode",
377 .set = ar8216_set_vlan,
378 .get = ar8216_get_vlan,
379 .max = 1
380 },
381 };
382
383 static struct switch_attr ar8216_port[] = {
384 {
385 .type = SWITCH_TYPE_STRING,
386 .name = "link",
387 .description = "Get port link information",
388 .max = 1,
389 .set = NULL,
390 .get = ar8216_port_get_link,
391 },
392 };
393
394 static struct switch_attr ar8216_vlan[] = {
395 {
396 .type = SWITCH_TYPE_INT,
397 .name = "vid",
398 .description = "VLAN ID (0-4094)",
399 .set = ar8216_set_vid,
400 .get = ar8216_get_vid,
401 .max = 4094,
402 },
403 };
404
405
406 static int
407 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
408 {
409 struct ar8216_priv *priv = to_ar8216(dev);
410 u8 ports = priv->vlan_table[val->port_vlan];
411 int i;
412
413 val->len = 0;
414 for (i = 0; i < AR8216_NUM_PORTS; i++) {
415 struct switch_port *p;
416
417 if (!(ports & (1 << i)))
418 continue;
419
420 p = &val->value.ports[val->len++];
421 p->id = i;
422 if (priv->vlan_tagged & (1 << i))
423 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
424 else
425 p->flags = 0;
426 }
427 return 0;
428 }
429
430 static int
431 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
432 {
433 struct ar8216_priv *priv = to_ar8216(dev);
434 u8 *vt = &priv->vlan_table[val->port_vlan];
435 int i, j;
436
437 *vt = 0;
438 for (i = 0; i < val->len; i++) {
439 struct switch_port *p = &val->value.ports[i];
440
441 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
442 priv->vlan_tagged |= (1 << p->id);
443 else {
444 priv->vlan_tagged &= ~(1 << p->id);
445 priv->pvid[p->id] = val->port_vlan;
446
447 /* make sure that an untagged port does not
448 * appear in other vlans */
449 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
450 if (j == val->port_vlan)
451 continue;
452 priv->vlan_table[j] &= ~(1 << p->id);
453 }
454 }
455
456 *vt |= 1 << p->id;
457 }
458 return 0;
459 }
460
461 static int
462 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
463 {
464 int timeout = 20;
465
466 while ((priv->read(priv, reg) & mask) != val) {
467 if (timeout-- <= 0) {
468 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
469 return 1;
470 }
471 }
472 return 0;
473 }
474
475 static void
476 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
477 {
478 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
479 return;
480 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
481 val &= AR8216_VTUDATA_MEMBER;
482 val |= AR8216_VTUDATA_VALID;
483 priv->write(priv, AR8216_REG_VTU_DATA, val);
484 }
485 op |= AR8216_VTU_ACTIVE;
486 priv->write(priv, AR8216_REG_VTU, op);
487 }
488
489 static int
490 ar8216_hw_apply(struct switch_dev *dev)
491 {
492 struct ar8216_priv *priv = to_ar8216(dev);
493 u8 portmask[AR8216_NUM_PORTS];
494 int i, j;
495
496 mutex_lock(&priv->reg_mutex);
497 /* flush all vlan translation unit entries */
498 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
499
500 memset(portmask, 0, sizeof(portmask));
501 if (priv->vlan) {
502 /* calculate the port destination masks and load vlans
503 * into the vlan translation unit */
504 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
505 u8 vp = priv->vlan_table[j];
506
507 if (!vp)
508 continue;
509
510 for (i = 0; i < AR8216_NUM_PORTS; i++) {
511 u8 mask = (1 << i);
512 if (vp & mask)
513 portmask[i] |= vp & ~mask;
514 }
515
516 ar8216_vtu_op(priv,
517 AR8216_VTU_OP_LOAD |
518 (priv->vlan_id[j] << AR8216_VTU_VID_S),
519 priv->vlan_table[j]);
520 }
521 } else {
522 /* vlan disabled:
523 * isolate all ports, but connect them to the cpu port */
524 for (i = 0; i < AR8216_NUM_PORTS; i++) {
525 if (i == AR8216_PORT_CPU)
526 continue;
527
528 portmask[i] = 1 << AR8216_PORT_CPU;
529 portmask[AR8216_PORT_CPU] |= (1 << i);
530 }
531 }
532
533 /* update the port destination mask registers and tag settings */
534 for (i = 0; i < AR8216_NUM_PORTS; i++) {
535 int egress, ingress;
536 int pvid;
537
538 if (priv->vlan) {
539 pvid = priv->vlan_id[priv->pvid[i]];
540 } else {
541 pvid = i;
542 }
543
544 if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
545 egress = AR8216_OUT_ADD_VLAN;
546 } else {
547 egress = AR8216_OUT_STRIP_VLAN;
548 }
549 if (priv->vlan) {
550 ingress = AR8216_IN_SECURE;
551 } else {
552 ingress = AR8216_IN_PORT_ONLY;
553 }
554
555 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(i),
556 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
557 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
558 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
559 AR8216_PORT_CTRL_LEARN |
560 (priv->vlan && i == AR8216_PORT_CPU && (priv->chip == AR8216) ?
561 AR8216_PORT_CTRL_HEADER : 0) |
562 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
563 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
564
565 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(i),
566 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
567 AR8216_PORT_VLAN_DEFAULT_ID,
568 (portmask[i] << AR8216_PORT_VLAN_DEST_PORTS_S) |
569 (ingress << AR8216_PORT_VLAN_MODE_S) |
570 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
571 }
572 mutex_unlock(&priv->reg_mutex);
573 return 0;
574 }
575
576 static int
577 ar8316_hw_init(struct ar8216_priv *priv) {
578 int i;
579 u32 val, newval;
580 struct mii_bus *bus;
581
582 val = priv->read(priv, 0x8);
583
584 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
585 if (priv->port4_phy) {
586 /* value taken from Ubiquiti RouterStation Pro */
587 newval = 0x81461bea;
588 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
589 } else {
590 newval = 0x01261be2;
591 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
592 }
593 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
594 /* value taken from AVM Fritz!Box 7390 sources */
595 newval = 0x010e5b71;
596 } else {
597 /* no known value for phy interface */
598 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
599 priv->phy->interface);
600 return -EINVAL;
601 }
602
603 if (val == newval)
604 goto out;
605
606 priv->write(priv, 0x8, newval);
607
608 /* standard atheros magic */
609 priv->write(priv, 0x38, 0xc000050e);
610
611 /* Initialize the ports */
612 bus = priv->phy->bus;
613 for (i = 0; i < 5; i++) {
614 if ((i == 4) && priv->port4_phy &&
615 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
616 /* work around for phy4 rgmii mode */
617 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x12);
618 bus->write(bus, i, MII_ATH_DBG_DATA, 0x480c);
619 /* rx delay */
620 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x0);
621 bus->write(bus, i, MII_ATH_DBG_DATA, 0x824e);
622 /* tx delay */
623 bus->write(bus, i, MII_ATH_DBG_ADDR, 0x5);
624 bus->write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
625 msleep(1000);
626 }
627
628 /* initialize the port itself */
629 bus->write(bus, i, MII_ADVERTISE,
630 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
631 bus->write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
632 bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
633 msleep(1000);
634 }
635
636 out:
637 priv->initialized = true;
638 return 0;
639 }
640
641 static int
642 ar8216_reset_switch(struct switch_dev *dev)
643 {
644 struct ar8216_priv *priv = to_ar8216(dev);
645 int i;
646
647 mutex_lock(&priv->reg_mutex);
648 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
649 offsetof(struct ar8216_priv, vlan));
650 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
651 priv->vlan_id[i] = i;
652 }
653 for (i = 0; i < AR8216_NUM_PORTS; i++) {
654 /* Enable port learning and tx */
655 priv->write(priv, AR8216_REG_PORT_CTRL(i),
656 AR8216_PORT_CTRL_LEARN |
657 (4 << AR8216_PORT_CTRL_STATE_S));
658
659 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
660
661 /* Configure all PHYs */
662 if (i == AR8216_PORT_CPU) {
663 priv->write(priv, AR8216_REG_PORT_STATUS(i),
664 AR8216_PORT_STATUS_LINK_UP |
665 ((priv->chip == AR8316) ?
666 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
667 AR8216_PORT_STATUS_TXMAC |
668 AR8216_PORT_STATUS_RXMAC |
669 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
670 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
671 AR8216_PORT_STATUS_DUPLEX);
672 } else {
673 priv->write(priv, AR8216_REG_PORT_STATUS(i),
674 AR8216_PORT_STATUS_LINK_AUTO);
675 }
676 }
677 /* XXX: undocumented magic from atheros, required! */
678 priv->write(priv, 0x38, 0xc000050e);
679
680 if (priv->chip == AR8216) {
681 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
682 AR8216_GCTRL_MTU, 1518 + 8 + 2);
683 } else if (priv->chip == AR8316) {
684 /* enable jumbo frames */
685 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
686 AR8316_GCTRL_MTU, 9018 + 8 + 2);
687 }
688
689 if (priv->chip == AR8316) {
690 /* enable cpu port to receive multicast and broadcast frames */
691 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
692 }
693 mutex_unlock(&priv->reg_mutex);
694 return ar8216_hw_apply(dev);
695 }
696
697
698 static const struct switch_dev_ops ar8216_ops = {
699 .attr_global = {
700 .attr = ar8216_globals,
701 .n_attr = ARRAY_SIZE(ar8216_globals),
702 },
703 .attr_port = {
704 .attr = ar8216_port,
705 .n_attr = ARRAY_SIZE(ar8216_port),
706 },
707 .attr_vlan = {
708 .attr = ar8216_vlan,
709 .n_attr = ARRAY_SIZE(ar8216_vlan),
710 },
711 .get_port_pvid = ar8216_get_pvid,
712 .set_port_pvid = ar8216_set_pvid,
713 .get_vlan_ports = ar8216_get_ports,
714 .set_vlan_ports = ar8216_set_ports,
715 .apply_config = ar8216_hw_apply,
716 .reset_switch = ar8216_reset_switch,
717 };
718
719 static int
720 ar8216_config_init(struct phy_device *pdev)
721 {
722 struct ar8216_priv *priv = pdev->priv;
723 struct net_device *dev = pdev->attached_dev;
724 struct switch_dev *swdev;
725 int ret;
726
727 if (!priv) {
728 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
729 if (priv == NULL)
730 return -ENOMEM;
731 }
732
733 priv->phy = pdev;
734
735 priv->chip = ar8216_id_chip(priv);
736
737 if (pdev->addr != 0) {
738 if (priv->chip == AR8316) {
739 pdev->supported |= SUPPORTED_1000baseT_Full;
740 pdev->advertising |= ADVERTISED_1000baseT_Full;
741
742 /* check if we're attaching to the switch twice */
743 pdev = pdev->bus->phy_map[0];
744 if (!pdev) {
745 kfree(priv);
746 return 0;
747 }
748
749 /* switch device has not been initialized, reuse priv */
750 if (!pdev->priv) {
751 priv->port4_phy = true;
752 pdev->priv = priv;
753 return 0;
754 }
755
756 kfree(priv);
757
758 /* switch device has been initialized, reinit */
759 priv = pdev->priv;
760 priv->dev.ports = (AR8216_NUM_PORTS - 1);
761 priv->initialized = false;
762 priv->port4_phy = true;
763 ar8316_hw_init(priv);
764 return 0;
765 }
766
767 kfree(priv);
768 return 0;
769 }
770
771 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
772 pdev->attached_dev->name, priv->chip);
773
774 pdev->supported = priv->chip == AR8316 ?
775 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
776 pdev->advertising = pdev->supported;
777
778 mutex_init(&priv->reg_mutex);
779 priv->read = ar8216_mii_read;
780 priv->write = ar8216_mii_write;
781
782 pdev->priv = priv;
783
784 swdev = &priv->dev;
785 swdev->cpu_port = AR8216_PORT_CPU;
786 swdev->ops = &ar8216_ops;
787 swdev->ports = AR8216_NUM_PORTS;
788
789 if (priv->chip == AR8316) {
790 swdev->name = "Atheros AR8316";
791 swdev->vlans = AR8X16_MAX_VLANS;
792
793 if (priv->port4_phy) {
794 /* port 5 connected to the other mac, therefore unusable */
795 swdev->ports = (AR8216_NUM_PORTS - 1);
796 }
797 } else {
798 swdev->name = "Atheros AR8216";
799 swdev->vlans = AR8216_NUM_VLANS;
800 }
801
802 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
803 kfree(priv);
804 goto done;
805 }
806
807 if (priv->chip == AR8316) {
808 ret = ar8316_hw_init(priv);
809 if (ret) {
810 kfree(priv);
811 goto done;
812 }
813 }
814
815 ret = ar8216_reset_switch(&priv->dev);
816 if (ret) {
817 kfree(priv);
818 goto done;
819 }
820
821 dev->phy_ptr = priv;
822
823 /* VID fixup only needed on ar8216 */
824 if (pdev->addr == 0 && priv->chip == AR8216) {
825 pdev->pkt_align = 2;
826 pdev->netif_receive_skb = ar8216_netif_receive_skb;
827 pdev->netif_rx = ar8216_netif_rx;
828 priv->ndo_old = dev->netdev_ops;
829 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
830 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
831 dev->netdev_ops = &priv->ndo;
832 }
833
834 done:
835 return ret;
836 }
837
838 static int
839 ar8216_read_status(struct phy_device *phydev)
840 {
841 struct ar8216_priv *priv = phydev->priv;
842 int ret;
843 if (phydev->addr != 0) {
844 return genphy_read_status(phydev);
845 }
846
847 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
848 phydev->duplex = DUPLEX_FULL;
849 phydev->link = 1;
850
851 /* flush the address translation unit */
852 mutex_lock(&priv->reg_mutex);
853 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
854
855 if (!ret)
856 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
857 else
858 ret = -ETIMEDOUT;
859 mutex_unlock(&priv->reg_mutex);
860
861 phydev->state = PHY_RUNNING;
862 netif_carrier_on(phydev->attached_dev);
863 phydev->adjust_link(phydev->attached_dev);
864
865 return ret;
866 }
867
868 static int
869 ar8216_config_aneg(struct phy_device *phydev)
870 {
871 if (phydev->addr == 0)
872 return 0;
873
874 return genphy_config_aneg(phydev);
875 }
876
877 static int
878 ar8216_probe(struct phy_device *pdev)
879 {
880 struct ar8216_priv priv;
881 u16 chip;
882
883 priv.phy = pdev;
884 chip = ar8216_id_chip(&priv);
885 if (chip == UNKNOWN)
886 return -ENODEV;
887
888 return 0;
889 }
890
891 static void
892 ar8216_remove(struct phy_device *pdev)
893 {
894 struct ar8216_priv *priv = pdev->priv;
895 struct net_device *dev = pdev->attached_dev;
896
897 if (!priv)
898 return;
899
900 if (priv->ndo_old && dev)
901 dev->netdev_ops = priv->ndo_old;
902 if (pdev->addr == 0)
903 unregister_switch(&priv->dev);
904 kfree(priv);
905 }
906
907 static struct phy_driver ar8216_driver = {
908 .phy_id = 0x004d0000,
909 .name = "Atheros AR8216/AR8316",
910 .phy_id_mask = 0xffff0000,
911 .features = PHY_BASIC_FEATURES,
912 .probe = ar8216_probe,
913 .remove = ar8216_remove,
914 .config_init = &ar8216_config_init,
915 .config_aneg = &ar8216_config_aneg,
916 .read_status = &ar8216_read_status,
917 .driver = { .owner = THIS_MODULE },
918 };
919
920 int __init
921 ar8216_init(void)
922 {
923 return phy_driver_register(&ar8216_driver);
924 }
925
926 void __exit
927 ar8216_exit(void)
928 {
929 phy_driver_unregister(&ar8216_driver);
930 }
931
932 module_init(ar8216_init);
933 module_exit(ar8216_exit);
934 MODULE_LICENSE("GPL");
935