272360f6deedac41740ed938786725e1d543dfbb
[openwrt/svn-archive/archive.git] / target / linux / generic / files / drivers / net / phy / b53 / b53_mmap.c
1 /*
2 * B53 register access through memory mapped registers
3 *
4 * Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/platform_data/b53.h>
23
24 #include "b53_priv.h"
25
26 static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
27 {
28 u8 __iomem *regs = dev->priv;
29
30 *val = readb(regs + (page << 8) + reg);
31
32 return 0;
33 }
34
35 static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
36 {
37 u8 __iomem *regs = dev->priv;
38
39 if (WARN_ON(reg % 2))
40 return -EINVAL;
41
42 if (dev->pdata && dev->pdata->big_endian)
43 *val = readw_be(regs + (page << 8) + reg);
44 else
45 *val = readw(regs + (page << 8) + reg);
46
47 return 0;
48 }
49
50 static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
51 {
52 u8 __iomem *regs = dev->priv;
53
54 if (WARN_ON(reg % 4))
55 return -EINVAL;
56
57 if (dev->pdata && dev->pdata->big_endian)
58 *val = readl_be(regs + (page << 8) + reg);
59 else
60 *val = readl(regs + (page << 8) + reg);
61
62 return 0;
63 }
64
65 static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
66 {
67 u8 __iomem *regs = dev->priv;
68
69 if (WARN_ON(reg % 4))
70 return -EINVAL;
71
72 if (dev->pdata && dev->pdata->big_endian) {
73 *val = readl_be(regs + (page << 8) + reg);
74 *val <<= 16;
75 *val |= readw_be(regs + (page << 8) + reg + 4);
76 } else {
77 *val |= readw(regs + (page << 8) + reg + 4);
78 *val <<= 32;
79 *val = readl(regs + (page << 8) + reg);
80 }
81
82 return 0;
83 }
84
85 static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
86 {
87 u8 __iomem *regs = dev->priv;
88 u32 hi, lo;
89
90 if (WARN_ON(reg % 4))
91 return -EINVAL;
92
93 if (dev->pdata && dev->pdata->big_endian) {
94 lo = readl_be(regs + (page << 8) + reg);
95 hi = readl_be(regs + (page << 8) + reg + 4);
96 } else {
97 lo = readl(regs + (page << 8) + reg);
98 hi = readl(regs + (page << 8) + reg + 4);
99 }
100
101 *val = ((u64)hi << 32) | lo;
102
103 return 0;
104 }
105
106 static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
107 {
108 u8 __iomem *regs = dev->priv;
109
110 writeb(value, regs + (page << 8) + reg);
111
112 return 0;
113 }
114
115 static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
116 u16 value)
117 {
118 u8 __iomem *regs = dev->priv;
119
120 if (WARN_ON(reg % 2))
121 return -EINVAL;
122
123 if (dev->pdata && dev->pdata->big_endian)
124 writew_be(value, regs + (page << 8) + reg);
125 else
126 writew(value, regs + (page << 8) + reg);
127
128 return 0;
129 }
130
131 static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
132 u32 value)
133 {
134 u8 __iomem *regs = dev->priv;
135
136 if (WARN_ON(reg % 4))
137 return -EINVAL;
138
139 if (dev->pdata && dev->pdata->big_endian)
140 writel_be(value, regs + (page << 8) + reg);
141 else
142 writel(value, regs + (page << 8) + reg);
143
144 return 0;
145 }
146
147 static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
148 u64 value)
149 {
150 u8 __iomem *regs = dev->priv;
151
152 if (WARN_ON(reg % 4))
153 return -EINVAL;
154
155 if (dev->pdata && dev->pdata->big_endian) {
156 writel_be((u32)(value >> 16), regs + (page << 8) + reg);
157 writew_be((u16)value, regs + (page << 8) + reg + 4);
158 } else {
159 writel((u32)value, regs + (page << 8) + reg);
160 writew((u16)(value >> 32), regs + (page << 8) + reg + 4);
161 }
162
163 return 0;
164 }
165
166 static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
167 u64 value)
168 {
169 u8 __iomem *regs = dev->priv;
170
171 if (WARN_ON(reg % 4))
172 return -EINVAL;
173
174 if (dev->pdata && dev->pdata->big_endian) {
175 writel_be((u32)(value >> 32), regs + (page << 8) + reg);
176 writel_be((u32)value, regs + (page << 8) + reg + 4);
177 } else {
178 writel((u32)value, regs + (page << 8) + reg);
179 writel((u32)(value >> 32), regs + (page << 8) + reg + 4);
180 }
181
182 return 0;
183 }
184
185 static struct b53_io_ops b53_mmap_ops = {
186 .read8 = b53_mmap_read8,
187 .read16 = b53_mmap_read16,
188 .read32 = b53_mmap_read32,
189 .read48 = b53_mmap_read48,
190 .read64 = b53_mmap_read64,
191 .write8 = b53_mmap_write8,
192 .write16 = b53_mmap_write16,
193 .write32 = b53_mmap_write32,
194 .write48 = b53_mmap_write48,
195 .write64 = b53_mmap_write64,
196 };
197
198 static int b53_mmap_probe(struct platform_device *pdev)
199 {
200 struct b53_platform_data *pdata = pdev->dev.platform_data;
201 struct b53_device *dev;
202
203 if (!pdata)
204 return -EINVAL;
205
206 dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, pdata->regs);
207 if (!dev)
208 return -ENOMEM;
209
210 if (pdata)
211 dev->pdata = pdata;
212
213 platform_set_drvdata(pdev, dev);
214
215 return b53_switch_register(dev);
216 }
217
218 static int b53_mmap_remove(struct platform_device *pdev)
219 {
220 struct b53_device *dev = platform_get_drvdata(pdev);
221
222 if (dev) {
223 b53_switch_remove(dev);
224 }
225
226 return 0;
227 }
228
229 static struct platform_driver b53_mmap_driver = {
230 .probe = b53_mmap_probe,
231 .remove = b53_mmap_remove,
232 .driver = {
233 .name = "b53-switch",
234 },
235 };
236
237 module_platform_driver(b53_mmap_driver);
238 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
239 MODULE_DESCRIPTION("B53 MMAP access driver");
240 MODULE_LICENSE("Dual BSD/GPL");