target/linux/generic/files/include/linux/ar8216_platform.h

   1 /*
   2  * AR8216 switch driver platform data
   3  *
   4  * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #ifndef AR8216_PLATFORM_H
  18 #define AR8216_PLATFORM_H
  19
  20 enum ar8327_pad_mode {
  21         AR8327_PAD_NC = 0,
  22         AR8327_PAD_MAC2MAC_MII,
  23         AR8327_PAD_MAC2MAC_GMII,
  24         AR8327_PAD_MAC_SGMII,
  25         AR8327_PAD_MAC2PHY_MII,
  26         AR8327_PAD_MAC2PHY_GMII,
  27         AR8327_PAD_MAC_RGMII,
  28         AR8327_PAD_PHY_GMII,
  29         AR8327_PAD_PHY_RGMII,
  30         AR8327_PAD_PHY_MII,
  31 };
  32
  33 enum ar8327_clk_delay_sel {
  34         AR8327_CLK_DELAY_SEL0 = 0,
  35         AR8327_CLK_DELAY_SEL1,
  36         AR8327_CLK_DELAY_SEL2,
  37         AR8327_CLK_DELAY_SEL3,
  38 };
  39
  40 struct ar8327_pad_cfg {
  41         enum ar8327_pad_mode mode;
  42         bool rxclk_sel;
  43         bool txclk_sel;
  44         bool pipe_rxclk_sel;
  45         bool txclk_delay_en;
  46         bool rxclk_delay_en;
  47         enum ar8327_clk_delay_sel txclk_delay_sel;
  48         enum ar8327_clk_delay_sel rxclk_delay_sel;
  49 };
  50
  51 enum ar8327_port_speed {
  52         AR8327_PORT_SPEED_10 = 0,
  53         AR8327_PORT_SPEED_100,
  54         AR8327_PORT_SPEED_1000,
  55 };
  56
  57 struct ar8327_port_cfg {
  58         int force_link:1;
  59         enum ar8327_port_speed speed;
  60         int txpause:1;
  61         int rxpause:1;
  62         int duplex:1;
  63 };
  64
  65 struct ar8327_platform_data {
  66         struct ar8327_pad_cfg *pad0_cfg;
  67         struct ar8327_pad_cfg *pad5_cfg;
  68         struct ar8327_pad_cfg *pad6_cfg;
  69         struct ar8327_port_cfg cpuport_cfg;
  70 };
  71
  72 #endif /* AR8216_PLATFORM_H */