kernel/3.1[02]: move MTD root device setup code to mtdcore
[openwrt/svn-archive/archive.git] / target / linux / generic / patches-3.10 / 020-ssb_update.patch
1 --- a/drivers/ssb/Kconfig
2 +++ b/drivers/ssb/Kconfig
3 @@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
4
5 config SSB_SFLASH
6 bool "SSB serial flash support"
7 - depends on SSB_DRIVER_MIPS && BROKEN
8 + depends on SSB_DRIVER_MIPS
9 default y
10
11 # Assumption: We are on embedded, if we compile the MIPS core.
12 config SSB_EMBEDDED
13 bool
14 - depends on SSB_DRIVER_MIPS
15 + depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE
16 default y
17
18 config SSB_DRIVER_EXTIF
19 --- a/drivers/ssb/driver_chipcommon_sflash.c
20 +++ b/drivers/ssb/driver_chipcommon_sflash.c
21 @@ -9,6 +9,19 @@
22
23 #include "ssb_private.h"
24
25 +static struct resource ssb_sflash_resource = {
26 + .name = "ssb_sflash",
27 + .start = SSB_FLASH2,
28 + .end = 0,
29 + .flags = IORESOURCE_MEM | IORESOURCE_READONLY,
30 +};
31 +
32 +struct platform_device ssb_sflash_dev = {
33 + .name = "ssb_sflash",
34 + .resource = &ssb_sflash_resource,
35 + .num_resources = 1,
36 +};
37 +
38 struct ssb_sflash_tbl_e {
39 char *name;
40 u32 id;
41 @@ -16,7 +29,7 @@ struct ssb_sflash_tbl_e {
42 u16 numblocks;
43 };
44
45 -static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
46 +static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
47 { "M25P20", 0x11, 0x10000, 4, },
48 { "M25P40", 0x12, 0x10000, 8, },
49
50 @@ -27,7 +40,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
51 { 0 },
52 };
53
54 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
55 +static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
56 { "SST25WF512", 1, 0x1000, 16, },
57 { "SST25VF512", 0x48, 0x1000, 16, },
58 { "SST25WF010", 2, 0x1000, 32, },
59 @@ -45,7 +58,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
60 { 0 },
61 };
62
63 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
64 +static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
65 { "AT45DB011", 0xc, 256, 512, },
66 { "AT45DB021", 0x14, 256, 1024, },
67 { "AT45DB041", 0x1c, 256, 2048, },
68 @@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
69 /* Initialize serial flash access */
70 int ssb_sflash_init(struct ssb_chipcommon *cc)
71 {
72 - struct ssb_sflash_tbl_e *e;
73 + struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
74 + const struct ssb_sflash_tbl_e *e;
75 u32 id, id2;
76
77 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
78 @@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
79 return -ENOTSUPP;
80 }
81
82 - pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
83 - e->name, e->blocksize, e->numblocks);
84 -
85 - pr_err("Serial flash support is not implemented yet!\n");
86 + sflash->window = SSB_FLASH2;
87 + sflash->blocksize = e->blocksize;
88 + sflash->numblocks = e->numblocks;
89 + sflash->size = sflash->blocksize * sflash->numblocks;
90 + sflash->present = true;
91 +
92 + pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
93 + e->name, sflash->size / 1024, e->blocksize, e->numblocks);
94 +
95 + /* Prepare platform device, but don't register it yet. It's too early,
96 + * malloc (required by device_private_init) is not available yet. */
97 + ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
98 + sflash->size;
99 + ssb_sflash_dev.dev.platform_data = sflash;
100
101 - return -ENOTSUPP;
102 + return 0;
103 }
104 --- a/drivers/ssb/main.c
105 +++ b/drivers/ssb/main.c
106 @@ -553,6 +553,14 @@ static int ssb_devices_register(struct s
107 }
108 #endif
109
110 +#ifdef CONFIG_SSB_SFLASH
111 + if (bus->mipscore.sflash.present) {
112 + err = platform_device_register(&ssb_sflash_dev);
113 + if (err)
114 + pr_err("Error registering serial flash\n");
115 + }
116 +#endif
117 +
118 return 0;
119 error:
120 /* Unwind the already registered devices. */
121 --- a/drivers/ssb/pcihost_wrapper.c
122 +++ b/drivers/ssb/pcihost_wrapper.c
123 @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
124 struct ssb_bus *ssb = pci_get_drvdata(dev);
125 int err;
126
127 - pci_set_power_state(dev, 0);
128 + pci_set_power_state(dev, PCI_D0);
129 err = pci_enable_device(dev);
130 if (err)
131 return err;
132 --- a/drivers/ssb/sprom.c
133 +++ b/drivers/ssb/sprom.c
134 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
135 while (cnt < sprom_size_words) {
136 memcpy(tmp, dump, 4);
137 dump += 4;
138 - err = strict_strtoul(tmp, 16, &parsed);
139 + err = kstrtoul(tmp, 16, &parsed);
140 if (err)
141 return err;
142 sprom[cnt++] = swab16((u16)parsed);
143 --- a/drivers/ssb/ssb_private.h
144 +++ b/drivers/ssb/ssb_private.h
145 @@ -243,6 +243,10 @@ static inline int ssb_sflash_init(struct
146 extern struct platform_device ssb_pflash_dev;
147 #endif
148
149 +#ifdef CONFIG_SSB_SFLASH
150 +extern struct platform_device ssb_sflash_dev;
151 +#endif
152 +
153 #ifdef CONFIG_SSB_DRIVER_EXTIF
154 extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
155 extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
156 --- a/include/linux/ssb/ssb_driver_mips.h
157 +++ b/include/linux/ssb/ssb_driver_mips.h
158 @@ -20,6 +20,18 @@ struct ssb_pflash {
159 u32 window_size;
160 };
161
162 +#ifdef CONFIG_SSB_SFLASH
163 +struct ssb_sflash {
164 + bool present;
165 + u32 window;
166 + u32 blocksize;
167 + u16 numblocks;
168 + u32 size;
169 +
170 + void *priv;
171 +};
172 +#endif
173 +
174 struct ssb_mipscore {
175 struct ssb_device *dev;
176
177 @@ -27,6 +39,9 @@ struct ssb_mipscore {
178 struct ssb_serial_port serial_ports[4];
179
180 struct ssb_pflash pflash;
181 +#ifdef CONFIG_SSB_SFLASH
182 + struct ssb_sflash sflash;
183 +#endif
184 };
185
186 extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
187 --- a/include/linux/ssb/ssb_regs.h
188 +++ b/include/linux/ssb/ssb_regs.h
189 @@ -172,6 +172,7 @@
190 #define SSB_SPROMSIZE_WORDS_R4 220
191 #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
192 #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
193 +#define SSB_SPROMSIZE_WORDS_R10 230
194 #define SSB_SPROM_BASE1 0x1000
195 #define SSB_SPROM_BASE31 0x0800
196 #define SSB_SPROM_REVISION 0x007E