target/linux/generic/patches-3.10/772-bgmac-add-supprot-for-BCM4707.patch

   1 From 2e3759f95d3c96282c19e6f57274d816c6cf1a0e Mon Sep 17 00:00:00 2001
   2 From: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date: Sun, 10 Nov 2013 21:13:20 +0100
   4 Subject: [PATCH 4/5] bgmac: reset all cores on Northstar SoC
   5
   6 On the Northstar SoC (BCM4707 and BCM53018) we have to enable all GMAC
   7 cores when we just want to use on. We iterate over all the cores and
   8 activate them.
   9
  10 Subject: [PATCH 5/5] bgmac: add support for Northstar SoC (BCM4707, BCM53018)
  11
  12 This adds support for the Northstar SoC. This SoC does not have a PMU in
  13 bcma and no register on it should be called. In addition it support 2.5
  14 GBit/s Ethernet to the PHY.
  15
  16 This GMAC core is not fully working there are still problems with the
  17 DMA controller.
  18
  19 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  20
  21 --- a/drivers/net/ethernet/broadcom/bgmac.c
  22 +++ b/drivers/net/ethernet/broadcom/bgmac.c
  23 @@ -825,6 +825,9 @@ static void bgmac_mac_speed(struct bgmac
  24         case SPEED_1000:
  25                 set |= BGMAC_CMDCFG_ES_1000;
  26                 break;
  27 +       case SPEED_2500:
  28 +               set |= BGMAC_CMDCFG_ES_2500;
  29 +               break;
  30         default:
  31                 bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
  32         }
  33 @@ -837,12 +840,26 @@ static void bgmac_mac_speed(struct bgmac
  34
  35  static void bgmac_miiconfig(struct bgmac *bgmac)
  36  {
  37 -       u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
  38 -                       BGMAC_DS_MM_SHIFT;
  39 -       if (imode == 0 || imode == 1) {
  40 -               bgmac->mac_speed = SPEED_100;
  41 +       struct bcma_device *core = bgmac->core;
  42 +       struct bcma_chipinfo *ci = &core->bus->chipinfo;
  43 +       u8 imode;
  44 +
  45 +       if (ci->id == BCMA_CHIP_ID_BCM4707 ||
  46 +           ci->id == BCMA_CHIP_ID_BCM53018) {
  47 +               bcma_awrite32(core, BCMA_IOCTL,
  48 +                             bcma_aread32(core, BCMA_IOCTL) | 0x40 |
  49 +                             BGMAC_BCMA_IOCTL_SW_CLKEN);
  50 +               bgmac->mac_speed = SPEED_2500;
  51                 bgmac->mac_duplex = DUPLEX_FULL;
  52                 bgmac_mac_speed(bgmac);
  53 +       } else {
  54 +               imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
  55 +                       BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
  56 +               if (imode == 0 || imode == 1) {
  57 +                       bgmac->mac_speed = SPEED_100;
  58 +                       bgmac->mac_duplex = DUPLEX_FULL;
  59 +                       bgmac_mac_speed(bgmac);
  60 +               }
  61         }
  62  }
  63
  64 @@ -886,9 +903,14 @@ static void bgmac_chip_reset(struct bgma
  65                         flags |= BGMAC_BCMA_IOCTL_SW_RESET;
  66         }
  67
  68 -       bcma_core_enable(core, flags);
  69 -
  70 -       if (core->id.rev > 2) {
  71 +       /* 3GMAC: for BCM4707, only do core reset at bgmac_probe() */
  72 +       if (ci->id != BCMA_CHIP_ID_BCM4707)
  73 +               bcma_core_enable(core, flags);
  74 +
  75 +       /* Request Misc PLL for corerev > 2 */
  76 +       if (core->id.rev > 2 &&
  77 +           ci->id != BCMA_CHIP_ID_BCM4707 &&
  78 +           ci->id != BCMA_CHIP_ID_BCM53018) {
  79                 bgmac_set(bgmac, BCMA_CLKCTLST,
  80                           BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
  81                 bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
  82 @@ -1026,12 +1048,16 @@ static void bgmac_enable(struct bgmac *b
  83                 break;
  84         }
  85
  86 -       rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
  87 -       rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
  88 -       bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
  89 -       mdp = (bp_clk * 128 / 1000) - 3;
  90 -       rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
  91 -       bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
  92 +       if (ci->id != BCMA_CHIP_ID_BCM4707 &&
  93 +           ci->id != BCMA_CHIP_ID_BCM53018) {
  94 +               rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
  95 +               rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
  96 +               bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
  97 +                               1000000;
  98 +               mdp = (bp_clk * 128 / 1000) - 3;
  99 +               rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
 100 +               bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
 101 +       }
 102  }
 103
 104  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
 105 @@ -1366,6 +1392,7 @@ static int bgmac_probe(struct bcma_devic
 106         struct bgmac *bgmac;
 107         struct ssb_sprom *sprom = &core->bus->sprom;
 108         u8 *mac = core->core_unit ? sprom->et1mac : sprom->et0mac;
 109 +       struct bcma_chipinfo *ci = &core->bus->chipinfo;
 110         int err;
 111
 112         /* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
 113 @@ -1404,8 +1431,16 @@ static int bgmac_probe(struct bcma_devic
 114         }
 115         bgmac->cmn = core->bus->drv_gmac_cmn.core;
 116
 117 -       bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
 118 -                        sprom->et0phyaddr;
 119 +       /*
 120 +        * Too much can go wrong in scanning MDC/MDIO playing "whos my phy?" .
 121 +        * Instead, explicitly use the phy address 30.
 122 +        */
 123 +       if (ci->id == BCMA_CHIP_ID_BCM4707 || ci->id == BCMA_CHIP_ID_BCM53018)
 124 +               bgmac->phyaddr = BGMAC_PHY_NOREGS;
 125 +       else
 126 +               bgmac->phyaddr = core->core_unit ? sprom->et1phyaddr :
 127 +                                sprom->et0phyaddr;
 128 +
 129         bgmac->phyaddr &= BGMAC_PHY_MASK;
 130         if (bgmac->phyaddr == BGMAC_PHY_MASK) {
 131                 bgmac_err(bgmac, "No PHY found\n");
 132 @@ -1423,6 +1458,27 @@ static int bgmac_probe(struct bcma_devic
 133
 134         bgmac_chip_reset(bgmac);
 135
 136 +       /* For Northstar, we have to take all GMAC core out of reset */
 137 +       if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
 138 +           core->id.id == BCMA_CHIP_ID_BCM53018) {
 139 +               struct bcma_device *ns_core;
 140 +               int ns_gmac;
 141 +
 142 +               /* Northstar has 4 GMAC cores */
 143 +               for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
 144 +                       /* As northstar requirement, we have to reset all GAMCs
 145 +                        * before accessing one. bgmac_chip_reset() call
 146 +                        * bcma_core_enable() for this core. Then the other
 147 +                        * three GAMCs didn't reset.  We do it here.
 148 +                        */
 149 +                       ns_core = bcma_find_core_unit(core->bus,
 150 +                                                     BCMA_CORE_MAC_GBIT,
 151 +                                                     ns_gmac);
 152 +                       if (ns_core && !bcma_core_is_enabled(ns_core))
 153 +                               bcma_core_enable(ns_core, 0);
 154 +               }
 155 +       }
 156 +
 157         err = bgmac_dma_alloc(bgmac);
 158         if (err) {
 159                 bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
 160 --- a/drivers/net/ethernet/broadcom/bgmac.h
 161 +++ b/drivers/net/ethernet/broadcom/bgmac.h
 162 @@ -189,6 +189,7 @@
 163  #define   BGMAC_CMDCFG_ES_10                   0x00000000
 164  #define   BGMAC_CMDCFG_ES_100                  0x00000004
 165  #define   BGMAC_CMDCFG_ES_1000                 0x00000008
 166 +#define   BGMAC_CMDCFG_ES_2500                 0x0000000C
 167  #define  BGMAC_CMDCFG_PROM                     0x00000010      /* Set to activate promiscuous mode */
 168  #define  BGMAC_CMDCFG_PAD_EN                   0x00000020
 169  #define  BGMAC_CMDCFG_CF                       0x00000040