kernel/3.1[02]: move MTD root device setup code to mtdcore
[openwrt/svn-archive/archive.git] / target / linux / generic / patches-3.10 / 810-pci_disable_common_quirks.patch
1 --- a/drivers/pci/Kconfig
2 +++ b/drivers/pci/Kconfig
3 @@ -63,6 +63,12 @@ config XEN_PCIDEV_FRONTEND
4 The PCI device frontend driver allows the kernel to import arbitrary
5 PCI devices from a PCI backend to support PCI driver domains.
6
7 +config PCI_DISABLE_COMMON_QUIRKS
8 + bool "PCI disable common quirks"
9 + depends on PCI
10 + help
11 + If you don't know what to do here, say N.
12 +
13 config HT_IRQ
14 bool "Interrupts on hypertransport devices"
15 default y
16 --- a/drivers/pci/quirks.c
17 +++ b/drivers/pci/quirks.c
18 @@ -44,6 +44,7 @@ static void quirk_mmio_always_on(struct
19 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
20 PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
21
22 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
23 /* The Mellanox Tavor device gives false positive parity errors
24 * Mark this device with a broken_parity_status, to allow
25 * PCI scanning code to "skip" this now blacklisted device.
26 @@ -2866,6 +2867,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
27 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
28 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
29
30 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
31
32 static ktime_t fixup_debug_start(struct pci_dev *dev,
33 void (*fn)(struct pci_dev *dev))
34 @@ -2897,6 +2899,8 @@ static void fixup_debug_report(struct pc
35 }
36 }
37
38 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
39 +
40 /*
41 * Some BIOS implementations leave the Intel GPU interrupts enabled,
42 * even though no one is handling them (f.e. i915 driver is never loaded).
43 @@ -2931,6 +2935,8 @@ static void disable_igfx_irq(struct pci_
44 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
45 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
46
47 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
48 +
49 /*
50 * Some devices may pass our check in pci_intx_mask_supported if
51 * PCI_COMMAND_INTX_DISABLE works though they actually do not properly