target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch

   1 From 2c58080407554e1bac8fd50d23cb02420524caed Mon Sep 17 00:00:00 2001
   2 From: Felix Fietkau <nbd@openwrt.org>
   3 Date: Mon, 12 Aug 2013 12:50:22 +0200
   4 Subject: [PATCH] MIPS: partially inline dma ops
   5
   6 Several DMA ops are no-op on many platforms, and the indirection through
   7 the mips_dma_map_ops function table is causing the compiler to emit
   8 unnecessary code.
   9
  10 Inlining visibly improves network performance in my tests (on a 24Kc
  11 based system), and also slightly reduces code size of a few drivers.
  12
  13 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  14 ---
  15  arch/mips/Kconfig                   |   4 +
  16  arch/mips/include/asm/dma-mapping.h | 360 +++++++++++++++++++++++++++++++++++-
  17  arch/mips/mm/dma-default.c          | 163 ++--------------
  18  3 files changed, 373 insertions(+), 154 deletions(-)
  19
  20 --- a/arch/mips/Kconfig
  21 +++ b/arch/mips/Kconfig
  22 @@ -1377,6 +1377,7 @@ config CPU_CAVIUM_OCTEON
  23         select LIBFDT
  24         select USE_OF
  25         select USB_EHCI_BIG_ENDIAN_MMIO
  26 +       select SYS_HAS_DMA_OPS
  27         help
  28           The Cavium Octeon processor is a highly integrated chip containing
  29           many ethernet hardware widgets for networking tasks. The processor
  30 @@ -1599,6 +1600,9 @@ config SYS_HAS_CPU_XLR
  31  config SYS_HAS_CPU_XLP
  32         bool
  33
  34 +config SYS_HAS_DMA_OPS
  35 +       bool
  36 +
  37  #
  38  # CPU may reorder R->R, R->W, W->R, W->W
  39  # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
  40 --- a/arch/mips/include/asm/dma-mapping.h
  41 +++ b/arch/mips/include/asm/dma-mapping.h
  42 @@ -1,9 +1,16 @@
  43  #ifndef _ASM_DMA_MAPPING_H
  44  #define _ASM_DMA_MAPPING_H
  45
  46 +#include <linux/kmemcheck.h>
  47 +#include <linux/bug.h>
  48 +#include <linux/scatterlist.h>
  49 +#include <linux/dma-debug.h>
  50 +#include <linux/dma-attrs.h>
  51 +
  52  #include <asm/scatterlist.h>
  53  #include <asm/dma-coherence.h>
  54  #include <asm/cache.h>
  55 +#include <asm/cpu-type.h>
  56  #include <asm-generic/dma-coherent.h>
  57
  58  #ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
  59 @@ -12,12 +19,48 @@
  60
  61  extern struct dma_map_ops *mips_dma_map_ops;
  62
  63 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
  64 +               enum dma_data_direction direction);
  65 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
  66 +                             dma_addr_t *dma_handle, gfp_t gfp,
  67 +                             struct dma_attrs *attrs);
  68 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  69 +                           dma_addr_t dma_handle, struct dma_attrs *attrs);
  70 +
  71  static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  72  {
  73 +#ifdef CONFIG_SYS_HAS_DMA_OPS
  74         if (dev && dev->archdata.dma_ops)
  75                 return dev->archdata.dma_ops;
  76         else
  77                 return mips_dma_map_ops;
  78 +#else
  79 +       return NULL;
  80 +#endif
  81 +}
  82 +
  83 +/*
  84 + * Warning on the terminology - Linux calls an uncached area coherent;
  85 + * MIPS terminology calls memory areas with hardware maintained coherency
  86 + * coherent.
  87 + */
  88 +
  89 +static inline int cpu_needs_post_dma_flush(struct device *dev)
  90 +{
  91 +#ifndef CONFIG_SYS_HAS_CPU_R10000
  92 +       return 0;
  93 +#endif
  94 +       return !plat_device_is_coherent(dev) &&
  95 +              (boot_cpu_type() == CPU_R10000 ||
  96 +               boot_cpu_type() == CPU_R12000 ||
  97 +               boot_cpu_type() == CPU_BMIPS5000);
  98 +}
  99 +
 100 +static inline struct page *dma_addr_to_page(struct device *dev,
 101 +       dma_addr_t dma_addr)
 102 +{
 103 +       return pfn_to_page(
 104 +               plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
 105  }
 106
 107  static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
 108 @@ -30,12 +73,312 @@ static inline bool dma_capable(struct de
 109
 110  static inline void dma_mark_clean(void *addr, size_t size) {}
 111
 112 -#include <asm-generic/dma-mapping-common.h>
 113 +static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
 114 +                                             size_t size,
 115 +                                             enum dma_data_direction dir,
 116 +                                             struct dma_attrs *attrs)
 117 +{
 118 +       struct dma_map_ops *ops = get_dma_ops(dev);
 119 +       unsigned long offset = (unsigned long)ptr & ~PAGE_MASK;
 120 +       struct page *page = virt_to_page(ptr);
 121 +       dma_addr_t addr;
 122 +
 123 +       kmemcheck_mark_initialized(ptr, size);
 124 +       BUG_ON(!valid_dma_direction(dir));
 125 +       if (ops) {
 126 +               addr = ops->map_page(dev, page, offset, size, dir, attrs);
 127 +       } else {
 128 +               if (!plat_device_is_coherent(dev))
 129 +                       __dma_sync(page, offset, size, dir);
 130 +
 131 +               addr = plat_map_dma_mem_page(dev, page) + offset;
 132 +       }
 133 +       debug_dma_map_page(dev, page, offset, size, dir, addr, true);
 134 +       return addr;
 135 +}
 136 +
 137 +static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
 138 +                                         size_t size,
 139 +                                         enum dma_data_direction dir,
 140 +                                         struct dma_attrs *attrs)
 141 +{
 142 +       struct dma_map_ops *ops = get_dma_ops(dev);
 143 +
 144 +       BUG_ON(!valid_dma_direction(dir));
 145 +       if (ops) {
 146 +               ops->unmap_page(dev, addr, size, dir, attrs);
 147 +       } else {
 148 +               if (cpu_needs_post_dma_flush(dev))
 149 +                       __dma_sync(dma_addr_to_page(dev, addr),
 150 +                                  addr & ~PAGE_MASK, size, dir);
 151 +
 152 +               plat_unmap_dma_mem(dev, addr, size, dir);
 153 +       }
 154 +       debug_dma_unmap_page(dev, addr, size, dir, true);
 155 +}
 156 +
 157 +static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
 158 +                                  int nents, enum dma_data_direction dir,
 159 +                                  struct dma_attrs *attrs)
 160 +{
 161 +       struct dma_map_ops *ops = get_dma_ops(dev);
 162 +       int i, ents;
 163 +       struct scatterlist *s;
 164 +
 165 +       for_each_sg(sg, s, nents, i)
 166 +               kmemcheck_mark_initialized(sg_virt(s), s->length);
 167 +       BUG_ON(!valid_dma_direction(dir));
 168 +       if (ops) {
 169 +               ents = ops->map_sg(dev, sg, nents, dir, attrs);
 170 +       } else {
 171 +               for_each_sg(sg, s, nents, i) {
 172 +                       struct page *page = sg_page(s);
 173 +
 174 +                       if (!plat_device_is_coherent(dev))
 175 +                               __dma_sync(page, s->offset, s->length, dir);
 176 +#ifdef CONFIG_NEED_SG_DMA_LENGTH
 177 +                       s->dma_length = s->length;
 178 +#endif
 179 +                       s->dma_address =
 180 +                               plat_map_dma_mem_page(dev, page) + s->offset;
 181 +               }
 182 +               ents = nents;
 183 +       }
 184 +       debug_dma_map_sg(dev, sg, nents, ents, dir);
 185 +
 186 +       return ents;
 187 +}
 188 +
 189 +static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
 190 +                                     int nents, enum dma_data_direction dir,
 191 +                                     struct dma_attrs *attrs)
 192 +{
 193 +       struct dma_map_ops *ops = get_dma_ops(dev);
 194 +       struct scatterlist *s;
 195 +       int i;
 196 +
 197 +       BUG_ON(!valid_dma_direction(dir));
 198 +       debug_dma_unmap_sg(dev, sg, nents, dir);
 199 +       if (ops) {
 200 +               ops->unmap_sg(dev, sg, nents, dir, attrs);
 201 +               return;
 202 +       }
 203 +
 204 +       for_each_sg(sg, s, nents, i) {
 205 +               if (!plat_device_is_coherent(dev) && dir != DMA_TO_DEVICE)
 206 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 207 +               plat_unmap_dma_mem(dev, s->dma_address, s->length, dir);
 208 +       }
 209 +}
 210 +
 211 +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
 212 +                                     size_t offset, size_t size,
 213 +                                     enum dma_data_direction dir)
 214 +{
 215 +       struct dma_map_ops *ops = get_dma_ops(dev);
 216 +       dma_addr_t addr;
 217 +
 218 +       kmemcheck_mark_initialized(page_address(page) + offset, size);
 219 +       BUG_ON(!valid_dma_direction(dir));
 220 +       if (ops) {
 221 +               addr = ops->map_page(dev, page, offset, size, dir, NULL);
 222 +       } else {
 223 +               if (!plat_device_is_coherent(dev))
 224 +                       __dma_sync(page, offset, size, dir);
 225 +
 226 +               addr = plat_map_dma_mem_page(dev, page) + offset;
 227 +       }
 228 +       debug_dma_map_page(dev, page, offset, size, dir, addr, false);
 229 +
 230 +       return addr;
 231 +}
 232 +
 233 +static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
 234 +                                 size_t size, enum dma_data_direction dir)
 235 +{
 236 +       struct dma_map_ops *ops = get_dma_ops(dev);
 237 +
 238 +       BUG_ON(!valid_dma_direction(dir));
 239 +       if (ops) {
 240 +               ops->unmap_page(dev, addr, size, dir, NULL);
 241 +       } else {
 242 +               if (cpu_needs_post_dma_flush(dev))
 243 +                       __dma_sync(dma_addr_to_page(dev, addr),
 244 +                                  addr & ~PAGE_MASK, size, dir);
 245 +
 246 +               plat_unmap_dma_mem(dev, addr, size, dir);
 247 +       }
 248 +       debug_dma_unmap_page(dev, addr, size, dir, false);
 249 +}
 250 +
 251 +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
 252 +                                          size_t size,
 253 +                                          enum dma_data_direction dir)
 254 +{
 255 +       struct dma_map_ops *ops = get_dma_ops(dev);
 256 +
 257 +       BUG_ON(!valid_dma_direction(dir));
 258 +       if (ops)
 259 +               ops->sync_single_for_cpu(dev, addr, size, dir);
 260 +       else if (cpu_needs_post_dma_flush(dev))
 261 +               __dma_sync(dma_addr_to_page(dev, addr),
 262 +                          addr & ~PAGE_MASK, size, dir);
 263 +       debug_dma_sync_single_for_cpu(dev, addr, size, dir);
 264 +}
 265 +
 266 +static inline void dma_sync_single_for_device(struct device *dev,
 267 +                                             dma_addr_t addr, size_t size,
 268 +                                             enum dma_data_direction dir)
 269 +{
 270 +       struct dma_map_ops *ops = get_dma_ops(dev);
 271 +
 272 +       BUG_ON(!valid_dma_direction(dir));
 273 +       if (ops)
 274 +               ops->sync_single_for_device(dev, addr, size, dir);
 275 +       else if (!plat_device_is_coherent(dev))
 276 +               __dma_sync(dma_addr_to_page(dev, addr),
 277 +                          addr & ~PAGE_MASK, size, dir);
 278 +       debug_dma_sync_single_for_device(dev, addr, size, dir);
 279 +}
 280 +
 281 +static inline void dma_sync_single_range_for_cpu(struct device *dev,
 282 +                                                dma_addr_t addr,
 283 +                                                unsigned long offset,
 284 +                                                size_t size,
 285 +                                                enum dma_data_direction dir)
 286 +{
 287 +       const struct dma_map_ops *ops = get_dma_ops(dev);
 288 +
 289 +       BUG_ON(!valid_dma_direction(dir));
 290 +       if (ops)
 291 +               ops->sync_single_for_cpu(dev, addr + offset, size, dir);
 292 +       else if (cpu_needs_post_dma_flush(dev))
 293 +               __dma_sync(dma_addr_to_page(dev, addr + offset),
 294 +                          (addr + offset) & ~PAGE_MASK, size, dir);
 295 +       debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
 296 +}
 297 +
 298 +static inline void dma_sync_single_range_for_device(struct device *dev,
 299 +                                                   dma_addr_t addr,
 300 +                                                   unsigned long offset,
 301 +                                                   size_t size,
 302 +                                                   enum dma_data_direction dir)
 303 +{
 304 +       const struct dma_map_ops *ops = get_dma_ops(dev);
 305 +
 306 +       BUG_ON(!valid_dma_direction(dir));
 307 +       if (ops)
 308 +               ops->sync_single_for_device(dev, addr + offset, size, dir);
 309 +       else if (!plat_device_is_coherent(dev))
 310 +               __dma_sync(dma_addr_to_page(dev, addr + offset),
 311 +                          (addr + offset) & ~PAGE_MASK, size, dir);
 312 +       debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
 313 +}
 314 +
 315 +static inline void
 316 +dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 317 +                   int nelems, enum dma_data_direction dir)
 318 +{
 319 +       struct dma_map_ops *ops = get_dma_ops(dev);
 320 +       struct scatterlist *s;
 321 +       int i;
 322 +
 323 +       BUG_ON(!valid_dma_direction(dir));
 324 +       if (ops)
 325 +               ops->sync_sg_for_cpu(dev, sg, nelems, dir);
 326 +       else if (cpu_needs_post_dma_flush(dev)) {
 327 +               for_each_sg(sg, s, nelems, i)
 328 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 329 +       }
 330 +       debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
 331 +}
 332 +
 333 +static inline void
 334 +dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 335 +                      int nelems, enum dma_data_direction dir)
 336 +{
 337 +       struct dma_map_ops *ops = get_dma_ops(dev);
 338 +       struct scatterlist *s;
 339 +       int i;
 340 +
 341 +       BUG_ON(!valid_dma_direction(dir));
 342 +       if (ops)
 343 +               ops->sync_sg_for_device(dev, sg, nelems, dir);
 344 +       else if (!plat_device_is_coherent(dev)) {
 345 +               for_each_sg(sg, s, nelems, i)
 346 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 347 +       }
 348 +       debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
 349 +
 350 +}
 351 +
 352 +#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
 353 +#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
 354 +#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
 355 +#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
 356 +
 357 +extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
 358 +                          void *cpu_addr, dma_addr_t dma_addr, size_t size);
 359 +
 360 +/**
 361 + * dma_mmap_attrs - map a coherent DMA allocation into user space
 362 + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 363 + * @vma: vm_area_struct describing requested user mapping
 364 + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
 365 + * @handle: device-view address returned from dma_alloc_attrs
 366 + * @size: size of memory originally requested in dma_alloc_attrs
 367 + * @attrs: attributes of mapping properties requested in dma_alloc_attrs
 368 + *
 369 + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
 370 + * into user space.  The coherent DMA buffer must not be freed by the
 371 + * driver until the user space mapping has been released.
 372 + */
 373 +static inline int
 374 +dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
 375 +              dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
 376 +{
 377 +       struct dma_map_ops *ops = get_dma_ops(dev);
 378 +       BUG_ON(!ops);
 379 +       if (ops && ops->mmap)
 380 +               return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 381 +       return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
 382 +}
 383 +
 384 +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
 385 +
 386 +static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
 387 +                     void *cpu_addr, dma_addr_t dma_addr, size_t size)
 388 +{
 389 +       DEFINE_DMA_ATTRS(attrs);
 390 +       dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 391 +       return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
 392 +}
 393 +
 394 +int
 395 +dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
 396 +                      void *cpu_addr, dma_addr_t dma_addr, size_t size);
 397 +
 398 +static inline int
 399 +dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
 400 +                     dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
 401 +{
 402 +       struct dma_map_ops *ops = get_dma_ops(dev);
 403 +       BUG_ON(!ops);
 404 +       if (ops && ops->get_sgtable)
 405 +               return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
 406 +                                       attrs);
 407 +       return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
 408 +}
 409 +
 410 +#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, NULL)
 411 +
 412
 413  static inline int dma_supported(struct device *dev, u64 mask)
 414  {
 415         struct dma_map_ops *ops = get_dma_ops(dev);
 416 -       return ops->dma_supported(dev, mask);
 417 +       if (ops)
 418 +               return ops->dma_supported(dev, mask);
 419 +       return plat_dma_supported(dev, mask);
 420  }
 421
 422  static inline int dma_mapping_error(struct device *dev, u64 mask)
 423 @@ -43,7 +386,9 @@ static inline int dma_mapping_error(stru
 424         struct dma_map_ops *ops = get_dma_ops(dev);
 425
 426         debug_dma_mapping_error(dev, mask);
 427 -       return ops->mapping_error(dev, mask);
 428 +       if (ops)
 429 +               return ops->mapping_error(dev, mask);
 430 +       return 0;
 431  }
 432
 433  static inline int
 434 @@ -69,7 +414,11 @@ static inline void *dma_alloc_attrs(stru
 435         void *ret;
 436         struct dma_map_ops *ops = get_dma_ops(dev);
 437
 438 -       ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
 439 +       if (ops)
 440 +               ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
 441 +       else
 442 +               ret = mips_dma_alloc_coherent(dev, size, dma_handle, gfp,
 443 +                                             attrs);
 444
 445         debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
 446
 447 @@ -84,7 +433,10 @@ static inline void dma_free_attrs(struct
 448  {
 449         struct dma_map_ops *ops = get_dma_ops(dev);
 450
 451 -       ops->free(dev, size, vaddr, dma_handle, attrs);
 452 +       if (ops)
 453 +               ops->free(dev, size, vaddr, dma_handle, attrs);
 454 +       else
 455 +               mips_dma_free_coherent(dev, size, vaddr, dma_handle, attrs);
 456
 457         debug_dma_free_coherent(dev, size, vaddr, dma_handle);
 458  }
 459 --- a/arch/mips/mm/dma-default.c
 460 +++ b/arch/mips/mm/dma-default.c
 461 @@ -25,7 +25,7 @@
 462
 463  #ifdef CONFIG_DMA_MAYBE_COHERENT
 464  int coherentio = 0;    /* User defined DMA coherency from command line. */
 465 -EXPORT_SYMBOL_GPL(coherentio);
 466 +EXPORT_SYMBOL(coherentio);
 467  int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
 468
 469  static int __init setcoherentio(char *str)
 470 @@ -45,30 +45,6 @@ static int __init setnocoherentio(char *
 471  early_param("nocoherentio", setnocoherentio);
 472  #endif
 473
 474 -static inline struct page *dma_addr_to_page(struct device *dev,
 475 -       dma_addr_t dma_addr)
 476 -{
 477 -       return pfn_to_page(
 478 -               plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
 479 -}
 480 -
 481 -/*
 482 - * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
 483 - * speculatively fill random cachelines with stale data at any time,
 484 - * requiring an extra flush post-DMA.
 485 - *
 486 - * Warning on the terminology - Linux calls an uncached area coherent;
 487 - * MIPS terminology calls memory areas with hardware maintained coherency
 488 - * coherent.
 489 - */
 490 -static inline int cpu_needs_post_dma_flush(struct device *dev)
 491 -{
 492 -       return !plat_device_is_coherent(dev) &&
 493 -              (boot_cpu_type() == CPU_R10000 ||
 494 -               boot_cpu_type() == CPU_R12000 ||
 495 -               boot_cpu_type() == CPU_BMIPS5000);
 496 -}
 497 -
 498  static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
 499  {
 500         gfp_t dma_flag;
 501 @@ -124,8 +100,9 @@ void *dma_alloc_noncoherent(struct devic
 502  }
 503  EXPORT_SYMBOL(dma_alloc_noncoherent);
 504
 505 -static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 506 -       dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
 507 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 508 +                             dma_addr_t *dma_handle, gfp_t gfp,
 509 +                             struct dma_attrs *attrs)
 510  {
 511         void *ret;
 512
 513 @@ -149,6 +126,7 @@ static void *mips_dma_alloc_coherent(str
 514
 515         return ret;
 516  }
 517 +EXPORT_SYMBOL(mips_dma_alloc_coherent);
 518
 519
 520  void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 521 @@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device
 522  }
 523  EXPORT_SYMBOL(dma_free_noncoherent);
 524
 525 -static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 526 -       dma_addr_t dma_handle, struct dma_attrs *attrs)
 527 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 528 +                           dma_addr_t dma_handle, struct dma_attrs *attrs)
 529  {
 530         unsigned long addr = (unsigned long) vaddr;
 531         int order = get_order(size);
 532 @@ -175,6 +153,7 @@ static void mips_dma_free_coherent(struc
 533
 534         free_pages(addr, get_order(size));
 535  }
 536 +EXPORT_SYMBOL(mips_dma_free_coherent);
 537
 538  static inline void __dma_sync_virtual(void *addr, size_t size,
 539         enum dma_data_direction direction)
 540 @@ -203,8 +182,8 @@ static inline void __dma_sync_virtual(vo
 541   * If highmem is not configured then the bulk of this loop gets
 542   * optimized out.
 543   */
 544 -static inline void __dma_sync(struct page *page,
 545 -       unsigned long offset, size_t size, enum dma_data_direction direction)
 546 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
 547 +               enum dma_data_direction direction)
 548  {
 549         size_t left = size;
 550
 551 @@ -233,108 +212,7 @@ static inline void __dma_sync(struct pag
 552                 left -= len;
 553         } while (left);
 554  }
 555 -
 556 -static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
 557 -       size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
 558 -{
 559 -       if (cpu_needs_post_dma_flush(dev))
 560 -               __dma_sync(dma_addr_to_page(dev, dma_addr),
 561 -                          dma_addr & ~PAGE_MASK, size, direction);
 562 -
 563 -       plat_unmap_dma_mem(dev, dma_addr, size, direction);
 564 -}
 565 -
 566 -static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
 567 -       int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
 568 -{
 569 -       int i;
 570 -
 571 -       for (i = 0; i < nents; i++, sg++) {
 572 -               if (!plat_device_is_coherent(dev))
 573 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 574 -                                  direction);
 575 -#ifdef CONFIG_NEED_SG_DMA_LENGTH
 576 -               sg->dma_length = sg->length;
 577 -#endif
 578 -               sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
 579 -                                 sg->offset;
 580 -       }
 581 -
 582 -       return nents;
 583 -}
 584 -
 585 -static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
 586 -       unsigned long offset, size_t size, enum dma_data_direction direction,
 587 -       struct dma_attrs *attrs)
 588 -{
 589 -       if (!plat_device_is_coherent(dev))
 590 -               __dma_sync(page, offset, size, direction);
 591 -
 592 -       return plat_map_dma_mem_page(dev, page) + offset;
 593 -}
 594 -
 595 -static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
 596 -       int nhwentries, enum dma_data_direction direction,
 597 -       struct dma_attrs *attrs)
 598 -{
 599 -       int i;
 600 -
 601 -       for (i = 0; i < nhwentries; i++, sg++) {
 602 -               if (!plat_device_is_coherent(dev) &&
 603 -                   direction != DMA_TO_DEVICE)
 604 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 605 -                                  direction);
 606 -               plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
 607 -       }
 608 -}
 609 -
 610 -static void mips_dma_sync_single_for_cpu(struct device *dev,
 611 -       dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 612 -{
 613 -       if (cpu_needs_post_dma_flush(dev))
 614 -               __dma_sync(dma_addr_to_page(dev, dma_handle),
 615 -                          dma_handle & ~PAGE_MASK, size, direction);
 616 -}
 617 -
 618 -static void mips_dma_sync_single_for_device(struct device *dev,
 619 -       dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 620 -{
 621 -       if (!plat_device_is_coherent(dev))
 622 -               __dma_sync(dma_addr_to_page(dev, dma_handle),
 623 -                          dma_handle & ~PAGE_MASK, size, direction);
 624 -}
 625 -
 626 -static void mips_dma_sync_sg_for_cpu(struct device *dev,
 627 -       struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 628 -{
 629 -       int i;
 630 -
 631 -       if (cpu_needs_post_dma_flush(dev))
 632 -               for (i = 0; i < nelems; i++, sg++)
 633 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 634 -                                  direction);
 635 -}
 636 -
 637 -static void mips_dma_sync_sg_for_device(struct device *dev,
 638 -       struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 639 -{
 640 -       int i;
 641 -
 642 -       if (!plat_device_is_coherent(dev))
 643 -               for (i = 0; i < nelems; i++, sg++)
 644 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 645 -                                  direction);
 646 -}
 647 -
 648 -int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 649 -{
 650 -       return 0;
 651 -}
 652 -
 653 -int mips_dma_supported(struct device *dev, u64 mask)
 654 -{
 655 -       return plat_dma_supported(dev, mask);
 656 -}
 657 +EXPORT_SYMBOL(__dma_sync);
 658
 659  void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 660                          enum dma_data_direction direction)
 661 @@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev,
 662
 663  EXPORT_SYMBOL(dma_cache_sync);
 664
 665 -static struct dma_map_ops mips_default_dma_map_ops = {
 666 -       .alloc = mips_dma_alloc_coherent,
 667 -       .free = mips_dma_free_coherent,
 668 -       .map_page = mips_dma_map_page,
 669 -       .unmap_page = mips_dma_unmap_page,
 670 -       .map_sg = mips_dma_map_sg,
 671 -       .unmap_sg = mips_dma_unmap_sg,
 672 -       .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
 673 -       .sync_single_for_device = mips_dma_sync_single_for_device,
 674 -       .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
 675 -       .sync_sg_for_device = mips_dma_sync_sg_for_device,
 676 -       .mapping_error = mips_dma_mapping_error,
 677 -       .dma_supported = mips_dma_supported
 678 -};
 679 -
 680 -struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
 681 +#ifdef CONFIG_SYS_HAS_DMA_OPS
 682 +struct dma_map_ops *mips_dma_map_ops = NULL;
 683  EXPORT_SYMBOL(mips_dma_map_ops);
 684 +#endif
 685
 686  #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
 687