kernel: fix DMA error when BCM4331 is connected to BCM4706
[openwrt/svn-archive/archive.git] / target / linux / generic / patches-3.6 / 026-bcma_pcie_up_down.patch
1 bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
2 called by b43 and brcmsmac
3
4 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
5
6 --- a/drivers/bcma/driver_pci.c
7 +++ b/drivers/bcma/driver_pci.c
8 @@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
9 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
10 }
11
12 -static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
13 +static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
14 {
15 u32 v;
16 int i;
17 @@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
18 }
19 }
20
21 -static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
22 +static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
23 {
24 int max_retries = 10;
25 u16 ret = 0;
26 @@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
27 return ret;
28 }
29
30 -static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
31 +static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
32 u8 address, u16 data)
33 {
34 int max_retries = 10;
35 @@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
36 pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
37 }
38
39 +static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
40 + u8 address, u16 data)
41 +{
42 + bcma_pcie_mdio_write(pc, device, address, data);
43 + return bcma_pcie_mdio_read(pc, device, address);
44 +}
45 +
46 /**************************************************
47 * Workarounds.
48 **************************************************/
49 @@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
50 }
51 }
52
53 +static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
54 +{
55 + u16 data;
56 +
57 + if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
58 + data = up ? 0x74 : 0x7C;
59 + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
60 + BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
61 + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
62 + BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
63 + } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
64 + data = up ? 0x75 : 0x7D;
65 + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
66 + BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
67 + bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
68 + BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
69 + }
70 +}
71 +
72 /**************************************************
73 * Init.
74 **************************************************/
75 @@ -262,7 +288,7 @@ out:
76 }
77 EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
78
79 -void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
80 +static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
81 {
82 u32 w;
83
84 @@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
85 bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
86 bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
87 }
88 -EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
89 +
90 +void bcma_core_pci_up(struct bcma_bus *bus)
91 +{
92 + struct bcma_drv_pci *pc;
93 +
94 + if (bus->hosttype != BCMA_HOSTTYPE_PCI)
95 + return;
96 +
97 + pc = &bus->drv_pci[0];
98 +
99 + bcma_core_pci_power_save(pc, true);
100 +
101 + bcma_core_pci_extend_L1timer(pc, true);
102 +
103 + if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
104 + bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
105 + pcie_set_readrq(bus->host_pci, 128);
106 + }
107 +}
108 +EXPORT_SYMBOL_GPL(bcma_core_pci_up);
109 +
110 +void bcma_core_pci_down(struct bcma_bus *bus)
111 +{
112 + struct bcma_drv_pci *pc;
113 +
114 + if (bus->hosttype != BCMA_HOSTTYPE_PCI)
115 + return;
116 +
117 + pc = &bus->drv_pci[0];
118 +
119 + bcma_core_pci_extend_L1timer(pc, false);
120 +
121 + bcma_core_pci_power_save(pc, false);
122 +}
123 +EXPORT_SYMBOL_GPL(bcma_core_pci_down);
124 --- a/include/linux/bcma/bcma_driver_pci.h
125 +++ b/include/linux/bcma/bcma_driver_pci.h
126 @@ -181,10 +181,31 @@ struct pci_dev;
127
128 #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
129
130 +#define BCMA_CORE_PCI_
131 +
132 +/* MDIO devices (SERDES modules) */
133 +#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
134 +#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
135 +#define BCMA_CORE_PCI_MDIO_BLK0 0x800
136 +#define BCMA_CORE_PCI_MDIO_BLK1 0x801
137 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
138 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
139 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
140 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
141 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
142 +#define BCMA_CORE_PCI_MDIO_BLK2 0x802
143 +#define BCMA_CORE_PCI_MDIO_BLK3 0x803
144 +#define BCMA_CORE_PCI_MDIO_BLK4 0x804
145 +#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
146 +#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
147 +#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
148 +#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
149 +
150 /* PCIE Root Capability Register bits (Host mode only) */
151 #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
152
153 struct bcma_drv_pci;
154 +struct bcma_bus;
155
156 #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
157 struct bcma_drv_pci_host {
158 @@ -219,7 +240,8 @@ struct bcma_drv_pci {
159 extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
160 extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
161 struct bcma_device *core, bool enable);
162 -extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
163 +extern void bcma_core_pci_up(struct bcma_bus *bus);
164 +extern void bcma_core_pci_down(struct bcma_bus *bus);
165
166 extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
167 extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);