add the 'goldfish' target, useful for experimenting with virtual phone hardware ...
[openwrt/svn-archive/archive.git] / target / linux / goldfish / patches-2.6.30 / 0125--ARM-goldfish-NAND-Add-nand-driver-for-goldfish.patch
1 From bed297dad6283a5926962c1c59f95ad641824630 Mon Sep 17 00:00:00 2001
2 From: =?utf-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?= <arve@google.com>
3 Date: Fri, 29 Jun 2007 22:20:07 -0700
4 Subject: [PATCH 125/134] [ARM] goldfish: NAND: Add nand driver for goldfish.
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=utf-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: Mike A. Chan <mikechan@google.com>
10 Signed-off-by: Arve Hjønnevåg <arve@android.com>
11 ---
12 drivers/mtd/devices/Kconfig | 5 +
13 drivers/mtd/devices/Makefile | 1 +
14 drivers/mtd/devices/goldfish_nand.c | 418 +++++++++++++++++++++++++++++++
15 drivers/mtd/devices/goldfish_nand_reg.h | 58 +++++
16 4 files changed, 482 insertions(+), 0 deletions(-)
17 create mode 100644 drivers/mtd/devices/goldfish_nand.c
18 create mode 100644 drivers/mtd/devices/goldfish_nand_reg.h
19
20 diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
21 index 6fde0a2..0e9bdd7 100644
22 --- a/drivers/mtd/devices/Kconfig
23 +++ b/drivers/mtd/devices/Kconfig
24 @@ -297,5 +297,10 @@ config MTD_DOCPROBE_55AA
25 LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
26 you have managed to wipe the first block.
27
28 +config MTD_GOLDFISH_NAND
29 + tristate "Goldfish NAND device"
30 + help
31 + none
32 +
33 endmenu
34
35 diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
36 index 0993d5c..46cf8a8 100644
37 --- a/drivers/mtd/devices/Makefile
38 +++ b/drivers/mtd/devices/Makefile
39 @@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o
40 obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
41 obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
42 obj-$(CONFIG_MTD_M25P80) += m25p80.o
43 +obj-$(CONFIG_MTD_GOLDFISH_NAND) += goldfish_nand.o
44 diff --git a/drivers/mtd/devices/goldfish_nand.c b/drivers/mtd/devices/goldfish_nand.c
45 new file mode 100644
46 index 0000000..6b4b8b1
47 --- /dev/null
48 +++ b/drivers/mtd/devices/goldfish_nand.c
49 @@ -0,0 +1,418 @@
50 +/* drivers/mtd/devices/goldfish_nand.c
51 +**
52 +** Copyright (C) 2007 Google, Inc.
53 +**
54 +** This software is licensed under the terms of the GNU General Public
55 +** License version 2, as published by the Free Software Foundation, and
56 +** may be copied, distributed, and modified under those terms.
57 +**
58 +** This program is distributed in the hope that it will be useful,
59 +** but WITHOUT ANY WARRANTY; without even the implied warranty of
60 +** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
61 +** GNU General Public License for more details.
62 +**
63 +*/
64 +
65 +#include <asm/div64.h>
66 +#include <asm/io.h>
67 +#include <linux/module.h>
68 +#include <linux/slab.h>
69 +#include <linux/ioport.h>
70 +#include <linux/vmalloc.h>
71 +#include <linux/init.h>
72 +#include <linux/mtd/compatmac.h>
73 +#include <linux/mtd/mtd.h>
74 +#include <linux/platform_device.h>
75 +
76 +#include "goldfish_nand_reg.h"
77 +
78 +struct goldfish_nand {
79 + spinlock_t lock;
80 + unsigned char __iomem *base;
81 + size_t mtd_count;
82 + struct mtd_info mtd[0];
83 +};
84 +
85 +static uint32_t goldfish_nand_cmd(struct mtd_info *mtd, enum nand_cmd cmd,
86 + uint64_t addr, uint32_t len, void *ptr)
87 +{
88 + struct goldfish_nand *nand = mtd->priv;
89 + uint32_t rv;
90 + unsigned long irq_flags;
91 + unsigned char __iomem *base = nand->base;
92 +
93 + spin_lock_irqsave(&nand->lock, irq_flags);
94 + writel(mtd - nand->mtd, base + NAND_DEV);
95 + writel((uint32_t)(addr >> 32), base + NAND_ADDR_HIGH);
96 + writel((uint32_t)addr, base + NAND_ADDR_LOW);
97 + writel(len, base + NAND_TRANSFER_SIZE);
98 + writel(ptr, base + NAND_DATA);
99 + writel(cmd, base + NAND_COMMAND);
100 + rv = readl(base + NAND_RESULT);
101 + spin_unlock_irqrestore(&nand->lock, irq_flags);
102 + return rv;
103 +}
104 +
105 +static int goldfish_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
106 +{
107 + loff_t ofs = instr->addr;
108 + uint32_t len = instr->len;
109 + uint32_t rem;
110 +
111 + if (ofs + len > mtd->size)
112 + goto invalid_arg;
113 + rem = do_div(ofs, mtd->writesize);
114 + if(rem)
115 + goto invalid_arg;
116 + ofs *= (mtd->writesize + mtd->oobsize);
117 +
118 + if(len % mtd->writesize)
119 + goto invalid_arg;
120 + len = len / mtd->writesize * (mtd->writesize + mtd->oobsize);
121 +
122 + if(goldfish_nand_cmd(mtd, NAND_CMD_ERASE, ofs, len, NULL) != len) {
123 + printk("goldfish_nand_erase: erase failed, start %llx, len %x, dev_size "
124 + "%llx, erase_size %x\n", ofs, len, mtd->size, mtd->erasesize);
125 + return -EIO;
126 + }
127 +
128 + instr->state = MTD_ERASE_DONE;
129 + mtd_erase_callback(instr);
130 +
131 + return 0;
132 +
133 +invalid_arg:
134 + printk("goldfish_nand_erase: invalid erase, start %llx, len %x, dev_size "
135 + "%llx, erase_size %x\n", ofs, len, mtd->size, mtd->erasesize);
136 + return -EINVAL;
137 +}
138 +
139 +static int goldfish_nand_read_oob(struct mtd_info *mtd, loff_t ofs,
140 + struct mtd_oob_ops *ops)
141 +{
142 + uint32_t rem;
143 +
144 + if(ofs + ops->len > mtd->size)
145 + goto invalid_arg;
146 + if(ops->datbuf && ops->len && ops->len != mtd->writesize)
147 + goto invalid_arg;
148 + if(ops->ooblen + ops->ooboffs > mtd->oobsize)
149 + goto invalid_arg;
150 +
151 + rem = do_div(ofs, mtd->writesize);
152 + if(rem)
153 + goto invalid_arg;
154 + ofs *= (mtd->writesize + mtd->oobsize);
155 +
156 + if(ops->datbuf)
157 + ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
158 + ops->len, ops->datbuf);
159 + ofs += mtd->writesize + ops->ooboffs;
160 + if(ops->oobbuf)
161 + ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, ofs,
162 + ops->ooblen, ops->oobbuf);
163 + return 0;
164 +
165 +invalid_arg:
166 + printk("goldfish_nand_read_oob: invalid read, start %llx, len %x, "
167 + "ooblen %x, dev_size %llx, write_size %x\n",
168 + ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
169 + return -EINVAL;
170 +}
171 +
172 +static int goldfish_nand_write_oob(struct mtd_info *mtd, loff_t ofs,
173 + struct mtd_oob_ops *ops)
174 +{
175 + uint32_t rem;
176 +
177 + if(ofs + ops->len > mtd->size)
178 + goto invalid_arg;
179 + if(ops->len && ops->len != mtd->writesize)
180 + goto invalid_arg;
181 + if(ops->ooblen + ops->ooboffs > mtd->oobsize)
182 + goto invalid_arg;
183 +
184 + rem = do_div(ofs, mtd->writesize);
185 + if(rem)
186 + goto invalid_arg;
187 + ofs *= (mtd->writesize + mtd->oobsize);
188 +
189 + if(ops->datbuf)
190 + ops->retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
191 + ops->len, ops->datbuf);
192 + ofs += mtd->writesize + ops->ooboffs;
193 + if(ops->oobbuf)
194 + ops->oobretlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, ofs,
195 + ops->ooblen, ops->oobbuf);
196 + return 0;
197 +
198 +invalid_arg:
199 + printk("goldfish_nand_write_oob: invalid write, start %llx, len %x, "
200 + "ooblen %x, dev_size %llx, write_size %x\n",
201 + ofs, ops->len, ops->ooblen, mtd->size, mtd->writesize);
202 + return -EINVAL;
203 +}
204 +
205 +static int goldfish_nand_read(struct mtd_info *mtd, loff_t from, size_t len,
206 + size_t *retlen, u_char *buf)
207 +{
208 + uint32_t rem;
209 +
210 + if(from + len > mtd->size)
211 + goto invalid_arg;
212 + if(len != mtd->writesize)
213 + goto invalid_arg;
214 +
215 + rem = do_div(from, mtd->writesize);
216 + if(rem)
217 + goto invalid_arg;
218 + from *= (mtd->writesize + mtd->oobsize);
219 +
220 + *retlen = goldfish_nand_cmd(mtd, NAND_CMD_READ, from, len, buf);
221 + return 0;
222 +
223 +invalid_arg:
224 + printk("goldfish_nand_read: invalid read, start %llx, len %x, dev_size %llx"
225 + ", write_size %x\n", from, len, mtd->size, mtd->writesize);
226 + return -EINVAL;
227 +}
228 +
229 +static int goldfish_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
230 + size_t *retlen, const u_char *buf)
231 +{
232 + uint32_t rem;
233 +
234 + if(to + len > mtd->size)
235 + goto invalid_arg;
236 + if(len != mtd->writesize)
237 + goto invalid_arg;
238 +
239 + rem = do_div(to, mtd->writesize);
240 + if(rem)
241 + goto invalid_arg;
242 + to *= (mtd->writesize + mtd->oobsize);
243 +
244 + *retlen = goldfish_nand_cmd(mtd, NAND_CMD_WRITE, to, len, (void *)buf);
245 + return 0;
246 +
247 +invalid_arg:
248 + printk("goldfish_nand_write: invalid write, start %llx, len %x, dev_size %llx"
249 + ", write_size %x\n", to, len, mtd->size, mtd->writesize);
250 + return -EINVAL;
251 +}
252 +
253 +static int goldfish_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
254 +{
255 + uint32_t rem;
256 +
257 + if(ofs >= mtd->size)
258 + goto invalid_arg;
259 +
260 + rem = do_div(ofs, mtd->erasesize);
261 + if(rem)
262 + goto invalid_arg;
263 + ofs *= mtd->erasesize / mtd->writesize;
264 + ofs *= (mtd->writesize + mtd->oobsize);
265 +
266 + return goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_GET, ofs, 0, NULL);
267 +
268 +invalid_arg:
269 + printk("goldfish_nand_block_isbad: invalid arg, ofs %llx, dev_size %llx, "
270 + "write_size %x\n", ofs, mtd->size, mtd->writesize);
271 + return -EINVAL;
272 +}
273 +
274 +static int goldfish_nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
275 +{
276 + uint32_t rem;
277 +
278 + if(ofs >= mtd->size)
279 + goto invalid_arg;
280 +
281 + rem = do_div(ofs, mtd->erasesize);
282 + if(rem)
283 + goto invalid_arg;
284 + ofs *= mtd->erasesize / mtd->writesize;
285 + ofs *= (mtd->writesize + mtd->oobsize);
286 +
287 + if(goldfish_nand_cmd(mtd, NAND_CMD_BLOCK_BAD_SET, ofs, 0, NULL) != 1)
288 + return -EIO;
289 + return 0;
290 +
291 +invalid_arg:
292 + printk("goldfish_nand_block_markbad: invalid arg, ofs %llx, dev_size %llx, "
293 + "write_size %x\n", ofs, mtd->size, mtd->writesize);
294 + return -EINVAL;
295 +}
296 +
297 +static int goldfish_nand_init_device(struct goldfish_nand *nand, int id)
298 +{
299 + uint32_t name_len;
300 + uint32_t result;
301 + uint32_t flags;
302 + unsigned long irq_flags;
303 + unsigned char __iomem *base = nand->base;
304 + struct mtd_info *mtd = &nand->mtd[id];
305 + char *name;
306 +
307 + spin_lock_irqsave(&nand->lock, irq_flags);
308 + writel(id, base + NAND_DEV);
309 + flags = readl(base + NAND_DEV_FLAGS);
310 + name_len = readl(base + NAND_DEV_NAME_LEN);
311 + mtd->writesize = readl(base + NAND_DEV_PAGE_SIZE);
312 + mtd->size = readl(base + NAND_DEV_SIZE_LOW);
313 + mtd->size |= (uint64_t)readl(base + NAND_DEV_SIZE_HIGH) << 32;
314 + mtd->oobsize = readl(base + NAND_DEV_EXTRA_SIZE);
315 + mtd->oobavail = mtd->oobsize;
316 + mtd->erasesize = readl(base + NAND_DEV_ERASE_SIZE) /
317 + (mtd->writesize + mtd->oobsize) * mtd->writesize;
318 + do_div(mtd->size, mtd->writesize + mtd->oobsize);
319 + mtd->size *= mtd->writesize;
320 + printk("goldfish nand dev%d: size %llx, page %d, extra %d, erase %d\n",
321 + id, mtd->size, mtd->writesize, mtd->oobsize, mtd->erasesize);
322 + spin_unlock_irqrestore(&nand->lock, irq_flags);
323 +
324 + mtd->priv = nand;
325 +
326 + mtd->name = name = kmalloc(name_len + 1, GFP_KERNEL);
327 + if(name == NULL)
328 + return -ENOMEM;
329 +
330 + result = goldfish_nand_cmd(mtd, NAND_CMD_GET_DEV_NAME, 0, name_len, name);
331 + if(result != name_len) {
332 + kfree(mtd->name);
333 + mtd->name = NULL;
334 + printk("goldfish_nand_init_device failed to get dev name %d != %d\n",
335 + result, name_len);
336 + return -ENODEV;
337 + }
338 + ((char *) mtd->name)[name_len] = '\0';
339 +
340 + /* Setup the MTD structure */
341 + mtd->type = MTD_NANDFLASH;
342 + mtd->flags = MTD_CAP_NANDFLASH;
343 + if(flags & NAND_DEV_FLAG_READ_ONLY)
344 + mtd->flags &= ~MTD_WRITEABLE;
345 +
346 + mtd->owner = THIS_MODULE;
347 + mtd->erase = goldfish_nand_erase;
348 + mtd->read = goldfish_nand_read;
349 + mtd->write = goldfish_nand_write;
350 + mtd->read_oob = goldfish_nand_read_oob;
351 + mtd->write_oob = goldfish_nand_write_oob;
352 + mtd->block_isbad = goldfish_nand_block_isbad;
353 + mtd->block_markbad = goldfish_nand_block_markbad;
354 +
355 + if (add_mtd_device(mtd)) {
356 + kfree(mtd->name);
357 + mtd->name = NULL;
358 + return -EIO;
359 + }
360 +
361 + return 0;
362 +}
363 +
364 +static int goldfish_nand_probe(struct platform_device *pdev)
365 +{
366 + uint32_t num_dev;
367 + int i;
368 + int err;
369 + uint32_t num_dev_working;
370 + uint32_t version;
371 + struct resource *r;
372 + struct goldfish_nand *nand;
373 + unsigned char __iomem *base;
374 +
375 + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
376 + if(r == NULL) {
377 + err = -ENODEV;
378 + goto err_no_io_base;
379 + }
380 +
381 + base = ioremap(r->start, PAGE_SIZE);
382 + if(base == NULL) {
383 + err = -ENOMEM;
384 + goto err_ioremap;
385 + }
386 + version = readl(base + NAND_VERSION);
387 + if(version != NAND_VERSION_CURRENT) {
388 + printk("goldfish_nand_init: version mismatch, got %d, expected %d\n",
389 + version, NAND_VERSION_CURRENT);
390 + err = -ENODEV;
391 + goto err_no_dev;
392 + }
393 + num_dev = readl(base + NAND_NUM_DEV);
394 + if(num_dev == 0) {
395 + err = -ENODEV;
396 + goto err_no_dev;
397 + }
398 +
399 + nand = kzalloc(sizeof(*nand) + sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
400 + if(nand == NULL) {
401 + err = -ENOMEM;
402 + goto err_nand_alloc_failed;
403 + }
404 + spin_lock_init(&nand->lock);
405 + nand->base = base;
406 + nand->mtd_count = num_dev;
407 + platform_set_drvdata(pdev, nand);
408 +
409 + num_dev_working = 0;
410 + for(i = 0; i < num_dev; i++) {
411 + err = goldfish_nand_init_device(nand, i);
412 + if(err == 0)
413 + num_dev_working++;
414 + }
415 + if(num_dev_working == 0) {
416 + err = -ENODEV;
417 + goto err_no_working_dev;
418 + }
419 + return 0;
420 +
421 +err_no_working_dev:
422 + kfree(nand);
423 +err_nand_alloc_failed:
424 +err_no_dev:
425 + iounmap(base);
426 +err_ioremap:
427 +err_no_io_base:
428 + return err;
429 +}
430 +
431 +static int goldfish_nand_remove(struct platform_device *pdev)
432 +{
433 + struct goldfish_nand *nand = platform_get_drvdata(pdev);
434 + int i;
435 + for(i = 0; i < nand->mtd_count; i++) {
436 + if(nand->mtd[i].name) {
437 + del_mtd_device(&nand->mtd[i]);
438 + kfree(nand->mtd[i].name);
439 + }
440 + }
441 + iounmap(nand->base);
442 + kfree(nand);
443 + return 0;
444 +}
445 +
446 +static struct platform_driver goldfish_nand_driver = {
447 + .probe = goldfish_nand_probe,
448 + .remove = goldfish_nand_remove,
449 + .driver = {
450 + .name = "goldfish_nand"
451 + }
452 +};
453 +
454 +static int __init goldfish_nand_init(void)
455 +{
456 + return platform_driver_register(&goldfish_nand_driver);
457 +}
458 +
459 +static void __exit goldfish_nand_exit(void)
460 +{
461 + platform_driver_unregister(&goldfish_nand_driver);
462 +}
463 +
464 +
465 +module_init(goldfish_nand_init);
466 +module_exit(goldfish_nand_exit);
467 +
468 diff --git a/drivers/mtd/devices/goldfish_nand_reg.h b/drivers/mtd/devices/goldfish_nand_reg.h
469 new file mode 100644
470 index 0000000..7c17a44
471 --- /dev/null
472 +++ b/drivers/mtd/devices/goldfish_nand_reg.h
473 @@ -0,0 +1,58 @@
474 +/* drivers/mtd/devices/goldfish_nand_reg.h
475 +**
476 +** Copyright (C) 2007 Google, Inc.
477 +**
478 +** This software is licensed under the terms of the GNU General Public
479 +** License version 2, as published by the Free Software Foundation, and
480 +** may be copied, distributed, and modified under those terms.
481 +**
482 +** This program is distributed in the hope that it will be useful,
483 +** but WITHOUT ANY WARRANTY; without even the implied warranty of
484 +** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
485 +** GNU General Public License for more details.
486 +**
487 +*/
488 +
489 +#ifndef GOLDFISH_NAND_REG_H
490 +#define GOLDFISH_NAND_REG_H
491 +
492 +enum nand_cmd {
493 + NAND_CMD_GET_DEV_NAME, // Write device name for NAND_DEV to NAND_DATA (vaddr)
494 + NAND_CMD_READ,
495 + NAND_CMD_WRITE,
496 + NAND_CMD_ERASE,
497 + NAND_CMD_BLOCK_BAD_GET, // NAND_RESULT is 1 if block is bad, 0 if it is not
498 + NAND_CMD_BLOCK_BAD_SET
499 +};
500 +
501 +enum nand_dev_flags {
502 + NAND_DEV_FLAG_READ_ONLY = 0x00000001
503 +};
504 +
505 +#define NAND_VERSION_CURRENT (1)
506 +
507 +enum nand_reg {
508 + // Global
509 + NAND_VERSION = 0x000,
510 + NAND_NUM_DEV = 0x004,
511 + NAND_DEV = 0x008,
512 +
513 + // Dev info
514 + NAND_DEV_FLAGS = 0x010,
515 + NAND_DEV_NAME_LEN = 0x014,
516 + NAND_DEV_PAGE_SIZE = 0x018,
517 + NAND_DEV_EXTRA_SIZE = 0x01c,
518 + NAND_DEV_ERASE_SIZE = 0x020,
519 + NAND_DEV_SIZE_LOW = 0x028,
520 + NAND_DEV_SIZE_HIGH = 0x02c,
521 +
522 + // Command
523 + NAND_RESULT = 0x040,
524 + NAND_COMMAND = 0x044,
525 + NAND_DATA = 0x048,
526 + NAND_TRANSFER_SIZE = 0x04c,
527 + NAND_ADDR_LOW = 0x050,
528 + NAND_ADDR_HIGH = 0x054,
529 +};
530 +
531 +#endif
532 --
533 1.6.2
534