target/linux/ifxmips/files/arch/mips/ifxmips/setup.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2004 peng.liu@infineon.com
  17  *   Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/init.h>
  21
  22 #include <asm/time.h>
  23 #include <asm/traps.h>
  24 #include <linux/cpu.h>
  25 #include <asm/irq.h>
  26 #include <asm/bootinfo.h>
  27 #include <asm/ifxmips/ifxmips.h>
  28 #include <asm/ifxmips/ifxmips_irq.h>
  29 #include <asm/ifxmips/ifxmips_pmu.h>
  30 #include <asm/ifxmips/ifxmips_cgu.h>
  31 #include <asm/ifxmips/ifxmips_prom.h>
  32
  33 static unsigned int r4k_offset;
  34 static unsigned int r4k_cur;
  35
  36 /* required in arch/mips/kernel/kspd.c */
  37 unsigned long cpu_khz;
  38
  39 extern void ifxmips_reboot_setup(void);
  40
  41 unsigned int ifxmips_get_cpu_ver(void)
  42 {
  43         return (ifxmips_r32(IFXMIPS_MPS_CHIPID) & 0xF0000000) >> 28;
  44 }
  45 EXPORT_SYMBOL(ifxmips_get_cpu_ver);
  46
  47 static inline u32 ifxmips_get_counter_resolution(void)
  48 {
  49         u32 res;
  50         __asm__ __volatile__(
  51                 ".set   push\n"
  52                 ".set   mips32r2\n"
  53                 ".set   noreorder\n"
  54                 "rdhwr  %0, $3\n"
  55                 "ehb\n"
  56                 ".set pop\n"
  57                 : "=&r" (res)
  58                 : /* no input */
  59                 : "memory");
  60         instruction_hazard();
  61         return res;
  62 }
  63
  64 void __init plat_time_init(void)
  65 {
  66         mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
  67         r4k_cur = (read_c0_count() + r4k_offset);
  68         write_c0_compare(r4k_cur);
  69
  70         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
  71         ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC); /* set clock divider to 1 */
  72         cpu_khz = ifxmips_get_cpu_hz();
  73 }
  74
  75 void __init plat_mem_setup(void)
  76 {
  77         u32 status;
  78         prom_printf("This %s system has a cpu rev of %d\n", get_system_type(), ifxmips_get_cpu_ver());
  79
  80         /* make sure to have no "reverse endian" for user mode! */
  81         status = read_c0_status();
  82         status &= (~(1<<25));
  83         write_c0_status(status);
  84
  85         ifxmips_reboot_setup();
  86
  87         ioport_resource.start = IOPORT_RESOURCE_START;
  88         ioport_resource.end = IOPORT_RESOURCE_END;
  89         iomem_resource.start = IOMEM_RESOURCE_START;
  90         iomem_resource.end = IOMEM_RESOURCE_END;
  91 }