695e0b77aa4111a778862d828fe99b272901af04
[openwrt/svn-archive/archive.git] / target / linux / ifxmips / files / drivers / net / ifxmips_mii0.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
17 * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/slab.h>
22 #include <linux/errno.h>
23 #include <linux/types.h>
24 #include <linux/interrupt.h>
25 #include <linux/uaccess.h>
26 #include <linux/in.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ip.h>
30 #include <linux/tcp.h>
31 #include <linux/skbuff.h>
32 #include <linux/mm.h>
33 #include <linux/platform_device.h>
34 #include <linux/ethtool.h>
35 #include <linux/init.h>
36 #include <linux/delay.h>
37 #include <asm/checksum.h>
38 #include <asm/ifxmips/ifxmips.h>
39 #include <asm/ifxmips/ifxmips_dma.h>
40 #include <asm/ifxmips/ifxmips_pmu.h>
41
42 struct ifxmips_mii_priv {
43 struct net_device_stats stats;
44 struct dma_device_info *dma_device;
45 struct sk_buff *skb;
46 };
47
48 static struct net_device *ifxmips_mii0_dev;
49 static unsigned char mac_addr[MAX_ADDR_LEN];
50
51 void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
52 {
53 u32 val = MDIO_ACC_REQUEST |
54 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
55 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
56 phy_data;
57
58 while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
59 ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
60 }
61 EXPORT_SYMBOL(ifxmips_write_mdio);
62
63 unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
64 {
65 u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
66 ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
67 ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
68
69 while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
70 ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
71 while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
72 val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
73 return val;
74 }
75 EXPORT_SYMBOL(ifxmips_read_mdio);
76
77 int ifxmips_ifxmips_mii_open(struct net_device *dev)
78 {
79 struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
80 struct dma_device_info *dma_dev = priv->dma_device;
81 int i;
82
83 for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
84 if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
85 (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
86 }
87 netif_start_queue(dev);
88 return 0;
89 }
90
91 int ifxmips_mii_release(struct net_device *dev)
92 {
93 struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
94 struct dma_device_info *dma_dev = priv->dma_device;
95 int i;
96
97 for (i = 0; i < dma_dev->max_rx_chan_num; i++)
98 dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
99 netif_stop_queue(dev);
100 return 0;
101 }
102
103 int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
104 {
105 struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
106 unsigned char *buf = NULL;
107 struct sk_buff *skb = NULL;
108 int len = 0;
109
110 len = dma_device_read(dma_dev, &buf, (void **)&skb);
111
112 if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
113 printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
114 goto ifxmips_mii_hw_receive_err_exit;
115 }
116
117 /* remove CRC */
118 len -= 4;
119 if (skb == NULL) {
120 printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
121 goto ifxmips_mii_hw_receive_err_exit;
122 }
123
124 if (len > (skb->end - skb->tail)) {
125 printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
126 (len+4), skb->end, skb->tail);
127 goto ifxmips_mii_hw_receive_err_exit;
128 }
129
130 skb_put(skb, len);
131 skb->dev = dev;
132 skb->protocol = eth_type_trans(skb, dev);
133 netif_rx(skb);
134
135 priv->stats.rx_packets++;
136 priv->stats.rx_bytes += len;
137 return 0;
138
139 ifxmips_mii_hw_receive_err_exit:
140 if (len == 0) {
141 if (skb)
142 dev_kfree_skb_any(skb);
143 priv->stats.rx_errors++;
144 priv->stats.rx_dropped++;
145 return -EIO;
146 } else {
147 return len;
148 }
149 }
150
151 int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
152 {
153 int ret = 0;
154 struct ifxmips_mii_priv *priv = dev->priv;
155 struct dma_device_info *dma_dev = priv->dma_device;
156 ret = dma_device_write(dma_dev, buf, len, priv->skb);
157 return ret;
158 }
159
160 int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
161 {
162 int len;
163 char *data;
164 struct ifxmips_mii_priv *priv = dev->priv;
165 struct dma_device_info *dma_dev = priv->dma_device;
166
167 len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
168 data = skb->data;
169 priv->skb = skb;
170 dev->trans_start = jiffies;
171 /* TODO: we got more than 1 dma channel,
172 so we should do something intelligent here to select one */
173 dma_dev->current_tx_chan = 0;
174
175 wmb();
176
177 if (ifxmips_mii_hw_tx(data, len, dev) != len) {
178 dev_kfree_skb_any(skb);
179 priv->stats.tx_errors++;
180 priv->stats.tx_dropped++;
181 } else {
182 priv->stats.tx_packets++;
183 priv->stats.tx_bytes += len;
184 }
185
186 return 0;
187 }
188
189 void ifxmips_mii_tx_timeout(struct net_device *dev)
190 {
191 int i;
192 struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
193
194 priv->stats.tx_errors++;
195 for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
196 priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
197 netif_wake_queue(dev);
198 return;
199 }
200
201 int dma_intr_handler(struct dma_device_info *dma_dev, int status)
202 {
203 int i;
204
205 switch (status) {
206 case RCV_INT:
207 ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
208 break;
209
210 case TX_BUF_FULL_INT:
211 printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
212 netif_stop_queue(ifxmips_mii0_dev);
213 for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
214 if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
215 dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
216 }
217 break;
218
219 case TRANSMIT_CPT_INT:
220 for (i = 0; i < dma_dev->max_tx_chan_num; i++)
221 dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
222
223 netif_wake_queue(ifxmips_mii0_dev);
224 break;
225 }
226
227 return 0;
228 }
229
230 unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
231 {
232 unsigned char *buffer = NULL;
233 struct sk_buff *skb = NULL;
234
235 skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
236 if (skb == NULL)
237 return NULL;
238
239 buffer = (unsigned char *)(skb->data);
240 skb_reserve(skb, 2);
241 *(int *)opt = (int)skb;
242 *byte_offset = 2;
243
244 return buffer;
245 }
246
247 void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
248 {
249 struct sk_buff *skb = NULL;
250
251 if (opt == NULL) {
252 kfree(dataptr);
253 } else {
254 skb = (struct sk_buff *)opt;
255 dev_kfree_skb_any(skb);
256 }
257 }
258
259 static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
260 {
261 return (struct net_device_stats *)dev->priv;
262 }
263
264 static int ifxmips_mii_dev_init(struct net_device *dev)
265 {
266 int i;
267 struct ifxmips_mii_priv *priv;
268
269 ether_setup(dev);
270 printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
271 dev->open = ifxmips_ifxmips_mii_open;
272 dev->stop = ifxmips_mii_release;
273 dev->hard_start_xmit = ifxmips_mii_tx;
274 dev->get_stats = ifxmips_get_stats;
275 dev->tx_timeout = ifxmips_mii_tx_timeout;
276 dev->watchdog_timeo = 10 * HZ;
277 memset(dev->priv, 0, sizeof(struct ifxmips_mii_priv));
278 priv = dev->priv;
279 priv->dma_device = dma_device_reserve("PPE");
280 if (!priv->dma_device) {
281 BUG();
282 return -ENODEV;
283 }
284 priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
285 priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
286 priv->dma_device->intr_handler = &dma_intr_handler;
287 priv->dma_device->max_rx_chan_num = 4;
288
289 for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
290 priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
291 priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
292 }
293
294 for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
295 if (i == 0)
296 priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
297 else
298 priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
299
300 dma_device_register(priv->dma_device);
301
302 printk(KERN_INFO "ifxmips_mii0: using mac=");
303 for (i = 0; i < 6; i++) {
304 dev->dev_addr[i] = mac_addr[i];
305 printk("%02X%c", dev->dev_addr[i], (i == 5)?('\n'):(':'));
306 }
307 return 0;
308 }
309
310 static void ifxmips_mii_chip_init(int mode)
311 {
312 ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
313 ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
314
315 if (mode == REV_MII_MODE)
316 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
317 else if (mode == MII_MODE)
318 ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
319 ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
320 ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
321 wmb();
322 }
323
324 static int ifxmips_mii_probe(struct platform_device *dev)
325 {
326 int result = 0;
327 unsigned char *mac = (unsigned char *)dev->dev.platform_data;
328 ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
329 ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
330 memcpy(mac_addr, mac, 6);
331 strcpy(ifxmips_mii0_dev->name, "eth%d");
332 ifxmips_mii_chip_init(REV_MII_MODE);
333 result = register_netdev(ifxmips_mii0_dev);
334 if (result) {
335 printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
336 goto out;
337 }
338
339 printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
340
341 out:
342 return result;
343 }
344
345 static int ifxmips_mii_remove(struct platform_device *dev)
346 {
347 struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)ifxmips_mii0_dev->priv;
348
349 printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
350
351 dma_device_unregister(priv->dma_device);
352 dma_device_release(priv->dma_device);
353 kfree(priv->dma_device);
354 kfree(ifxmips_mii0_dev->priv);
355 unregister_netdev(ifxmips_mii0_dev);
356 return 0;
357 }
358
359 static struct platform_driver ifxmips_mii_driver = {
360 .probe = ifxmips_mii_probe,
361 .remove = ifxmips_mii_remove,
362 .driver = {
363 .name = "ifxmips_mii0",
364 .owner = THIS_MODULE,
365 },
366 };
367
368 int __init ifxmips_mii_init(void)
369 {
370 int ret = platform_driver_register(&ifxmips_mii_driver);
371 if (ret)
372 printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
373 return ret;
374 }
375
376 static void __exit ifxmips_mii_cleanup(void)
377 {
378 platform_driver_unregister(&ifxmips_mii_driver);
379 }
380
381 module_init(ifxmips_mii_init);
382 module_exit(ifxmips_mii_cleanup);
383
384 MODULE_LICENSE("GPL");
385 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
386 MODULE_DESCRIPTION("ethernet map driver for IFXMIPS boards");
387