target/linux/imx6/patches-3.10/113-gw52xx.patch

   1 --- a/arch/arm/boot/dts/Makefile
   2 +++ b/arch/arm/boot/dts/Makefile
   3 @@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
   4         imx6q-gw5400-a.dtb \
   5         imx6q-gw54xx.dtb \
   6         imx6dl-gw51xx.dtb \
   7 +       imx6dl-gw52xx.dtb \
   8         imx6q-sabreauto.dtb \
   9         imx6q-sabrelite.dtb \
  10         imx6q-sabresd.dtb \
  11 --- a/arch/arm/boot/dts/imx6dl.dtsi
  12 +++ b/arch/arm/boot/dts/imx6dl.dtsi
  13 @@ -37,6 +37,18 @@
  14                                 compatible = "fsl,imx6dl-iomuxc";
  15                                 reg = <0x020e0000 0x4000>;
  16
  17 +                               /* shared pinctrl settings */
  18 +                               audmux {
  19 +                                       pinctrl_audmux_1: audmux-1 {
  20 +                                               fsl,pins = <
  21 +                                                       MX6DL_PAD_SD2_DAT0__AUD4_RXD  0x80000000
  22 +                                                       MX6DL_PAD_SD2_DAT1__AUD4_TXFS 0x80000000
  23 +                                                       MX6DL_PAD_SD2_DAT2__AUD4_TXD  0x80000000
  24 +                                                       MX6DL_PAD_SD2_DAT3__AUD4_TXC  0x80000000
  25 +                                               >;
  26 +                                       };
  27 +                               };
  28 +
  29                                 enet {
  30                                         pinctrl_enet_1: enetgrp-1 {
  31                                                 fsl,pins = <
  32 @@ -222,6 +234,12 @@
  33                                                         MX6DL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
  34                                                 >;
  35                                         };
  36 +                                       pinctrl_uart2_3: uart2grp-3 {
  37 +                                               fsl,pins = <
  38 +                                                       MX6DL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  39 +                                                       MX6DL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  40 +                                               >;
  41 +                                       };
  42                                 };
  43
  44                                 uart3 {
  45 @@ -252,6 +270,12 @@
  46                                 };
  47
  48                                 usbotg {
  49 +                                       pinctrl_usbotg_1: usbotggrp-1 {
  50 +                                               fsl,pins = <
  51 +                                                       MX6DL_PAD_GPIO_1__USB_OTG_ID 0x17059
  52 +                                               >;
  53 +                                       };
  54 +
  55                                         pinctrl_usbotg_2: usbotggrp-2 {
  56                                                 fsl,pins = <
  57                                                         MX6DL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059