target/linux/imx6/patches-4.1/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch

   1 From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001
   2 From: Tim Harvey <tharvey@gateworks.com>
   3 Date: Thu, 5 Nov 2015 11:10:00 -0800
   4 Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work
   5  simultaneously
   6
   7 Currently it is not possible to have HDMI and LVDS working simultaneously,
   8 because both ports try to use PLL5.
   9
  10 Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
  11 driven from independent sources.
  12
  13 With this change the LDB pixel clock goes to 68.57 MHz, which is still
  14 within the valid range for the displays supported by the Ventana boards.
  15
  16 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
  17 ---
  18  arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++
  19  arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++
  20  arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++
  21  3 files changed, 21 insertions(+)
  22
  23 diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
  24 index 1b66328..9709728 100644
  25 --- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
  26 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
  27 @@ -151,6 +151,13 @@
  28         status = "okay";
  29  };
  30
  31 +&clks {
  32 +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  33 +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  34 +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  35 +                         <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  36 +};
  37 +
  38  &fec {
  39         pinctrl-names = "default";
  40         pinctrl-0 = <&pinctrl_enet>;
  41 diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  42 index 5172de0..dc1cd13 100644
  43 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  44 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
  45 @@ -152,6 +152,13 @@
  46         status = "okay";
  47  };
  48
  49 +&clks {
  50 +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  51 +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  52 +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  53 +                         <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  54 +};
  55 +
  56  &fec {
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&pinctrl_enet>;
  59 diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  60 index 77a56be..7ef9fbe 100644
  61 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  62 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
  63 @@ -142,6 +142,13 @@
  64         status = "okay";
  65  };
  66
  67 +&clks {
  68 +       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  69 +                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  70 +       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  71 +                         <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  72 +};
  73 +
  74  &fec {
  75         pinctrl-names = "default";
  76         pinctrl-0 = <&pinctrl_enet>;
  77 --
  78 1.9.1
  79