[ixp4xx] refresh Avila/Cambria patches
[openwrt/svn-archive/archive.git] / target / linux / ixp4xx / patches-2.6.25 / 190-cambria_support.patch
1 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/Kconfig
2 ===================================================================
3 --- linux-2.6.25.4.orig/arch/arm/mach-ixp4xx/Kconfig
4 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/Kconfig
5 @@ -25,6 +25,14 @@ config MACH_AVILA
6 Avila Network Platform. For more information on this platform,
7 see <file:Documentation/arm/IXP4xx>.
8
9 +config MACH_CAMBRIA
10 + bool "Cambria"
11 + select PCI
12 + help
13 + Say 'Y' here if you want your kernel to support the Gateworks
14 + Cambria series. For more information on this platform,
15 + see <file:Documentation/arm/IXP4xx>.
16 +
17 config MACH_LOFT
18 bool "Loft"
19 depends on MACH_AVILA
20 @@ -200,7 +208,7 @@ config CPU_IXP46X
21
22 config CPU_IXP43X
23 bool
24 - depends on MACH_KIXRP435
25 + depends on MACH_KIXRP435 || MACH_CAMBRIA
26 default y
27
28 config MACH_GTWX5715
29 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/Makefile
30 ===================================================================
31 --- linux-2.6.25.4.orig/arch/arm/mach-ixp4xx/Makefile
32 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/Makefile
33 @@ -7,6 +7,7 @@ obj-pci-n :=
34
35 obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
36 obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
37 +obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o
38 obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
39 obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
40 obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
41 @@ -28,6 +29,7 @@ obj-y += common.o
42
43 obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
44 obj-$(CONFIG_MACH_AVILA) += avila-setup.o
45 +obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o
46 obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
47 obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
48 obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
49 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-pci.c
50 ===================================================================
51 --- /dev/null
52 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-pci.c
53 @@ -0,0 +1,74 @@
54 +/*
55 + * arch/arch/mach-ixp4xx/cambria-pci.c
56 + *
57 + * PCI setup routines for Gateworks Cambria series
58 + *
59 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
60 + *
61 + * based on coyote-pci.c:
62 + * Copyright (C) 2002 Jungo Software Technologies.
63 + * Copyright (C) 2003 MontaVista Softwrae, Inc.
64 + *
65 + * Maintainer: Imre Kaloz <kaloz@openwrt.org>
66 + *
67 + * This program is free software; you can redistribute it and/or modify
68 + * it under the terms of the GNU General Public License version 2 as
69 + * published by the Free Software Foundation.
70 + *
71 + */
72 +
73 +#include <linux/kernel.h>
74 +#include <linux/pci.h>
75 +#include <linux/init.h>
76 +#include <linux/irq.h>
77 +
78 +#include <asm/mach-types.h>
79 +#include <asm/hardware.h>
80 +#include <asm/irq.h>
81 +
82 +#include <asm/mach/pci.h>
83 +
84 +extern void ixp4xx_pci_preinit(void);
85 +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
86 +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
87 +
88 +void __init cambria_pci_preinit(void)
89 +{
90 + set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
91 + set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
92 + set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
93 + set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
94 +
95 + ixp4xx_pci_preinit();
96 +}
97 +
98 +static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
99 +{
100 + if (slot == 1)
101 + return IRQ_IXP4XX_GPIO11;
102 + else if (slot == 2)
103 + return IRQ_IXP4XX_GPIO10;
104 + else if (slot == 3)
105 + return IRQ_IXP4XX_GPIO9;
106 + else if (slot == 4)
107 + return IRQ_IXP4XX_GPIO8;
108 + else return -1;
109 +}
110 +
111 +struct hw_pci cambria_pci __initdata = {
112 + .nr_controllers = 1,
113 + .preinit = cambria_pci_preinit,
114 + .swizzle = pci_std_swizzle,
115 + .setup = ixp4xx_setup,
116 + .scan = ixp4xx_scan_bus,
117 + .map_irq = cambria_map_irq,
118 +};
119 +
120 +int __init cambria_pci_init(void)
121 +{
122 + if (machine_is_cambria())
123 + pci_common_init(&cambria_pci);
124 + return 0;
125 +}
126 +
127 +subsys_initcall(cambria_pci_init);
128 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-setup.c
129 ===================================================================
130 --- /dev/null
131 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-setup.c
132 @@ -0,0 +1,445 @@
133 +/*
134 + * arch/arm/mach-ixp4xx/cambria-setup.c
135 + *
136 + * Board setup for the Gateworks Cambria series
137 + *
138 + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
139 + *
140 + * based on coyote-setup.c:
141 + * Copyright (C) 2003-2005 MontaVista Software, Inc.
142 + *
143 + * Author: Imre Kaloz <Kaloz@openwrt.org>
144 + */
145 +
146 +#include <linux/kernel.h>
147 +#include <linux/init.h>
148 +#include <linux/device.h>
149 +#include <linux/if_ether.h>
150 +#include <linux/socket.h>
151 +#include <linux/netdevice.h>
152 +#include <linux/serial.h>
153 +#include <linux/tty.h>
154 +#include <linux/serial_8250.h>
155 +#include <linux/slab.h>
156 +#ifdef CONFIG_SENSORS_EEPROM
157 +# include <linux/i2c.h>
158 +# include <linux/eeprom.h>
159 +#endif
160 +
161 +#include <linux/leds.h>
162 +#include <linux/i2c-gpio.h>
163 +#include <asm/types.h>
164 +#include <asm/setup.h>
165 +#include <asm/memory.h>
166 +#include <asm/hardware.h>
167 +#include <asm/irq.h>
168 +#include <asm/mach-types.h>
169 +#include <asm/mach/arch.h>
170 +#include <asm/mach/flash.h>
171 +
172 +struct cambria_board_info {
173 + unsigned char *model;
174 + void (* setup)(void);
175 +};
176 +
177 +static struct cambria_board_info *cambria_info __initdata;
178 +
179 +static struct flash_platform_data cambria_flash_data = {
180 + .map_name = "cfi_probe",
181 + .width = 2,
182 +};
183 +
184 +static struct resource cambria_flash_resource = {
185 + .flags = IORESOURCE_MEM,
186 +};
187 +
188 +static struct platform_device cambria_flash = {
189 + .name = "IXP4XX-Flash",
190 + .id = 0,
191 + .dev = {
192 + .platform_data = &cambria_flash_data,
193 + },
194 + .num_resources = 1,
195 + .resource = &cambria_flash_resource,
196 +};
197 +
198 +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
199 + .sda_pin = 7,
200 + .scl_pin = 6,
201 +};
202 +
203 +static struct platform_device cambria_i2c_gpio = {
204 + .name = "i2c-gpio",
205 + .id = 0,
206 + .dev = {
207 + .platform_data = &cambria_i2c_gpio_data,
208 + },
209 +};
210 +
211 +static struct resource cambria_uart_resource = {
212 + .start = IXP4XX_UART1_BASE_PHYS,
213 + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
214 + .flags = IORESOURCE_MEM,
215 +};
216 +
217 +static struct plat_serial8250_port cambria_uart_data[] = {
218 + {
219 + .mapbase = IXP4XX_UART1_BASE_PHYS,
220 + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
221 + .irq = IRQ_IXP4XX_UART1,
222 + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
223 + .iotype = UPIO_MEM,
224 + .regshift = 2,
225 + .uartclk = IXP4XX_UART_XTAL,
226 + },
227 + { },
228 +};
229 +
230 +static struct platform_device cambria_uart = {
231 + .name = "serial8250",
232 + .id = PLAT8250_DEV_PLATFORM,
233 + .dev = {
234 + .platform_data = cambria_uart_data,
235 + },
236 + .num_resources = 1,
237 + .resource = &cambria_uart_resource,
238 +};
239 +
240 +static struct resource cambria_pata_resources[] = {
241 + {
242 + .flags = IORESOURCE_MEM
243 + },
244 + {
245 + .flags = IORESOURCE_MEM,
246 + },
247 + {
248 + .name = "intrq",
249 + .start = IRQ_IXP4XX_GPIO12,
250 + .end = IRQ_IXP4XX_GPIO12,
251 + .flags = IORESOURCE_IRQ,
252 + },
253 +};
254 +
255 +static struct ixp4xx_pata_data cambria_pata_data = {
256 + .cs0_bits = 0xbfff3c03,
257 + .cs1_bits = 0xbfff3c03,
258 +};
259 +
260 +static struct platform_device cambria_pata = {
261 + .name = "pata_ixp4xx_cf",
262 + .id = 0,
263 + .dev.platform_data = &cambria_pata_data,
264 + .num_resources = ARRAY_SIZE(cambria_pata_resources),
265 + .resource = cambria_pata_resources,
266 +};
267 +
268 +static struct eth_plat_info cambria_npec_data = {
269 + .phy = 2,
270 + .rxq = 4,
271 + .txreadyq = 21,
272 +};
273 +
274 +static struct eth_plat_info cambria_npea_data = {
275 + .phy = 1,
276 + .rxq = 2,
277 + .txreadyq = 19,
278 +};
279 +
280 +static struct platform_device cambria_npec_device = {
281 + .name = "ixp4xx_eth",
282 + .id = IXP4XX_ETH_NPEC,
283 + .dev.platform_data = &cambria_npec_data,
284 +};
285 +
286 +static struct platform_device cambria_npea_device = {
287 + .name = "ixp4xx_eth",
288 + .id = IXP4XX_ETH_NPEA,
289 + .dev.platform_data = &cambria_npea_data,
290 +};
291 +
292 +static struct gpio_led cambria_gpio_leds[] = {
293 + {
294 + .name = "user", /* green led */
295 + .gpio = 5,
296 + .active_low = 1,
297 + }
298 +};
299 +
300 +static struct gpio_led_platform_data cambria_gpio_leds_data = {
301 + .num_leds = 1,
302 + .leds = cambria_gpio_leds,
303 +};
304 +
305 +static struct platform_device cambria_gpio_leds_device = {
306 + .name = "leds-gpio",
307 + .id = -1,
308 + .dev.platform_data = &cambria_gpio_leds_data,
309 +};
310 +
311 +
312 +static struct latch_led cambria_latch_leds[] = {
313 + {
314 + .name = "ledA", /* green led */
315 + .bit = 0,
316 + },
317 + {
318 + .name = "ledB", /* green led */
319 + .bit = 1,
320 + },
321 + {
322 + .name = "ledC", /* green led */
323 + .bit = 2,
324 + },
325 + {
326 + .name = "ledD", /* green led */
327 + .bit = 3,
328 + },
329 + {
330 + .name = "ledE", /* green led */
331 + .bit = 4,
332 + },
333 + {
334 + .name = "ledF", /* green led */
335 + .bit = 5,
336 + },
337 + {
338 + .name = "ledG", /* green led */
339 + .bit = 6,
340 + },
341 + {
342 + .name = "ledH", /* green led */
343 + .bit = 7,
344 + }
345 +};
346 +
347 +static struct latch_led_platform_data cambria_latch_leds_data = {
348 + .num_leds = 8,
349 + .leds = cambria_latch_leds,
350 + .mem = 0x53F40000,
351 +};
352 +
353 +static struct platform_device cambria_latch_leds_device = {
354 + .name = "leds-latch",
355 + .id = -1,
356 + .dev.platform_data = &cambria_latch_leds_data,
357 +};
358 +
359 +static struct resource cambria_usb0_resources[] = {
360 + {
361 + .start = 0xCD000000,
362 + .end = 0xCD000300,
363 + .flags = IORESOURCE_MEM,
364 + },
365 + {
366 + .start = 32,
367 + .flags = IORESOURCE_IRQ,
368 + },
369 +};
370 +
371 +static struct resource cambria_usb1_resources[] = {
372 + {
373 + .start = 0xCE000000,
374 + .end = 0xCE000300,
375 + .flags = IORESOURCE_MEM,
376 + },
377 + {
378 + .start = 33,
379 + .flags = IORESOURCE_IRQ,
380 + },
381 +};
382 +
383 +static u64 ehci_dma_mask = ~(u32)0;
384 +
385 +static struct platform_device cambria_usb0_device = {
386 + .name = "ixp4xx-ehci",
387 + .id = 0,
388 + .dev = {
389 + .dma_mask = &ehci_dma_mask,
390 + .coherent_dma_mask = 0xffffffff,
391 + },
392 + .resource = cambria_usb0_resources,
393 + .num_resources = 2,
394 +};
395 +
396 +static struct platform_device cambria_usb1_device = {
397 + .name = "ixp4xx-ehci",
398 + .id = 1,
399 + .dev = {
400 + .dma_mask = &ehci_dma_mask,
401 + .coherent_dma_mask = 0xffffffff,
402 + },
403 + .resource = cambria_usb1_resources,
404 + .num_resources = 2,
405 +};
406 +
407 +
408 +static struct platform_device *cambria_devices[] __initdata = {
409 + &cambria_i2c_gpio,
410 + &cambria_flash,
411 + &cambria_uart,
412 +};
413 +
414 +static void __init cambria_gw23xx_setup(void)
415 +{
416 + platform_device_register(&cambria_npec_device);
417 + platform_device_register(&cambria_npea_device);
418 +}
419 +
420 +#ifdef CONFIG_SENSORS_EEPROM
421 +static void __init cambria_gw2350_setup(void)
422 +{
423 + platform_device_register(&cambria_npec_device);
424 + platform_device_register(&cambria_npea_device);
425 +
426 + platform_device_register(&cambria_usb0_device);
427 + platform_device_register(&cambria_usb1_device);
428 +
429 + platform_device_register(&cambria_gpio_leds_device);
430 +}
431 +
432 +static void __init cambria_gw2358_setup(void)
433 +{
434 + platform_device_register(&cambria_npec_device);
435 + platform_device_register(&cambria_npea_device);
436 +
437 + platform_device_register(&cambria_usb0_device);
438 + platform_device_register(&cambria_usb1_device);
439 +
440 + platform_device_register(&cambria_pata);
441 +
442 + platform_device_register(&cambria_latch_leds_device);
443 +}
444 +
445 +static struct cambria_board_info cambria_boards[] __initdata = {
446 + {
447 + .model = "GW2350",
448 + .setup = cambria_gw2350_setup,
449 + }, {
450 + .model = "GW2358",
451 + .setup = cambria_gw2358_setup,
452 + }
453 +};
454 +
455 +static struct cambria_board_info * __init cambria_find_board_info(char *model)
456 +{
457 + int i;
458 +
459 + for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) {
460 + struct cambria_board_info *info = &cambria_boards[i];
461 + if (strncmp(info->model, model, strlen(info->model)) == 0)
462 + return info;
463 + }
464 +
465 + return NULL;
466 +}
467 +
468 +struct cambria_eeprom_header {
469 + unsigned char mac0[ETH_ALEN];
470 + unsigned char mac1[ETH_ALEN];
471 + unsigned char res0[4];
472 + unsigned char magic[2];
473 + unsigned char config[14];
474 + unsigned char model[16];
475 +};
476 +
477 +static int __init cambria_eeprom_notify(struct notifier_block *self,
478 + unsigned long event, void *t)
479 +{
480 + struct eeprom_data *ee = t;
481 + struct cambria_eeprom_header hdr;
482 +
483 + if (cambria_info)
484 + return NOTIFY_DONE;
485 +
486 + /* The eeprom is at address 0x51 */
487 + if (event != EEPROM_REGISTER || ee->client.addr != 0x51)
488 + return NOTIFY_DONE;
489 +
490 + ee->attr->read(&ee->client.dev.kobj, ee->attr, (char *)&hdr,
491 + 0, sizeof(hdr));
492 +
493 + if (hdr.magic[0] != 'G' || hdr.magic[1] != 'W')
494 + return NOTIFY_DONE;
495 +
496 + memcpy(&cambria_npec_data.hwaddr, hdr.mac0, ETH_ALEN);
497 + memcpy(&cambria_npea_data.hwaddr, hdr.mac1, ETH_ALEN);
498 +
499 + cambria_info = cambria_find_board_info(hdr.model);
500 +
501 + return NOTIFY_OK;
502 +}
503 +
504 +static struct notifier_block cambria_eeprom_notifier __initdata = {
505 + .notifier_call = cambria_eeprom_notify
506 +};
507 +
508 +static void __init cambria_register_eeprom_notifier(void)
509 +{
510 + register_eeprom_notifier(&cambria_eeprom_notifier);
511 +}
512 +
513 +static void __init cambria_unregister_eeprom_notifier(void)
514 +{
515 + unregister_eeprom_notifier(&cambria_eeprom_notifier);
516 +}
517 +#else /* CONFIG_SENSORS_EEPROM */
518 +static inline void cambria_register_eeprom_notifier(void) {};
519 +static inline void cambria_unregister_eeprom_notifier(void) {};
520 +#endif /* CONFIG_SENSORS_EEPROM */
521 +
522 +static void __init cambria_init(void)
523 +{
524 + ixp4xx_sys_init();
525 +
526 + cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
527 + cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
528 +
529 + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
530 + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
531 +
532 + platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
533 +
534 + cambria_pata_resources[0].start = 0x53e00000;
535 + cambria_pata_resources[0].end = 0x53e3ffff;
536 +
537 + cambria_pata_resources[1].start = 0x53e40000;
538 + cambria_pata_resources[1].end = 0x53e7ffff;
539 +
540 + cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
541 + cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
542 +
543 + cambria_register_eeprom_notifier();
544 +}
545 +
546 +static int __init cambria_model_setup(void)
547 +{
548 + if (!machine_is_cambria())
549 + return 0;
550 +
551 + if (cambria_info) {
552 + printk(KERN_DEBUG "Running on Gateworks Cambria %s\n",
553 + cambria_info->model);
554 + cambria_info->setup();
555 + } else {
556 + printk(KERN_INFO "Unknown/missing Cambria model number"
557 + " -- defaults will be used\n");
558 + cambria_gw23xx_setup();
559 + }
560 +
561 + cambria_unregister_eeprom_notifier();
562 + return 0;
563 +}
564 +late_initcall(cambria_model_setup);
565 +
566 +#ifdef CONFIG_MACH_CAMBRIA
567 +MACHINE_START(CAMBRIA, "Gateworks Cambria series")
568 + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
569 + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
570 + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
571 + .map_io = ixp4xx_map_io,
572 + .init_irq = ixp4xx_init_irq,
573 + .timer = &ixp4xx_timer,
574 + .boot_params = 0x0100,
575 + .init_machine = cambria_init,
576 +MACHINE_END
577 +#endif
578 Index: linux-2.6.25.4/include/asm-arm/arch-ixp4xx/hardware.h
579 ===================================================================
580 --- linux-2.6.25.4.orig/include/asm-arm/arch-ixp4xx/hardware.h
581 +++ linux-2.6.25.4/include/asm-arm/arch-ixp4xx/hardware.h
582 @@ -18,7 +18,7 @@
583 #define __ASM_ARCH_HARDWARE_H__
584
585 #define PCIBIOS_MIN_IO 0x00001000
586 -#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
587 +#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x48000000 : 0x48000000)
588
589 /*
590 * We override the standard dma-mask routines for bouncing.