target/linux/ixp4xx/patches-2.6.34/050-disable_dmabounce.patch

   1 --- a/arch/arm/Kconfig  2010-05-17 19:51:29.000000000 +0200
   2 +++ b/arch/arm/Kconfig  2010-05-18 17:44:39.000000000 +0200
   3 @@ -433,7 +433,6 @@ config ARCH_IXP4XX
   4         select GENERIC_GPIO
   5         select GENERIC_TIME
   6         select GENERIC_CLOCKEVENTS
   7 -       select DMABOUNCE if PCI
   8         help
   9           Support for Intel's IXP4XX (XScale) family of processors.
  10
  11 --- a/arch/arm/mach-ixp4xx/Kconfig      2010-02-25 14:45:00.000000000 +0100
  12 +++ b/arch/arm/mach-ixp4xx/Kconfig      2010-05-18 17:44:39.000000000 +0200
  13 @@ -199,6 +199,43 @@ config IXP4XX_INDIRECT_PCI
  14           need to use the indirect method instead. If you don't know
  15           what you need, leave this option unselected.
  16
  17 +config IXP4XX_LEGACY_DMABOUNCE
  18 +       bool "Legacy PCI DMA bounce support"
  19 +       depends on PCI
  20 +       default n
  21 +       select DMABOUNCE
  22 +       help
  23 +         The IXP4xx is limited to a 64MB window for PCI DMA, which
  24 +         requires that PCI accesses >= 64MB are bounced via buffers
  25 +         below 64MB.
  26 +
  27 +         The kernel has traditionally handled this issue by using ARM
  28 +         specific DMA bounce support code for all accesses >= 64MB.
  29 +         That code causes problems of its own, so it is desirable to
  30 +         disable it.
  31 +
  32 +         Enabling this option makes IXP4xx continue to use the problematic
  33 +         ARM DMA bounce code. Disabling this option makes IXP4xx use the
  34 +         kernel's generic bounce code.
  35 +
  36 +         Say 'N'.
  37 +
  38 +config IXP4XX_ZONE_DMA
  39 +       bool "Support > 64MB RAM"
  40 +       depends on !IXP4XX_LEGACY_DMABOUNCE
  41 +       default y
  42 +       select ZONE_DMA
  43 +       help
  44 +         The IXP4xx is limited to a 64MB window for PCI DMA, which
  45 +         requires that PCI accesses above 64MB are bounced via buffers
  46 +         below 64MB.
  47 +
  48 +         Disabling this option allows you to omit the support code for
  49 +         DMA-able memory allocations and DMA bouncing, but the kernel
  50 +         will then not work properly if more than 64MB of RAM is present.
  51 +
  52 +         Say 'Y' unless your platform is limited to <= 64MB of RAM.
  53 +
  54  config IXP4XX_QMGR
  55         tristate "IXP4xx Queue Manager support"
  56         help
  57 --- a/arch/arm/mach-ixp4xx/common-pci.c 2010-05-17 19:51:29.000000000 +0200
  58 +++ b/arch/arm/mach-ixp4xx/common-pci.c 2010-05-18 17:44:39.000000000 +0200
  59 @@ -321,27 +321,33 @@ static int abort_handler(unsigned long a
  60   */
  61  static int ixp4xx_pci_platform_notify(struct device *dev)
  62  {
  63 -       if(dev->bus == &pci_bus_type) {
  64 -               *dev->dma_mask =  SZ_64M - 1;
  65 +       if (dev->bus == &pci_bus_type) {
  66 +               *dev->dma_mask = SZ_64M - 1;
  67                 dev->coherent_dma_mask = SZ_64M - 1;
  68 +#ifdef CONFIG_DMABOUNCE
  69                 dmabounce_register_dev(dev, 2048, 4096);
  70 +#endif
  71         }
  72         return 0;
  73  }
  74
  75  static int ixp4xx_pci_platform_notify_remove(struct device *dev)
  76  {
  77 -       if(dev->bus == &pci_bus_type) {
  78 +#ifdef CONFIG_DMABOUNCE
  79 +       if (dev->bus == &pci_bus_type)
  80                 dmabounce_unregister_dev(dev);
  81 -       }
  82 +#endif
  83         return 0;
  84  }
  85
  86 +#ifdef CONFIG_DMABOUNCE
  87  int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
  88  {
  89 -       return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M);
  90 +       return (dev->bus == &pci_bus_type ) && ((dma_addr + size) > SZ_64M);
  91  }
  92 +#endif
  93
  94 +#ifdef CONFIG_ZONE_DMA
  95  /*
  96   * Only first 64MB of memory can be accessed via PCI.
  97   * We use GFP_DMA to allocate safe buffers to do map/unmap.
  98 @@ -364,6 +370,7 @@ void __init ixp4xx_adjust_zones(int node
  99         zhole_size[1] = zhole_size[0];
 100         zhole_size[0] = 0;
 101  }
 102 +#endif
 103
 104  void __init ixp4xx_pci_preinit(void)
 105  {
 106 --- a/arch/arm/mach-ixp4xx/include/mach/memory.h        2009-03-24 18:00:31.000000000 +0100
 107 +++ b/arch/arm/mach-ixp4xx/include/mach/memory.h        2010-05-18 17:44:39.000000000 +0200
 108 @@ -16,10 +16,12 @@
 109
 110  #if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
 111
 112 +#ifdef CONFIG_ZONE_DMA
 113  void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
 114
 115  #define arch_adjust_zones(node, size, holes) \
 116         ixp4xx_adjust_zones(node, size, holes)
 117 +#endif
 118
 119  #define ISA_DMA_THRESHOLD (SZ_64M - 1)
 120  #define MAX_DMA_ADDRESS                (PAGE_OFFSET + SZ_64M)